[llvm] [InstCombine] Fold `[l|a]shr iN (X-1)&~X, N-1 -> [z|s]ext(X==0)` (PR #107259)

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goldsteinn wrote:

> > Also think a better place for this would be `simplifyDemandedBits`. There are a lot of patterns in the bits based on `X` and `C`(1) in this case.
> 
> So the pattern would be something like this? https://alive2.llvm.org/ce/z/FqAbpX I guess that's fine assuming this actually occurs with non-lshr/ashr demanded bits contexts and the additional one-use limitation is unproblematic for motivating cases.

Yeah, we can also deduce things about the lowbits from it as well. I.e:
https://alive2.llvm.org/ce/z/5Vm8UW

Is this pattern common enough to justify adding it to knownbits handling?

https://github.com/llvm/llvm-project/pull/107259