[llvm] [AMDGPU] Create dir for amdgpu specific machineverifier tests (PR #106960)
Aditi Medhane via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 2 21:57:48 PDT 2024
https://github.com/AditiRM updated https://github.com/llvm/llvm-project/pull/106960
>From 62ec5c8e888c257579c47f4c0411517eea054479 Mon Sep 17 00:00:00 2001
From: AditiRM <Aditi.Medhane at amd.com>
Date: Mon, 2 Sep 2024 15:03:08 +0530
Subject: [PATCH 1/2] [AMDGPU] Create dir for amdgpu specific machineverifier
tests
---
.../MachineVerifier/{ => amdgpu}/register-killed-inside-loop.mir | 0
llvm/test/MachineVerifier/{ => amdgpu}/test_g_bitcast.mir | 0
llvm/test/MachineVerifier/{ => amdgpu}/test_g_intrinsic.mir | 0
.../{ => amdgpu}/test_g_intrinsic_w_side_effects.mir | 0
.../{ => amdgpu}/undef-should-only-be-set-on-subreg-defs.mir | 0
.../MachineVerifier/{ => amdgpu}/undef-virt-reg-entry-block.mir | 0
.../{ => amdgpu}/undef-virt-reg-nonentry-block.mir | 0
.../MachineVerifier/{ => amdgpu}/verifier-ec-subreg-liveness.mir | 0
.../verifier-implicit-virtreg-invalid-physreg-liveness.mir | 0
.../MachineVerifier/{ => amdgpu}/verifier-pseudo-terminators.mir | 0
llvm/test/MachineVerifier/{ => amdgpu}/verify-implicit-def.mir | 0
llvm/test/MachineVerifier/{ => amdgpu}/verify-reg-sequence.mir | 0
llvm/test/MachineVerifier/{ => amdgpu}/writelane_m0.mir | 0
13 files changed, 0 insertions(+), 0 deletions(-)
rename llvm/test/MachineVerifier/{ => amdgpu}/register-killed-inside-loop.mir (100%)
rename llvm/test/MachineVerifier/{ => amdgpu}/test_g_bitcast.mir (100%)
rename llvm/test/MachineVerifier/{ => amdgpu}/test_g_intrinsic.mir (100%)
rename llvm/test/MachineVerifier/{ => amdgpu}/test_g_intrinsic_w_side_effects.mir (100%)
rename llvm/test/MachineVerifier/{ => amdgpu}/undef-should-only-be-set-on-subreg-defs.mir (100%)
rename llvm/test/MachineVerifier/{ => amdgpu}/undef-virt-reg-entry-block.mir (100%)
rename llvm/test/MachineVerifier/{ => amdgpu}/undef-virt-reg-nonentry-block.mir (100%)
rename llvm/test/MachineVerifier/{ => amdgpu}/verifier-ec-subreg-liveness.mir (100%)
rename llvm/test/MachineVerifier/{ => amdgpu}/verifier-implicit-virtreg-invalid-physreg-liveness.mir (100%)
rename llvm/test/MachineVerifier/{ => amdgpu}/verifier-pseudo-terminators.mir (100%)
rename llvm/test/MachineVerifier/{ => amdgpu}/verify-implicit-def.mir (100%)
rename llvm/test/MachineVerifier/{ => amdgpu}/verify-reg-sequence.mir (100%)
rename llvm/test/MachineVerifier/{ => amdgpu}/writelane_m0.mir (100%)
diff --git a/llvm/test/MachineVerifier/register-killed-inside-loop.mir b/llvm/test/MachineVerifier/amdgpu/register-killed-inside-loop.mir
similarity index 100%
rename from llvm/test/MachineVerifier/register-killed-inside-loop.mir
rename to llvm/test/MachineVerifier/amdgpu/register-killed-inside-loop.mir
diff --git a/llvm/test/MachineVerifier/test_g_bitcast.mir b/llvm/test/MachineVerifier/amdgpu/test_g_bitcast.mir
similarity index 100%
rename from llvm/test/MachineVerifier/test_g_bitcast.mir
rename to llvm/test/MachineVerifier/amdgpu/test_g_bitcast.mir
diff --git a/llvm/test/MachineVerifier/test_g_intrinsic.mir b/llvm/test/MachineVerifier/amdgpu/test_g_intrinsic.mir
similarity index 100%
rename from llvm/test/MachineVerifier/test_g_intrinsic.mir
rename to llvm/test/MachineVerifier/amdgpu/test_g_intrinsic.mir
diff --git a/llvm/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir b/llvm/test/MachineVerifier/amdgpu/test_g_intrinsic_w_side_effects.mir
similarity index 100%
rename from llvm/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir
rename to llvm/test/MachineVerifier/amdgpu/test_g_intrinsic_w_side_effects.mir
diff --git a/llvm/test/MachineVerifier/undef-should-only-be-set-on-subreg-defs.mir b/llvm/test/MachineVerifier/amdgpu/undef-should-only-be-set-on-subreg-defs.mir
similarity index 100%
rename from llvm/test/MachineVerifier/undef-should-only-be-set-on-subreg-defs.mir
rename to llvm/test/MachineVerifier/amdgpu/undef-should-only-be-set-on-subreg-defs.mir
diff --git a/llvm/test/MachineVerifier/undef-virt-reg-entry-block.mir b/llvm/test/MachineVerifier/amdgpu/undef-virt-reg-entry-block.mir
similarity index 100%
rename from llvm/test/MachineVerifier/undef-virt-reg-entry-block.mir
rename to llvm/test/MachineVerifier/amdgpu/undef-virt-reg-entry-block.mir
diff --git a/llvm/test/MachineVerifier/undef-virt-reg-nonentry-block.mir b/llvm/test/MachineVerifier/amdgpu/undef-virt-reg-nonentry-block.mir
similarity index 100%
rename from llvm/test/MachineVerifier/undef-virt-reg-nonentry-block.mir
rename to llvm/test/MachineVerifier/amdgpu/undef-virt-reg-nonentry-block.mir
diff --git a/llvm/test/MachineVerifier/verifier-ec-subreg-liveness.mir b/llvm/test/MachineVerifier/amdgpu/verifier-ec-subreg-liveness.mir
similarity index 100%
rename from llvm/test/MachineVerifier/verifier-ec-subreg-liveness.mir
rename to llvm/test/MachineVerifier/amdgpu/verifier-ec-subreg-liveness.mir
diff --git a/llvm/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir b/llvm/test/MachineVerifier/amdgpu/verifier-implicit-virtreg-invalid-physreg-liveness.mir
similarity index 100%
rename from llvm/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir
rename to llvm/test/MachineVerifier/amdgpu/verifier-implicit-virtreg-invalid-physreg-liveness.mir
diff --git a/llvm/test/MachineVerifier/verifier-pseudo-terminators.mir b/llvm/test/MachineVerifier/amdgpu/verifier-pseudo-terminators.mir
similarity index 100%
rename from llvm/test/MachineVerifier/verifier-pseudo-terminators.mir
rename to llvm/test/MachineVerifier/amdgpu/verifier-pseudo-terminators.mir
diff --git a/llvm/test/MachineVerifier/verify-implicit-def.mir b/llvm/test/MachineVerifier/amdgpu/verify-implicit-def.mir
similarity index 100%
rename from llvm/test/MachineVerifier/verify-implicit-def.mir
rename to llvm/test/MachineVerifier/amdgpu/verify-implicit-def.mir
diff --git a/llvm/test/MachineVerifier/verify-reg-sequence.mir b/llvm/test/MachineVerifier/amdgpu/verify-reg-sequence.mir
similarity index 100%
rename from llvm/test/MachineVerifier/verify-reg-sequence.mir
rename to llvm/test/MachineVerifier/amdgpu/verify-reg-sequence.mir
diff --git a/llvm/test/MachineVerifier/writelane_m0.mir b/llvm/test/MachineVerifier/amdgpu/writelane_m0.mir
similarity index 100%
rename from llvm/test/MachineVerifier/writelane_m0.mir
rename to llvm/test/MachineVerifier/amdgpu/writelane_m0.mir
>From dbb49056bfe9bb62b60d431f08aa73a06cdfeedf Mon Sep 17 00:00:00 2001
From: AditiRM <Aditi.Medhane at amd.com>
Date: Tue, 3 Sep 2024 10:27:26 +0530
Subject: [PATCH 2/2] Handle review changes
Introduced AMDGPU directory and lit.local.cfg accordingly
---
llvm/test/MachineVerifier/AMDGPU/lit.local.cfg | 2 ++
.../{amdgpu => AMDGPU}/register-killed-inside-loop.mir | 1 -
llvm/test/MachineVerifier/{amdgpu => AMDGPU}/test_g_bitcast.mir | 1 -
.../MachineVerifier/{amdgpu => AMDGPU}/test_g_intrinsic.mir | 1 -
.../{amdgpu => AMDGPU}/test_g_intrinsic_w_side_effects.mir | 1 -
.../undef-should-only-be-set-on-subreg-defs.mir | 1 -
.../{amdgpu => AMDGPU}/undef-virt-reg-entry-block.mir | 1 -
.../{amdgpu => AMDGPU}/undef-virt-reg-nonentry-block.mir | 1 -
.../{amdgpu => AMDGPU}/verifier-ec-subreg-liveness.mir | 1 -
.../verifier-implicit-virtreg-invalid-physreg-liveness.mir | 1 -
.../{amdgpu => AMDGPU}/verifier-pseudo-terminators.mir | 1 -
.../MachineVerifier/{amdgpu => AMDGPU}/verify-implicit-def.mir | 1 -
.../MachineVerifier/{amdgpu => AMDGPU}/verify-reg-sequence.mir | 1 -
llvm/test/MachineVerifier/{amdgpu => AMDGPU}/writelane_m0.mir | 2 --
14 files changed, 2 insertions(+), 14 deletions(-)
create mode 100644 llvm/test/MachineVerifier/AMDGPU/lit.local.cfg
rename llvm/test/MachineVerifier/{amdgpu => AMDGPU}/register-killed-inside-loop.mir (95%)
rename llvm/test/MachineVerifier/{amdgpu => AMDGPU}/test_g_bitcast.mir (96%)
rename llvm/test/MachineVerifier/{amdgpu => AMDGPU}/test_g_intrinsic.mir (96%)
rename llvm/test/MachineVerifier/{amdgpu => AMDGPU}/test_g_intrinsic_w_side_effects.mir (96%)
rename llvm/test/MachineVerifier/{amdgpu => AMDGPU}/undef-should-only-be-set-on-subreg-defs.mir (93%)
rename llvm/test/MachineVerifier/{amdgpu => AMDGPU}/undef-virt-reg-entry-block.mir (87%)
rename llvm/test/MachineVerifier/{amdgpu => AMDGPU}/undef-virt-reg-nonentry-block.mir (91%)
rename llvm/test/MachineVerifier/{amdgpu => AMDGPU}/verifier-ec-subreg-liveness.mir (96%)
rename llvm/test/MachineVerifier/{amdgpu => AMDGPU}/verifier-implicit-virtreg-invalid-physreg-liveness.mir (94%)
rename llvm/test/MachineVerifier/{amdgpu => AMDGPU}/verifier-pseudo-terminators.mir (95%)
rename llvm/test/MachineVerifier/{amdgpu => AMDGPU}/verify-implicit-def.mir (96%)
rename llvm/test/MachineVerifier/{amdgpu => AMDGPU}/verify-reg-sequence.mir (98%)
rename llvm/test/MachineVerifier/{amdgpu => AMDGPU}/writelane_m0.mir (96%)
diff --git a/llvm/test/MachineVerifier/AMDGPU/lit.local.cfg b/llvm/test/MachineVerifier/AMDGPU/lit.local.cfg
new file mode 100644
index 00000000000000..e07b7d9c0f6c9b
--- /dev/null
+++ b/llvm/test/MachineVerifier/AMDGPU/lit.local.cfg
@@ -0,0 +1,2 @@
+if not "AMDGPU" in config.root.targets:
+ config.unsupported = True
\ No newline at end of file
diff --git a/llvm/test/MachineVerifier/amdgpu/register-killed-inside-loop.mir b/llvm/test/MachineVerifier/AMDGPU/register-killed-inside-loop.mir
similarity index 95%
rename from llvm/test/MachineVerifier/amdgpu/register-killed-inside-loop.mir
rename to llvm/test/MachineVerifier/AMDGPU/register-killed-inside-loop.mir
index a89d0da0fa7345..697a699e6c1dfc 100644
--- a/llvm/test/MachineVerifier/amdgpu/register-killed-inside-loop.mir
+++ b/llvm/test/MachineVerifier/AMDGPU/register-killed-inside-loop.mir
@@ -1,6 +1,5 @@
# FIXME: This should fail the verifier
# XFAIL: *
-# REQUIRES: amdgpu-registered-target
# RUN: not --crash llc -o - -mtriple=amdgcn-amd-amdhsa -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# %1 is live out of %bb.1 through the loop edge, and therefore the kill flag is invalid.
diff --git a/llvm/test/MachineVerifier/amdgpu/test_g_bitcast.mir b/llvm/test/MachineVerifier/AMDGPU/test_g_bitcast.mir
similarity index 96%
rename from llvm/test/MachineVerifier/amdgpu/test_g_bitcast.mir
rename to llvm/test/MachineVerifier/AMDGPU/test_g_bitcast.mir
index abb66e9840611e..2095bf73c2cc87 100644
--- a/llvm/test/MachineVerifier/amdgpu/test_g_bitcast.mir
+++ b/llvm/test/MachineVerifier/AMDGPU/test_g_bitcast.mir
@@ -1,5 +1,4 @@
#RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
-# REQUIRES: amdgpu-registered-target
---
name: test_bitcast
diff --git a/llvm/test/MachineVerifier/amdgpu/test_g_intrinsic.mir b/llvm/test/MachineVerifier/AMDGPU/test_g_intrinsic.mir
similarity index 96%
rename from llvm/test/MachineVerifier/amdgpu/test_g_intrinsic.mir
rename to llvm/test/MachineVerifier/AMDGPU/test_g_intrinsic.mir
index fd03e0432c3263..f96a8e9f0bdd64 100644
--- a/llvm/test/MachineVerifier/amdgpu/test_g_intrinsic.mir
+++ b/llvm/test/MachineVerifier/AMDGPU/test_g_intrinsic.mir
@@ -1,5 +1,4 @@
# RUN: not --crash llc -o - -mtriple=amdgcn -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
-# REQUIRES: amdgpu-registered-target
---
name: test_intrinsic
diff --git a/llvm/test/MachineVerifier/amdgpu/test_g_intrinsic_w_side_effects.mir b/llvm/test/MachineVerifier/AMDGPU/test_g_intrinsic_w_side_effects.mir
similarity index 96%
rename from llvm/test/MachineVerifier/amdgpu/test_g_intrinsic_w_side_effects.mir
rename to llvm/test/MachineVerifier/AMDGPU/test_g_intrinsic_w_side_effects.mir
index 0d72de03ab8ae8..9b4dda14c02764 100644
--- a/llvm/test/MachineVerifier/amdgpu/test_g_intrinsic_w_side_effects.mir
+++ b/llvm/test/MachineVerifier/AMDGPU/test_g_intrinsic_w_side_effects.mir
@@ -1,5 +1,4 @@
# RUN: not --crash llc -o - -mtriple=amdgcn -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
-# REQUIRES: amdgpu-registered-target
---
name: test_intrinsic_w_side_effects
diff --git a/llvm/test/MachineVerifier/amdgpu/undef-should-only-be-set-on-subreg-defs.mir b/llvm/test/MachineVerifier/AMDGPU/undef-should-only-be-set-on-subreg-defs.mir
similarity index 93%
rename from llvm/test/MachineVerifier/amdgpu/undef-should-only-be-set-on-subreg-defs.mir
rename to llvm/test/MachineVerifier/AMDGPU/undef-should-only-be-set-on-subreg-defs.mir
index dc5b467aa73c7d..89d2e76c7fed11 100644
--- a/llvm/test/MachineVerifier/amdgpu/undef-should-only-be-set-on-subreg-defs.mir
+++ b/llvm/test/MachineVerifier/AMDGPU/undef-should-only-be-set-on-subreg-defs.mir
@@ -1,4 +1,3 @@
-# REQUIRES: amdgpu-registered-target
# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=none -o /dev/null %s 2>&1 | FileCheck %s
---
diff --git a/llvm/test/MachineVerifier/amdgpu/undef-virt-reg-entry-block.mir b/llvm/test/MachineVerifier/AMDGPU/undef-virt-reg-entry-block.mir
similarity index 87%
rename from llvm/test/MachineVerifier/amdgpu/undef-virt-reg-entry-block.mir
rename to llvm/test/MachineVerifier/AMDGPU/undef-virt-reg-entry-block.mir
index de4edeaa57c8ec..5a1dedde1e8a20 100644
--- a/llvm/test/MachineVerifier/amdgpu/undef-virt-reg-entry-block.mir
+++ b/llvm/test/MachineVerifier/AMDGPU/undef-virt-reg-entry-block.mir
@@ -1,5 +1,4 @@
# XFAIL: *
-# REQUIRES: amdgpu-registered-target
# RUN: not --crash llc -o - -mtriple=amdgcn-amd-amdhsa -run-pass=none -verify-machineinstrs %s
# FIXME: This should catch the undefined use of %0
diff --git a/llvm/test/MachineVerifier/amdgpu/undef-virt-reg-nonentry-block.mir b/llvm/test/MachineVerifier/AMDGPU/undef-virt-reg-nonentry-block.mir
similarity index 91%
rename from llvm/test/MachineVerifier/amdgpu/undef-virt-reg-nonentry-block.mir
rename to llvm/test/MachineVerifier/AMDGPU/undef-virt-reg-nonentry-block.mir
index 38073fb0b73e9c..ad66be0ac56f95 100644
--- a/llvm/test/MachineVerifier/amdgpu/undef-virt-reg-nonentry-block.mir
+++ b/llvm/test/MachineVerifier/AMDGPU/undef-virt-reg-nonentry-block.mir
@@ -1,6 +1,5 @@
# FIXME: This should fail the verifier
# XFAIL: *
-# REQUIRES: amdgpu-registered-target
# RUN: not --crash llc -o - -mtriple=amdgcn-amd-amdhsa -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# CHECK: *** Bad machine code: Virtual register defs don't dominate all uses. ***
diff --git a/llvm/test/MachineVerifier/amdgpu/verifier-ec-subreg-liveness.mir b/llvm/test/MachineVerifier/AMDGPU/verifier-ec-subreg-liveness.mir
similarity index 96%
rename from llvm/test/MachineVerifier/amdgpu/verifier-ec-subreg-liveness.mir
rename to llvm/test/MachineVerifier/AMDGPU/verifier-ec-subreg-liveness.mir
index 5f14d577224e94..d2a57afb440a04 100644
--- a/llvm/test/MachineVerifier/amdgpu/verifier-ec-subreg-liveness.mir
+++ b/llvm/test/MachineVerifier/AMDGPU/verifier-ec-subreg-liveness.mir
@@ -1,5 +1,4 @@
# RUN: llc -mtriple amdgcn-amd-amdhsa -run-pass=liveintervals,pipeliner -verify-machineinstrs -o - %s | FileCheck %s
-# REQUIRES: amdgpu-registered-target
# This test checks that the verifier doesn't crash on early clobbered subreg arguments.
diff --git a/llvm/test/MachineVerifier/amdgpu/verifier-implicit-virtreg-invalid-physreg-liveness.mir b/llvm/test/MachineVerifier/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir
similarity index 94%
rename from llvm/test/MachineVerifier/amdgpu/verifier-implicit-virtreg-invalid-physreg-liveness.mir
rename to llvm/test/MachineVerifier/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir
index a723ee205ef0fe..a790a55f19bd8c 100644
--- a/llvm/test/MachineVerifier/amdgpu/verifier-implicit-virtreg-invalid-physreg-liveness.mir
+++ b/llvm/test/MachineVerifier/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir
@@ -1,5 +1,4 @@
# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
-# REQUIRES: amdgpu-registered-target
# When the verifier was detecting the invalid liveness for vcc, it would assert when trying to iterate the subregisters of the implicit virtual register use.
diff --git a/llvm/test/MachineVerifier/amdgpu/verifier-pseudo-terminators.mir b/llvm/test/MachineVerifier/AMDGPU/verifier-pseudo-terminators.mir
similarity index 95%
rename from llvm/test/MachineVerifier/amdgpu/verifier-pseudo-terminators.mir
rename to llvm/test/MachineVerifier/AMDGPU/verifier-pseudo-terminators.mir
index 0d79656ce93a6a..9b200ec77f831b 100644
--- a/llvm/test/MachineVerifier/amdgpu/verifier-pseudo-terminators.mir
+++ b/llvm/test/MachineVerifier/AMDGPU/verifier-pseudo-terminators.mir
@@ -1,5 +1,4 @@
# RUN: not --crash llc -mtriple=amdgcn -run-pass=verify -o - %s 2>&1 | FileCheck %s
-# REQUIRES: amdgpu-registered-target
# Make sure that mismatched successors are caught when a _term
# instruction is used
diff --git a/llvm/test/MachineVerifier/amdgpu/verify-implicit-def.mir b/llvm/test/MachineVerifier/AMDGPU/verify-implicit-def.mir
similarity index 96%
rename from llvm/test/MachineVerifier/amdgpu/verify-implicit-def.mir
rename to llvm/test/MachineVerifier/AMDGPU/verify-implicit-def.mir
index 8ca6f2dc75c01d..324e424d563f69 100644
--- a/llvm/test/MachineVerifier/amdgpu/verify-implicit-def.mir
+++ b/llvm/test/MachineVerifier/AMDGPU/verify-implicit-def.mir
@@ -1,4 +1,3 @@
-# REQUIRES: amdgpu-registered-target
# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=none -o /dev/null %s 2>&1 | FileCheck %s
---
diff --git a/llvm/test/MachineVerifier/amdgpu/verify-reg-sequence.mir b/llvm/test/MachineVerifier/AMDGPU/verify-reg-sequence.mir
similarity index 98%
rename from llvm/test/MachineVerifier/amdgpu/verify-reg-sequence.mir
rename to llvm/test/MachineVerifier/AMDGPU/verify-reg-sequence.mir
index 4ce6f70c6651ad..59625cd81ec310 100644
--- a/llvm/test/MachineVerifier/amdgpu/verify-reg-sequence.mir
+++ b/llvm/test/MachineVerifier/AMDGPU/verify-reg-sequence.mir
@@ -1,4 +1,3 @@
-# REQUIRES: amdgpu-registered-target
# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=none -o /dev/null %s 2>&1 | FileCheck %s
---
diff --git a/llvm/test/MachineVerifier/amdgpu/writelane_m0.mir b/llvm/test/MachineVerifier/AMDGPU/writelane_m0.mir
similarity index 96%
rename from llvm/test/MachineVerifier/amdgpu/writelane_m0.mir
rename to llvm/test/MachineVerifier/AMDGPU/writelane_m0.mir
index 270528e55bb5a7..2db6f47a422344 100644
--- a/llvm/test/MachineVerifier/amdgpu/writelane_m0.mir
+++ b/llvm/test/MachineVerifier/AMDGPU/writelane_m0.mir
@@ -7,8 +7,6 @@
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -verify-machineinstrs -run-pass=none -o - %s | FileCheck %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -verify-machineinstrs -run-pass=none -o - %s | FileCheck %s
-# REQUIRES: amdgpu-registered-target
-
---
name: writelane_m0
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