[llvm] [llvm] Ensure that soft float targets don't use float/vector code for memops. (PR #107022)

[Alexander Richardson via llvm-commits]

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@@ -4331,14 +4331,6 @@ MipsTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
   return false;
 }
 
-EVT MipsTargetLowering::getOptimalMemOpType(
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arichardson wrote:

MIPS can use pairs of LWL/LWR LDL/LDR for unaligned accesses, so i64/i32 is always legal here even if unaligned accesses are not possible. (As long as the lowering takes this into account, which I believe it does).

https://github.com/llvm/llvm-project/pull/107022