[llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #106449)

[Alexey Bataev via llvm-commits]

alexey-bataev wrote:

> > Looks like it requires to use a new TTI entry instead of this one, since it does not work as expected for RISCV. I will add it.
> 
> Unless I'm missing something, simple querying the cost of the <6 x i64> type via the existing interfaces should give correct costs on RISCV. I don't know if the work for that has been done for other targets, but I do not see a need for a new TTI call here.

Not quite. getNumberOfParts() transforms this type to <8 x i64> and e.g. returns 4 registers instead of 3 for x86.

https://github.com/llvm/llvm-project/pull/106449