[llvm] [AArch64][NEON] Lower fixed-width add partial reductions to dot product (PR #107078)

via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 3 03:32:21 PDT 2024


github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


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git-clang-format --diff 04ed12ca3f027a3a189d181e5e5880285ebc7916 21f893c14b6c817ff0319511e1296e218d581922 --extensions cpp -- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index f3298a326b..82281c4dd2 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -1995,7 +1995,7 @@ bool AArch64TargetLowering::shouldExpandPartialReductionIntrinsic(
 
   EVT VT = EVT::getEVT(I->getType());
   return VT != MVT::nxv4i32 && VT != MVT::nxv2i64 && VT != MVT::v4i32 &&
-      VT != MVT::v2i32;
+         VT != MVT::v2i32;
 }
 
 bool AArch64TargetLowering::shouldExpandCttzElements(EVT VT) const {
@@ -21783,7 +21783,7 @@ SDValue tryLowerPartialReductionToDot(SDNode *N,
          "Expected a partial reduction node");
 
   if (!Subtarget->isSVEorStreamingSVEAvailable() &&
-          !(Subtarget->isNeonAvailable() && Subtarget->hasDotProd()))
+      !(Subtarget->isNeonAvailable() && Subtarget->hasDotProd()))
     return SDValue();
 
   SDLoc DL(N);

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https://github.com/llvm/llvm-project/pull/107078


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