[llvm] [InstSimplify] Fold expression using basic properties of floor and ceiling function (PR #107107)

[via llvm-commits]

================
@@ -4130,19 +4130,47 @@ static Value *simplifyFCmpInst(unsigned Predicate, Value *LHS, Value *RHS,
   //
   // This catches the 2 variable input case, constants are handled below as a
   // class-like compare.
+  KnownFPClass LHSClass = computeKnownFPClass(LHS, fcAllFlags, /*Depth=*/0, Q);
+  KnownFPClass RHSClass = computeKnownFPClass(RHS, fcAllFlags, /*Depth=*/0, Q);
   if (Pred == FCmpInst::FCMP_ORD || Pred == FCmpInst::FCMP_UNO) {
-    KnownFPClass RHSClass =
-        computeKnownFPClass(RHS, fcAllFlags, /*Depth=*/0, Q);
-    KnownFPClass LHSClass =
-        computeKnownFPClass(LHS, fcAllFlags, /*Depth=*/0, Q);
-
     if (FMF.noNaNs() ||
         (RHSClass.isKnownNeverNaN() && LHSClass.isKnownNeverNaN()))
       return ConstantInt::get(RetTy, Pred == FCmpInst::FCMP_ORD);
 
     if (RHSClass.isKnownAlwaysNaN() || LHSClass.isKnownAlwaysNaN())
       return ConstantInt::get(RetTy, Pred == CmpInst::FCMP_UNO);
   }
+  // floor(x) <= x --> true; x <= ceil(x) --> true
+  if (LHSClass.isKnownNeverNaN() &&
+          match(LHS, m_Intrinsic<Intrinsic::floor>(m_Specific(RHS))) ||
+      RHSClass.isKnownNeverNaN() &&
+          match(RHS, m_Intrinsic<Intrinsic::ceil>(m_Specific(LHS)))) {
+    switch (Pred) {
+    case FCmpInst::FCMP_OLE:
+    case FCmpInst::FCMP_ULE:
+      return getTrue(RetTy);
+    case FCmpInst::FCMP_OGT:
+    case FCmpInst::FCMP_UGT:
+      return getFalse(RetTy);
+    default:
+      break;
+    }
+  }
+  if (RHSClass.isKnownNeverNaN() &&
----------------
c8ef wrote:

If I understand your idea correctly, it seems that we might only need the following transformation. The existing code in InstSimplify should then be able to simplify these to either true or false?

```
define i1 @src_x_floor_ole(float %0) {
  %2 = call float @llvm.floor.f32(float %0)
  %3 = fcmp ole float %2, %0
  ret i1 %3
}

define i1 @tgt_x_floor_ole(float %0) {
  %2 = call float @llvm.floor.f32(float %0)
  %3 = fcmp ord float %2, %0
  ret i1 %3
}
```

https://github.com/llvm/llvm-project/pull/107107