[llvm] [DAGCombiner] cache negative result from getMergeStoreCandidates() (PR #106949)

via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 4 05:17:40 PDT 2024


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git-clang-format --diff 95d2d1cba0e1428718bbdce0504292f62b212920 a477709ee115e1d18f1e3c2b6c0b05868eddf815 --extensions cpp -- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index fbed4b94f9..8d70426766 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -20500,8 +20500,9 @@ bool DAGCombiner::mergeStoresOfConstantsOrVecElts(
   return true;
 }
 
-SDNode *DAGCombiner::getStoreMergeCandidates(
-    StoreSDNode *St, SmallVectorImpl<MemOpLink> &StoreNodes) {
+SDNode *
+DAGCombiner::getStoreMergeCandidates(StoreSDNode *St,
+                                     SmallVectorImpl<MemOpLink> &StoreNodes) {
   // This holds the base pointer, index, and the offset in bytes from the base
   // pointer. We must have a base and an offset. Do not handle stores to undef
   // base pointers.
@@ -20598,7 +20599,6 @@ SDNode *DAGCombiner::getStoreMergeCandidates(
     return (BasePtr.equalBaseIndex(Ptr, DAG, Offset));
   };
 
-
   // We are looking for a root node which is an ancestor to all mergable
   // stores. We search up through a load, to our root and then down
   // through all children. For instance we will find Store{1,2,3} if

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https://github.com/llvm/llvm-project/pull/106949


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