[llvm] [AMDGPU] Add MachineVerifier check to detect illegal copies from vector register to SGPR (PR #105494)

[Aditi Medhane via llvm-commits]

================
@@ -34,36 +34,35 @@ body:             |
 
 ---
 # GCN-LABEL: name: phi_moveimm_subreg_input
-# GCN: %{{[0-9]+}}:sreg_64 = PHI %{{[0-9]+}}, %bb.3, %{{[0-9]+}}, %bb.1
+# GCN: %{{[0-9]+}}:vgpr_32 = PHI %{{[0-9]+}}, %bb.3, %{{[0-9]+}}, %bb.1
 name:            phi_moveimm_subreg_input
 tracksRegLiveness: true
 body:             |
   bb.0:
     successors: %bb.1
     liveins: $sgpr0, $sgpr1
 
-    %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    %0:vreg_64 = V_MOV_B64_e32 0, implicit $exec
 
     %4:sreg_32 = COPY $sgpr0
     %5:sreg_32 = COPY $sgpr1
 
   bb.1:
     successors: %bb.2
-    undef %2.sub0:sreg_64 = S_ADD_U32 %4, %5, implicit-def $scc
+    %2:sreg_32 = S_ADD_U32 %4, %5, implicit-def $scc
     S_BRANCH %bb.2
 
   bb.2:
     successors: %bb.3
-    %3:sreg_64 = PHI %1, %bb.3, %2, %bb.1
+    %3:sreg_32 = PHI %1, %bb.3, %2, %bb.1
----------------
AditiRM wrote:

Can you please explain why do you think we should be introducing subreg in PHI input itself ?

https://github.com/llvm/llvm-project/pull/105494