[llvm] [RISCV] Rematerialize vmv.v.i (PR #107550)

[Luke Lau via llvm-commits]

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@@ -519,6 +519,7 @@ define void @vselect_legalize_regression(<vscale x 16 x double> %a, <vscale x 16
 ; CHECK-NEXT:    vmv.v.i v24, 0
 ; CHECK-NEXT:    vmerge.vvm v16, v24, v16, v0
 ; CHECK-NEXT:    vmv1r.v v0, v7
+; CHECK-NEXT:    vmv.v.i v24, 0
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lukel97 wrote:

This is an example of an m8 register now being evicted due to the change in spill weights, even when nothing here actually needs to be spilled/remateralized.

https://github.com/llvm/llvm-project/pull/107550