[llvm] [SPIR-V] Improve correctness of emitted MIR between passes for branching instructions (PR #106966)

[via llvm-commits]

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git-clang-format --diff 0fa78b6c7bd43c2498700a98c47a02cf4fd06388 b4df7434fefb7ef4fa081c5d17f00466359f034c --extensions cpp -- llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
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diff --git a/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp b/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
index 6bf08be6bb..df1b75bc1c 100644
--- a/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
@@ -839,7 +839,7 @@ static void processSwitches(MachineFunction &MF, SPIRVGlobalRegistry *GR,
   // BlockAddress operands were used to keep information between passes,
   // let's undo the "address taken" status to reflect that Succ doesn't
   // actually correspond to an IR-level basic block.
-  for (MachineBasicBlock *Succ: ClearAddressTaken)
+  for (MachineBasicBlock *Succ : ClearAddressTaken)
     Succ->setAddressTakenIRBlock(nullptr);
 }
 

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https://github.com/llvm/llvm-project/pull/106966