The Week Of Monday 4 September 2023 Archives by author
Starting: Mon Sep 4 00:03:43 PDT 2023
Ending: Sun Sep 10 23:51:24 PDT 2023
Messages: 4387
- [PATCH] D158939: Protect against null dereferences
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D157986: [Cmake] Make sure MSVC knows LLVM source files are UTF-8 encoded
Aaron Ballman via Phabricator via llvm-commits
- [llvm] [openacc][openmp] Add dialect representation for acc atomic operations (PR #65493)
Aart Bik via llvm-commits
- [llvm] Use host platform specific error message substitution in lit tests (PR #65328)
Abhina Sree via llvm-commits
- [llvm] [test] Use host platform specific error message substitution in lit tests (PR #65328)
Abhina Sree via llvm-commits
- [llvm] [test] Use host platform specific error message substitution in lit tests (PR #65328)
Abhina Sree via llvm-commits
- [llvm] [test] Use host platform specific error message substitution in lit tests (PR #65328)
Abhina Sree via llvm-commits
- [llvm] [test] Use host platform specific error message substitution in lit tests (PR #65328)
Abhina Sree via llvm-commits
- [llvm] [test] Use host platform specific error message substitution in lit tests (PR #65328)
Abhina Sree via llvm-commits
- [llvm] [test] Use host platform specific error message substitution in lit tests (PR #65328)
Abhina Sree via llvm-commits
- [PATCH] D159336: Statically analyze likely and unlikely blocks based on metadata
Aditya Kumar via Phabricator via llvm-commits
- [PATCH] D159336: Statically analyze likely and unlikely blocks based on metadata
Aditya Kumar via Phabricator via llvm-commits
- [llvm] [NFC]Add assert to avoid possibly deref nullptr (PR #65564)
Adrian Prantl via llvm-commits
- [llvm] [NFC]Add assert to avoid possibly deref nullptr (PR #65564)
Adrian Prantl via llvm-commits
- [llvm] [NFC]Add assert to avoid possibly deref nullptr (PR #65564)
Adrian Prantl via llvm-commits
- [llvm] [llvm][dwarf][rfc][donotcommit] Enable print of ranges addresses from .debug_info.dwo (PR #65516)
Adrian Prantl via llvm-commits
- [llvm] [llvm][dwarf][rfc][donotcommit] Enable print of ranges addresses from .debug_info.dwo (PR #65516)
Adrian Prantl via llvm-commits
- [llvm] [llvm][dwarf][rfc][donotcommit] Enable print of ranges addresses from .debug_info.dwo (PR #65516)
Adrian Prantl via llvm-commits
- [llvm] [llvm][dwarf][rfc][donotcommit] Enable print of ranges addresses from .debug_info.dwo (PR #65516)
Adrian Prantl via llvm-commits
- [PATCH] D158980: [DebugInfo][NFC] Move ObjC Selector name handling to lib DebugInfo
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D158980: [DebugInfo][NFC] Move ObjC Selector name handling to lib DebugInfo
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D159471: [DWARFVerifier] Allow ObjectiveC names in dwarf_debug tables
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D159484: [DebugInfo] Parse StrOffsets section if needed
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D151465: [Dexter] Remove builder from Dexter
Adrian Prantl via Phabricator via llvm-commits
- [llvm] [Github] Add llvm-exegesis PR subscribers team (PR #65199)
Aiden Grossman via llvm-commits
- [llvm] [Github] Add llvm-exegesis PR subscribers team (PR #65199)
Aiden Grossman via llvm-commits
- [llvm] [Github] Add llvm-exegesis PR subscribers team (PR #65199)
Aiden Grossman via llvm-commits
- [llvm] ca8dbdc - [llvm-exegesis] Add error for subprocess and dummy perf counters
Aiden Grossman via llvm-commits
- [llvm] c4a769b - [llvm-exegesis] Print errno on failures in subprocess
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis] Make SubprocessMemoryTest use PIDs (PR #65245)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis] Add error handling for fork failures (PR #65186)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis] Add error handling for fork failures (PR #65186)
Aiden Grossman via llvm-commits
- [llvm] [Github] Add test directories to IR/Transforms/Analysis teams (PR #65196)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis] Add error handling for fork failures (PR #65186)
Aiden Grossman via llvm-commits
- [PATCH] D157682: [llvm-exegesis] Print errno on failures in subprocess
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D157686: [llvm-exegesis] Add error for subprocess and dummy perf counters
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D158052: [llvm-exegesis] Add explicit error for segmenetation faults
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D157686: [llvm-exegesis] Add error for subprocess and dummy perf counters
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D157682: [llvm-exegesis] Print errno on failures in subprocess
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D138847: MC/DC in LLVM Source-Based Code Coverage: llvm-cov visualization
Alan Phipps via Phabricator via llvm-commits
- [llvm] 0e0ff85 - [GuardWidening] Refactor to work with the list of checks to widen/hoist
Aleksandr Popov via llvm-commits
- [PATCH] D157729: [GuardWidening] Widen widenable conditions instead of branches
Aleksandr Popov via Phabricator via llvm-commits
- [PATCH] D157689: [GuardWidening] Refactor to work with the list of checks to widen/hoist
Aleksandr Popov via Phabricator via llvm-commits
- [llvm] [llvm-cov] - Output better error message when the error kind is `coveragemap_error::malforme`. (PR #65264)
Alex Brachet via llvm-commits
- [llvm] [RISCV] Add more files to .github/CODEOWNERS (PR #65234)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Add more files to .github/CODEOWNERS (PR #65234)
Alex Bradbury via llvm-commits
- [PATCH] D159219: [RISCV] Cost illegally typed insert/extract elements correctly
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D158396: [RISCV] Add missed fcsr spill and restore in interrupt
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D151107: [IR] Add GraalVM calling conventions
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D158492: [RISCV] Add CSR RegisterClass and save/restore fcsr in interrupt
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D157694: [RISCV][MC]Add support for Binary MCExpr
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D158830: [RISCV][MC] Allow symbol diff expression directly as LI operand
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D158673: [SDAG][RISCV] Avoid neg instructions when lowering atomic_load_sub with a constant rhs
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D158759: [RISCV] Add a pass to rewrite rd to x0 for instrs whose return values are unused
Alex Bradbury via Phabricator via llvm-commits
- [compiler-rt] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)
Alex Voicu via llvm-commits
- [compiler-rt] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)
Alex Voicu via llvm-commits
- [llvm] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)
Alex Voicu via llvm-commits
- [llvm] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)
Alex Voicu via llvm-commits
- [compiler-rt] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)
Alex Voicu via llvm-commits
- [llvm] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)
Alex Voicu via llvm-commits
- [compiler-rt] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)
Alex Voicu via llvm-commits
- [PATCH] D155769: [HIP][Clang][docs][RFC] Add documentation for C++ Parallel Algorithm Offload
Alex Voicu via Phabricator via llvm-commits
- [llvm] [update_cc_test_checks] Use lit's shell to run commands (PR #65333)
Alexander Richardson via llvm-commits
- [llvm] [update_cc_test_checks] Use lit's shell to run commands (PR #65333)
Alexander Richardson via llvm-commits
- [llvm] [update_cc_test_checks] Use lit's shell to run commands (PR #65333)
Alexander Richardson via llvm-commits
- [llvm] [update_cc_test_checks] Use lit's shell to run commands (PR #65333)
Alexander Richardson via llvm-commits
- [llvm] [UpdateTestChecks] Add @llvm/pr-subscribers-testing-tools to CODEOWNERS (PR #65338)
Alexander Richardson via llvm-commits
- [llvm] [UpdateTestChecks] Add @llvm/pr-subscribers-testing-tools to CODEOWNERS (PR #65338)
Alexander Richardson via llvm-commits
- [llvm] [UpdateTestChecks] Add @llvm/pr-subscribers-testing-tools to CODEOWNERS (PR #65338)
Alexander Richardson via llvm-commits
- [llvm] [update_cc_test_checks] Use lit's shell to run commands (PR #65333)
Alexander Richardson via llvm-commits
- [llvm] [update_cc_test_checks] Use lit's shell to run commands (PR #65333)
Alexander Richardson via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Alexander Richardson via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Alexander Richardson via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Alexander Richardson via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Alexander Richardson via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Alexander Richardson via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Alexander Richardson via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Alexander Richardson via llvm-commits
- [llvm] [llvm][dwarf][rfc][donotcommit] Enable print of ranges addresses from .debug_info.dwo (PR #65516)
Alexander Yermolovich via llvm-commits
- [llvm] [llvm][dwarf][rfc][donotcommit] Enable print of ranges addresses from .debug_info.dwo (PR #65516)
Alexander Yermolovich via llvm-commits
- [llvm] [llvm][dwarf][rfc][donotcommit] Enable print of ranges addresses from .debug_info.dwo (PR #65516)
Alexander Yermolovich via llvm-commits
- [llvm] [llvm][dwarf][rfc][donotcommit] Enable print of ranges addresses from .debug_info.dwo (PR #65516)
Alexander Yermolovich via llvm-commits
- [llvm] [llvm][dwarf][rfc][donotcommit] Enable print of ranges addresses from .debug_info.dwo (PR #65516)
Alexander Yermolovich via llvm-commits
- [llvm] [llvm][dwarf][rfc][donotcommit] Enable print of ranges addresses from .debug_info.dwo (PR #65516)
Alexander Yermolovich via llvm-commits
- [llvm] [llvm][dwarf][rfc][donotcommit] Enable print of ranges addresses from .debug_info.dwo (PR #65516)
Alexander Yermolovich via llvm-commits
- [PATCH] D159374: [llvm][dwarf][rfc][donotcommit] Enable print of ranges addresses from .debug_info.dwo
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D159374: [llvm][dwarf][rfc][donotcommit] Enable print of ranges addresses from .debug_info.dwo
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D159452: [AMDGPU] Machine scheduler should take care of the 'amdgpu-num-vgp' function attribute
Alexander via Phabricator via llvm-commits
- [PATCH] D159452: [AMDGPU] Machine scheduler should take care of the 'amdgpu-num-vgp' function attribute
Alexander via Phabricator via llvm-commits
- [PATCH] D159452: [AMDGPU] Machine scheduler should take care of the 'amdgpu-num-vgp' function attribute
Alexander via Phabricator via llvm-commits
- [PATCH] D159452: [AMDGPU] Machine scheduler should take care of the 'amdgpu-num-vgp' function attribute
Alexander via Phabricator via llvm-commits
- [PATCH] D159452: [AMDGPU] Machine scheduler should take care of the 'amdgpu-num-vgp' function attribute
Alexander via Phabricator via llvm-commits
- [PATCH] D159452: [AMDGPU] Machine scheduler should take care of the 'amdgpu-num-vgp' function attribute
Alexander via Phabricator via llvm-commits
- [PATCH] D155579: [Windows] Avoid using FileIndex for unique IDs on network mounts
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D155579: [Windows] Avoid using FileIndex for unique IDs on network mounts
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D133441: [SLP] Vectorize mutual horizontal reductions.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D133361: [BPF] Attribute btf_decl_tag("ctx") for structs
Alexei Starovoitov via Phabricator via llvm-commits
- [llvm] SLP/RISCV: add test for vectorized ctpop, like in X86 (PR #65330)
Alexey Bataev via llvm-commits
- [llvm] 09b8bbd - [SLP][NFC]Reorder indeces instead of real values, NFC.
Alexey Bataev via llvm-commits
- [llvm] [SLP]Do not early exit if the number of unique elements is non-power-of-2. (PR #65476)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Do not early exit if the number of unique elements is non-power-of-2. (PR #65476)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Do not early exit if the number of unique elements is non-power-of-2. (PR #65476)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Do not early exit if the number of unique elements is non-power-of-2. (PR #65476)
Alexey Bataev via llvm-commits
- [llvm] 8d933ea - [SLP][NFC]Use SmallDensetSet for lookup instead of ArrayRef, NFC.
Alexey Bataev via llvm-commits
- [llvm] [SLP]Do not early exit if the number of unique elements is non-power-of-2. (PR #65476)
Alexey Bataev via llvm-commits
- [llvm] 25fd5e6 - [SLP][NFC]Update tests checks, NFC.
Alexey Bataev via llvm-commits
- [llvm] [SLP]Do not early exit if the number of unique elements is non-power-of-2. (PR #65476)
Alexey Bataev via llvm-commits
- [llvm] SLP/RISCV: add test for vectorized ctpop, like in X86 (PR #65330)
Alexey Bataev via llvm-commits
- [llvm] SLP/RISCV: add test for vectorized ctpop, like in X86 (PR #65330)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Do not early exit if the number of unique elements is non-power-of-2. (PR #65476)
Alexey Bataev via llvm-commits
- [llvm] 5bab59d - [SLP]Try to vectorize scalars, being vectorized already, but does not need to be scheduled.
Alexey Bataev via llvm-commits
- [PATCH] D159205: [SLP]Try to vectorize scalars, being vectorized already, but do not need to be scheduled.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D158449: [IR]Add NumSrcElts param to is..Mask static function in ShuffleVectorInst.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D154738: [SLP]Introduce isLegalVectorOp to check if the vector instruction is going to be scalarized.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D149742: [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D148855: [SLP]Improve tryToGatherExtractElements by using per-register analysis.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D158449: [IR]Add NumSrcElts param to is..Mask static function in ShuffleVectorInst.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D99750: [LV, VP]VP intrinsics support for the Loop Vectorizer
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D149742: [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D149742: [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D159205: [SLP]Try to vectorize scalars, being vectorized already, but do not need to be scheduled.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D159356: [AArch64] Check FeatureAddrLSLFast to fold base address with scale
Allen zhong via Phabricator via llvm-commits
- [PATCH] D84115: [Debuginfo][Codegen] (2/7) Support for DW_OP_implicit_pointer for named and unnamed variables (second strategy).
Alok Kumar Sharma via Phabricator via llvm-commits
- [llvm] 69d8ca2 - [GlobalISel] Regenerate ptradd reassociation tests checks.
Amara Emerson via llvm-commits
- [llvm] 59cbee4 - [GlobalISel] Fix an incorrect ptradd reassoc test. NFC.
Amara Emerson via llvm-commits
- [llvm] 0065640 - [GlobalISel] Look through a G_PTR_ADD's def register instead of it's source operand's
Amara Emerson via llvm-commits
- [llvm] f51b799 - [GlobalISel] Precommit a ptradd combine test.
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Fix G_PTR_ADD immediate chain combine using the wrong im… (PR #65271)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Fix G_PTR_ADD immediate chain combine using the wrong im… (PR #65271)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Fix G_PTR_ADD immediate chain combine using the wrong im… (PR #65271)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Fix G_PTR_ADD immediate chain combine using the wrong im… (PR #65271)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Fix G_PTR_ADD immediate chain combine using the wrong im… (PR #65271)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add constant-folding of FP binops to combiner. (PR #65230)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Commute G_FMUL and G_FADD constant LHS to RHS. (PR #65298)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Commute G_FMUL and G_FADD constant LHS to RHS. (PR #65298)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Commute G_FMUL and G_FADD constant LHS to RHS. (PR #65298)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Commute G_FMUL and G_FADD constant LHS to RHS. (PR #65298)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Commute G_FMUL and G_FADD constant LHS to RHS. (PR #65298)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Commute G_FMUL and G_FADD constant LHS to RHS. (PR #65298)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add constant-folding of FP binops to combiner. (PR #65230)
Amara Emerson via llvm-commits
- [llvm] [RISCV][GISel] Add gisel-commandline-option.ll similar to AArch64. (PR #65299)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Constant fold sitofp/uitofp of 0. (PR #65307)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Constant fold sitofp/uitofp of 0. (PR #65307)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Constant fold sitofp/uitofp of 0. (PR #65307)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Constant fold sitofp/uitofp of 0. (PR #65307)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel][AArch64] Combine unmerge(G_EXT v, undef) to unmerge(v). (PR #65263)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel][AArch64] Combine unmerge(G_EXT v, undef) to unmerge(v). (PR #65263)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel][AArch64] Combine unmerge(G_EXT v, undef) to unmerge(v). (PR #65263)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel][AArch64] Combine unmerge(G_EXT v, undef) to unmerge(v). (PR #65263)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel][AArch64] Combine unmerge(G_EXT v, undef) to unmerge(v). (PR #65263)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel][AArch64] Combine unmerge(G_EXT v, undef) to unmerge(v). (PR #65263)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel][AArch64] Combine unmerge(G_EXT v, undef) to unmerge(v). (PR #65263)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel][AArch64] Combine unmerge(G_EXT v, undef) to unmerge(v). (PR #65263)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel][AArch64] Combine unmerge(G_EXT v, undef) to unmerge(v). (PR #65263)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel][AArch64] Combine unmerge(G_EXT v, undef) to unmerge(v). (PR #65263)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Commute G_FMUL and G_FADD constant LHS to RHS. (PR #65298)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Commute G_FMUL and G_FADD constant LHS to RHS. (PR #65298)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Fold fmul x, 1.0 -> x (PR #65379)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Fold fmul x, 1.0 -> x (PR #65379)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Fold fmul x, 1.0 -> x (PR #65379)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Fold fmul x, 1.0 -> x (PR #65379)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Fold fmul x, 1.0 -> x (PR #65379)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Fold fmul x, 1.0 -> x (PR #65379)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Fold fmul x, 1.0 -> x (PR #65379)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Fold fmul x, 1.0 -> x (PR #65379)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Fold fmul x, 1.0 -> x (PR #65379)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add constant-folding of FP binops to combiner. (PR #65230)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add constant-folding of FP binops to combiner. (PR #65230)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add constant-folding of FP binops to combiner. (PR #65230)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add constant-folding of FP binops to combiner. (PR #65230)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add constant-folding of FP binops to combiner. (PR #65230)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add constant-folding of FP binops to combiner. (PR #65230)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Look through COPY and G_BITCAST while selecting fcvtl2 (fpext) (PR #65463)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Look through COPY and G_BITCAST while selecting fcvtl2 (fpext) (PR #65463)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Select UMULL instruction (PR #65469)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Select UMULL instruction (PR #65469)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Select UMULL instruction (PR #65469)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Select UMULL instruction (PR #65469)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add constant-folding of FP binops to combiner. (PR #65230)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add constant folding support for G_FMA/G_FMAD in the combiner. (PR #65659)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add constant folding support for G_FMA/G_FMAD in the combiner. (PR #65659)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add constant folding support for G_FMA/G_FMAD in the combiner. (PR #65659)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add constant folding support for G_FMA/G_FMAD in the combiner. (PR #65659)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add constant folding support for G_FMA/G_FMAD in the combiner. (PR #65659)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Select llvm.aarch64.neon.ld* intrinsics (PR #65630)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Select llvm.aarch64.neon.ld* intrinsics (PR #65630)
Amara Emerson via llvm-commits
- [llvm] [AArch64] Move LDR_PXI from isStoreToStackSlot to isLoadFromStackSlot (PR #65658)
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- [llvm] [RISCV][GISel] Add initial pre-legalizer combiners copying from AArch64. (PR #65663)
Amara Emerson via llvm-commits
- [llvm] [RISCV][GISel] Add initial pre-legalizer combiners copying from AArch64. (PR #65663)
Amara Emerson via llvm-commits
- [llvm] [RISCV][GISel] Add initial pre-legalizer combiners copying from AArch64. (PR #65663)
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- [llvm] 730e8f6 - [AArch64][GlobalISel] Fix global offset folding combine inserting MIs into wrong place.
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Add constant folding support for G_FMA/G_FMAD in the combiner. (PR #65659)
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Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Add lowering for constant BIT/BIF/BSP (PR #65897)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Add lowering for constant BIT/BIF/BSP (PR #65897)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Add lowering for constant BIT/BIF/BSP (PR #65897)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Add lowering for constant BIT/BIF/BSP (PR #65897)
Amara Emerson via llvm-commits
- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
Amara Emerson via llvm-commits
- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
Amara Emerson via llvm-commits
- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
Amara Emerson via llvm-commits
- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
Amara Emerson via llvm-commits
- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
Amara Emerson via llvm-commits
- [PATCH] D157591: [AArch64][GlobalISel] Optimize Combine Funnel Shift
Amara Emerson via Phabricator via llvm-commits
- [PATCH] D151911: [LVI] Handle icmp of ashr.
Amara Emerson via Phabricator via llvm-commits
- [PATCH] D157984: [llvm][ARM][Neon][big-endian] Fix incorrect indexing of lanes
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- [llvm] [BOLT] Switch BF::computeHash to xxh3 (PR #65437)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Switch BF::computeHash to xxh3 (PR #65437)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Switch BF::computeHash to xxh3 (PR #65437)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Switch BF::computeHash to xxh3 (PR #65437)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Switch BF::computeHash to xxh3 (PR #65437)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Switch BF::computeHash to xxh3 (PR #65437)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][test] Fix patch-entries for aarch64 buildbot (PR #65690)
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Amir Ayupov via llvm-commits
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Amir Ayupov via llvm-commits
- [llvm] [BOLT][test] Fix patch-entries for aarch64 buildbot (PR #65690)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][test] Fix patch-entries for aarch64 buildbot (PR #65690)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][test] Fix patch-entries for aarch64 buildbot (PR #65690)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][test] Fix patch-entries for aarch64 buildbot (PR #65690)
Amir Ayupov via llvm-commits
- [PATCH] D159460: [BOLT][NFC] Speedup YAML profile processing
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Amir Ayupov via Phabricator via llvm-commits
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Amir Ayupov via Phabricator via llvm-commits
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Amir Ayupov via Phabricator via llvm-commits
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Amir Ayupov via Phabricator via llvm-commits
- [llvm] f0b2f69 - [AIX][TLS] Generate .extern and .ref references to __tls_get_addr for local-exec accesses.
Amy Kwan via llvm-commits
- [llvm] f94f853 - Revert "[AIX][TLS] Generate .extern and .ref references to __tls_get_addr for local-exec accesses."
Amy Kwan via llvm-commits
- [llvm] 8bdbee8 - [AIX][TLS] Add target attribute for -maix-small-local-exec-tls option.
Amy Kwan via llvm-commits
- [llvm] 3f46e54 - [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)
Amy Kwan via llvm-commits
- [llvm] 23f144e - [NFC] Add extra documentation for GetSymbolFromOperand() in PPCMCInstLower.cpp
Amy Kwan via llvm-commits
- [PATCH] D151335: [AIX][TLS] Generate .extern and .ref references to __tls_get_addr for local-exec accesses.
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D155600: [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D155600: [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D158328: [PowerPC] Merge rotate and clear into single instruction.
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D155600: [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D155730: [PowerPC] Add a pass to merge all of the constant global arrays into one pool.
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D156203: [AIX][TLS] Add target attribute for -maix-small-local-exec-tls option.
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D155600: [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D155544: [AIX][TLS][clang] Add -maix-small-local-exec-tls clang option.
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- [compiler-rt] [sanitizer_symbolizer] Symbolizer Markup for linux. (PR #65543)
Andres Villegas via llvm-commits
- [compiler-rt] [sanitizer_symbolizer] Symbolizer Markup for linux. (PR #65543)
Andres Villegas via llvm-commits
- [compiler-rt] [sanitizer_symbolizer] Symbolizer Markup for linux. (PR #65543)
Andres Villegas via llvm-commits
- [compiler-rt] [sanitizer_symbolizer] Symbolizer Markup for linux. (PR #65543)
Andres Villegas via llvm-commits
- [compiler-rt] [sanitizer_symbolizer] Symbolizer Markup for linux. (PR #65543)
Andres Villegas via llvm-commits
- [compiler-rt] 8dbcf8e - [DFSAN] Add support for sscanf.
Andrew Browne via llvm-commits
- [llvm] [lit] Echo full RUN lines in case of external shells (PR #65267)
Andrzej Warzyński via llvm-commits
- [llvm] [lit] Are all RUN lines skipped in windows cmd? (PR #65242)
Andrzej Warzyński via llvm-commits
- [PATCH] D154157: [LV] Cost model for out-of-loop reductions
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D157729: [GuardWidening] Widen widenable conditions instead of branches
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D127884: [Draft][LangRef] Document `elementtype` attribute requirement on atomic memory intrinsics.
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D154157: [LV] Cost model for out-of-loop reductions
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D154157: [LV] Cost model for out-of-loop reductions
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D157549: [LV] Add debug output to print interleaved groups
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D127884: [Draft][LangRef] Document `elementtype` attribute requirement on atomic memory intrinsics.
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D157549: [LV] Add debug output to print interleaved groups
Anna Thomas via Phabricator via llvm-commits
- [llvm] [NFC] Update coroutine intrinsics documentation and few remaining tests to opaque pointers (PR #65698)
Anton Korobeynikov via llvm-commits
- [llvm] [NFC] Update coroutine intrinsics documentation and few remaining tests to opaque pointers (PR #65698)
Anton Korobeynikov via llvm-commits
- [llvm] [NFC] Update coroutine intrinsics documentation and few remaining tests to opaque pointers (PR #65698)
Anton Korobeynikov via llvm-commits
- [llvm] [NFC] Update coroutine intrinsics documentation and few remaining tests to opaque pointers (PR #65698)
Anton Korobeynikov via llvm-commits
- [llvm] [NFC] Update coroutine intrinsics documentation and few remaining tests to opaque pointers (PR #65698)
Anton Korobeynikov via llvm-commits
- [llvm] [NFC] Update coroutine intrinsics documentation and few remaining tests to opaque pointers (PR #65698)
Anton Korobeynikov via llvm-commits
- [llvm] [NFC] Update coroutine intrinsics documentation and few remaining tests to opaque pointers (PR #65698)
Anton Korobeynikov via llvm-commits
- [llvm] [NFC] Update coroutine intrinsics documentation and few remaining tests to opaque pointers (PR #65698)
Anton Korobeynikov via llvm-commits
- [llvm] [BasicBlockSections] Introduce the basic block sections profile version 1. (PR #65506)
Anton Korobeynikov via llvm-commits
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Anton Korobeynikov via llvm-commits
- [llvm] [NFC] Update coroutine intrinsics documentation and few remaining tests to opaque pointers (PR #65698)
Anton Korobeynikov via llvm-commits
- [llvm] 282bf21 - [llvm-nm][MachO] Add support for `MH_FILESET`
Antonio Frighetto via llvm-commits
- [PATCH] D159294: [llvm-nm][MachO] Add support for `MH_FILESET`
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D159294: [llvm-nm][MachO] Add support for `MH_FILESET`
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D126122: Fix RUNPATH not accounting for LLVM_ENABLE_PER_TARGET_RUNTIME_DIR
Arcadiy Ivanov via Phabricator via llvm-commits
- [compiler-rt] [Fuzzer] Optimize UpdateFeatureFrequency (PR #65288)
Arseny Kapoulkine via llvm-commits
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Arseny Kapoulkine via llvm-commits
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Arseny Kapoulkine via llvm-commits
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Arseny Kapoulkine via llvm-commits
- [compiler-rt] [Fuzzer] Update build.sh to fix build errors (PR #65289)
Arseny Kapoulkine via llvm-commits
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Arseny Kapoulkine via llvm-commits
- [compiler-rt] [Fuzzer] Optimize UpdateFeatureFrequency (PR #65288)
Arseny Kapoulkine via llvm-commits
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Arseny Kapoulkine via llvm-commits
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Arseny Kapoulkine via llvm-commits
- [compiler-rt] [Fuzzer] Optimize UpdateFeatureFrequency (PR #65288)
Arseny Kapoulkine via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX][NFC] Explicitly specify the matching type for Int32reg (PR #65527)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] Reland "[CUDA][HIP] Fix overloading resolution in global variable ini… (PR #65606)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65799)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65799)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65799)
Artem Belevich via llvm-commits
- [llvm] [RISCV][GISel] Add gisel-commandline-option.ll similar to AArch64. (PR #65299)
Artem Dergachev via llvm-commits
- [llvm] [RISCV][GISel] Add gisel-commandline-option.ll similar to AArch64. (PR #65299)
Artem Dergachev via llvm-commits
- [llvm] b41e5ce - [llvm-c-test] Remove obsolete opaque pointer test
Arthur Eubanks via llvm-commits
- [llvm] [GitHub] Add teams for the inliner (PR #65567)
Arthur Eubanks via llvm-commits
- [compiler-rt] Add flags to dump IR to a file before and after LLVM passes (PR #65179)
Arthur Eubanks via llvm-commits
- [llvm] Add flags to dump IR to a file before and after LLVM passes (PR #65179)
Arthur Eubanks via llvm-commits
- [llvm] Scheduled buildkite pipeline generation (PR #65574)
Arthur Eubanks via llvm-commits
- [llvm] Scheduled buildkite pipeline generation (PR #65574)
Arthur Eubanks via llvm-commits
- [llvm] Scheduled buildkite pipeline generation (PR #65574)
Arthur Eubanks via llvm-commits
- [llvm] Scheduled buildkite pipeline generation (PR #65574)
Arthur Eubanks via llvm-commits
- [llvm] Scheduled buildkite pipeline generation (PR #65574)
Arthur Eubanks via llvm-commits
- [llvm] d5c6bd1 - [gn build] Manually port 46f3ade
Arthur Eubanks via llvm-commits
- [PATCH] D155617: Pass to annotate functions with appropriate optimization level.
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D155617: Pass to annotate functions with appropriate optimization level.
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D155617: Pass to annotate functions with appropriate optimization level.
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D153932: [AliasAnalysis] Mark fences as not Mod'ing unescaped local values
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D155617: Pass to annotate functions with appropriate optimization level.
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D155617: Pass to annotate functions with appropriate optimization level.
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D155617: Pass to annotate functions with appropriate optimization level.
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D155617: Pass to annotate functions with appropriate optimization level.
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D158600: [InferAlignment] Enable InferAlignment pass by default
Arthur Eubanks via Phabricator via llvm-commits
- [polly] ebf0169 - Bug fix for multi-line labels in CFG dot graph
Artur Pilipenko via llvm-commits
- [PATCH] D159207: Bug fix for D154102, where multi-line labels would get incorrect header splitter line in CFG dot
Artur Pilipenko via Phabricator via llvm-commits
- [PATCH] D117929: [XRay] Add support for RISCV
Ashwin Poduval via Phabricator via llvm-commits
- [PATCH] D117929: [XRay] Add support for RISCV
Ashwin Poduval via Phabricator via llvm-commits
- [PATCH] D156852: [AMDGPU] Use inreg for hint to preload kernel arguments
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D156852: [AMDGPU] Use inreg for hint to preload kernel arguments
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D159439: [AMDGPU] Add utilities to track number of user SGPRs. NFC.
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D156853: [AMDGPU] Add metadata to track preloaded arguments
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D156853: [AMDGPU] Add metadata to track preloaded arguments
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D159452: [AMDGPU] Machine scheduler should take care of the 'amdgpu-num-vgp' function attribute
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D159459: [AMDGPU] Add ASM and MC updates for preloading kernargs
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D159459: [AMDGPU] Add ASM and MC updates for preloading kernargs
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D159459: [AMDGPU] Add ASM and MC updates for preloading kernargs
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D156852: [AMDGPU] Use inreg for hint to preload kernel arguments
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D156853: [AMDGPU] Add metadata to track preloaded arguments
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D158579: [AMDGPU] Add DAG ISel support for preloaded kernel arguments
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- [llvm] cmake: do not force building with the install name dir (PR #65656)
Ben Boeckel via llvm-commits
- [llvm] [clang][deps] Optimize command line generation (PR #65412)
Ben Langmuir via llvm-commits
- [llvm] [clang][deps] Optimize command line generation (PR #65412)
Ben Langmuir via llvm-commits
- [llvm] [llvm][ADT] Implement `IntrusiveRefCntPtr::useCount()` (PR #65502)
Ben Langmuir via llvm-commits
- [llvm] [VectorCombine][test] Supplement tests of the load-extractelement seq… (PR #65442)
Ben Shi via llvm-commits
- [llvm] [VectorCombine][test] Supplement tests of the load-extractelement seq… (PR #65442)
Ben Shi via llvm-commits
- [llvm] [VectorCombine][test] Supplement tests of the load-extractelement seq… (PR #65442)
Ben Shi via llvm-commits
- [llvm] [VectorCombine][test] Supplement tests of the load-extractelement seq… (PR #65442)
Ben Shi via llvm-commits
- [llvm] [VectorCombine][test] Supplement tests of the load-extractelement seq… (PR #65442)
Ben Shi via llvm-commits
- [llvm] [VectorCombine][test] Supplement tests of the load-extractelement seq… (PR #65442)
Ben Shi via llvm-commits
- [llvm] [VectorCombine][test] Supplement tests of the load-extractelement seq… (PR #65442)
Ben Shi via llvm-commits
- [llvm] [VectorCombine][test] Supplement tests of the load-extractelement seq… (PR #65442)
Ben Shi via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for scalable vector types (PR #65443)
Ben Shi via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for scalable vector types (PR #65443)
Ben Shi via llvm-commits
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Ben Shi via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for scalable vector types (PR #65443)
Ben Shi via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for scalable vector types (PR #65443)
Ben Shi via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for scalable vector types (PR #65443)
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- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for scalable vector types (PR #65443)
Ben Shi via llvm-commits
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Ben Shi via llvm-commits
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Ben Shi via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for non constant indexes (PR #65445)
Ben Shi via llvm-commits
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Ben Shi via llvm-commits
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Ben Shi via llvm-commits
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Ben Shi via llvm-commits
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Ben Shi via llvm-commits
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Ben Shi via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for non constant indexes (PR #65445)
Ben Shi via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for scalable vector types (PR #65443)
Ben Shi via llvm-commits
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Ben Shi via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for non constant indexes (PR #65445)
Ben Shi via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for non constant indexes (PR #65445)
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Ben Shi via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for scalable vector types (PR #65443)
Ben Shi via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for scalable vector types (PR #65443)
Ben Shi via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for scalable vector types (PR #65443)
Ben Shi via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for non constant indexes (PR #65445)
Ben Shi via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for non constant indexes (PR #65445)
Ben Shi via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for non constant indexes (PR #65445)
Ben Shi via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for non constant indexes (PR #65445)
Ben Shi via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for non constant indexes (PR #65445)
Ben Shi via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for non constant indexes (PR #65445)
Ben Shi via llvm-commits
- [PATCH] D159340: [VectorCombine][NFC][test] Supplement tests of the load-extractelement sequence
Ben Shi via Phabricator via llvm-commits
- [PATCH] D159341: [VectorCombine] Enable transform 'scalarizeLoadExtract' for scalable vector types
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- [llvm] [MemoryBuiltins] Cache the result of ObjectOffsetSizeVisitor::visit. #64796 (PR #65326)
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Bill Wendling via llvm-commits
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Bill Wendling via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Bill Wendling via llvm-commits
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Bill Wendling via llvm-commits
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Bill Wendling via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Bill Wendling via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Bill Wendling via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Bill Wendling via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Bill Wendling via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Bill Wendling via llvm-commits
- [llvm] a4318a2 - Precommit tests for gep has phi ptr
Biplob Mishra via llvm-commits
- [PATCH] D157977: [InstCombine] OptimizePointerDifference when a gep has phi ptr
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Biplob Mishra via Phabricator via llvm-commits
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- [PATCH] D157740: [InstCombine] Fold icmp into phi beyond the same BB.
Biplob Mishra via Phabricator via llvm-commits
- [llvm] db456dc - [LSR] Drop support for typed pointers
Bjorn Pettersson via llvm-commits
- [llvm] 7b3f6e6 - [llvm-exegesis] Fix in SubprocessMemoryTest after commit adb01dea6a5
Bjorn Pettersson via llvm-commits
- [PATCH] D151937: InstCombine: Recognize fabs as bitcasted integer
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Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D158850: RegisterCoalescer: Correctly set valid lanes when keeping live out implicit defs
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- [PATCH] D135581: [MemCpyOpt] Use usub_sat in processMemSetMemCpyDependence
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- [llvm] [llvm-exegesis] Make SubprocessMemoryTest use PIDs (PR #65245)
Björn Pettersson via llvm-commits
- [llvm] [opt] Remove reference to new PM from description of optimization level flags (PR #65169)
Björn Pettersson via llvm-commits
- [llvm] [opt] Remove reference to new PM from description of optimization level flags (PR #65169)
Björn Pettersson via llvm-commits
- [llvm] [LICM] Simplify isLoadInvariantInLoop given opaque pointers (PR #65597)
Björn Pettersson via llvm-commits
- [llvm] [LICM] Simplify isLoadInvariantInLoop given opaque pointers (PR #65597)
Björn Pettersson via llvm-commits
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Björn Pettersson via llvm-commits
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- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Björn Pettersson via llvm-commits
- [llvm] [LowerMatrixIntrinsics] Drop support for typed pointers (PR #65605)
Björn Pettersson via llvm-commits
- [llvm] [LowerMatrixIntrinsics] Drop support for typed pointers (PR #65605)
Björn Pettersson via llvm-commits
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Björn Pettersson via llvm-commits
- [llvm] [LICM] Simplify isLoadInvariantInLoop given opaque pointers (PR #65597)
Björn Pettersson via llvm-commits
- [llvm] [LICM] Simplify isLoadInvariantInLoop given opaque pointers (PR #65597)
Björn Pettersson via llvm-commits
- [llvm] [llvm-exegesis] Make SubprocessMemoryTest use PIDs (PR #65245)
Björn Pettersson via llvm-commits
- [PATCH] D155406: [MemCpyOpt] implement multi BB stack-move optimization
Bogdan Graur via Phabricator via llvm-commits
- [llvm] 2f3a362 - [SPARC][IAS] Add v9 encoding of %fq
Brad Smith via llvm-commits
- [llvm] af70618 - [SPARC][IAS] Add complete set of v9 ASI load, store & swap forms
Brad Smith via llvm-commits
- [llvm] f1246e9 - [SPARC][IAS] Add support for the full set of CAS instructions
Brad Smith via llvm-commits
- [llvm] bc45acb - [SPARC][IAS] Add named V9 ASI tag constants for memory instructions
Brad Smith via llvm-commits
- [llvm] a21a0a6 - [SPARC][IAS] Add more instruction aliases
Brad Smith via llvm-commits
- [PATCH] D157232: [SPARC][IAS] Add v9 encoding of %fq
Brad Smith via Phabricator via llvm-commits
- [PATCH] D157232: [SPARC][IAS] Add v9 encoding of %fq
Brad Smith via Phabricator via llvm-commits
- [PATCH] D157233: [SPARC][IAS] Add complete set of v9 ASI load, store & swap forms
Brad Smith via Phabricator via llvm-commits
- [PATCH] D157234: [SPARC][IAS] Add support for the full set of CAS instructions
Brad Smith via Phabricator via llvm-commits
- [PATCH] D157235: [SPARC][IAS] Add named V9 ASI tag constants for memory instructions
Brad Smith via Phabricator via llvm-commits
- [PATCH] D157236: [SPARC][IAS] Add more instruction aliases
Brad Smith via Phabricator via llvm-commits
- [PATCH] D157866: [libunwind] Haiku: Initial support
Brad Smith via Phabricator via llvm-commits
- [PATCH] D157866: [libunwind] Haiku: Initial support
Brad Smith via Phabricator via llvm-commits
- [PATCH] D152206: [Basic] Support 64-bit x86 target for UEFI
Brad Smith via Phabricator via llvm-commits
- [llvm] [AST] Don't merge memory locations in AliasSetTracker (PR #65731)
Bruno De Fraine via llvm-commits
- [llvm] [AST] Don't merge memory locations in AliasSetTracker (PR #65731)
Bruno De Fraine via llvm-commits
- [llvm] [AST] Don't merge memory locations in AliasSetTracker (PR #65731)
Bruno De Fraine via llvm-commits
- [llvm] [AST] Don't merge memory locations in AliasSetTracker (PR #65731)
Bruno De Fraine via llvm-commits
- [llvm] [AST] Don't merge memory locations in AliasSetTracker (PR #65731)
Bruno De Fraine via llvm-commits
- [polly] [AST] Don't merge memory locations in AliasSetTracker (PR #65731)
Bruno De Fraine via llvm-commits
- [llvm] 149a698 - [InstCombine] Pre-commit test for D158915
Bryan Chan via llvm-commits
- [llvm] 1a65cd3 - [InstCombine] Optimize implementations of min/max for bool
Bryan Chan via llvm-commits
- [PATCH] D158915: [InstCombine] optimized implementations of min/max for bool
Bryan Chan via Phabricator via llvm-commits
- [PATCH] D159129: [InstCombine] Pre-commit test for D158915
Bryan Chan via Phabricator via llvm-commits
- [PATCH] D158915: [InstCombine] optimized implementations of min/max for bool
Bryan Chan via Phabricator via llvm-commits
- [llvm] [AMDGPU] Cope with SelectionDAG::UpdateNodeOperands returning a different SDNode (PR #65340)
Carl Ritson via llvm-commits
- [llvm] [AMDGPU] Cope with SelectionDAG::UpdateNodeOperands returning a different SDNode (PR #65340)
Carl Ritson via llvm-commits
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Carl Ritson via llvm-commits
- [llvm] [AMDGPU] SILowerI1Copies: clear kill flags on COPY (PR #65883)
Carl Ritson via llvm-commits
- [llvm] [AMDGPU] SILowerI1Copies: clear kill flags on COPY (PR #65883)
Carl Ritson via llvm-commits
- [llvm] [AMDGPU] SILowerI1Copies: clear kill flags on COPY (PR #65883)
Carl Ritson via llvm-commits
- [llvm] [AMDGPU] SILowerI1Copies: clear kill flags on COPY (PR #65883)
Carl Ritson via llvm-commits
- [llvm] [AMDGPU] SILowerI1Copies: clear kill flags on COPY (PR #65883)
Carl Ritson via llvm-commits
- [llvm] [AMDGPU] SILowerI1Copies: clear kill flags on COPY (PR #65883)
Carl Ritson via llvm-commits
- [llvm] [AMDGPU] SILowerI1Copies: clear kill flags on COPY (PR #65883)
Carl Ritson via llvm-commits
- [llvm] [AMDGPU] SILowerI1Copies: clear kill flags on COPY (PR #65883)
Carl Ritson via llvm-commits
- [llvm] [AMDGPU] SILowerI1Copies: clear kill flags on COPY (PR #65883)
Carl Ritson via llvm-commits
- [llvm] 1d8a94c - [AMDGPU] SILowerControlFlow: fix preservation of LiveIntervals
Carl Ritson via llvm-commits
- [PATCH] D158141: [AMDGPU] SILowerControlFlow: fix preservation of LiveIntervals
Carl Ritson via Phabricator via llvm-commits
- [PATCH] D158141: [AMDGPU] SILowerControlFlow: fix preservation of LiveIntervals
Carl Ritson via Phabricator via llvm-commits
- [PATCH] D154488: [PowerPC] Define SchedModel for Power8
ChenZheng via Phabricator via llvm-commits
- [PATCH] D138883: [SelectionDAG][PowerPC] Memset reuse vector element for tail store
ChenZheng via Phabricator via llvm-commits
- [PATCH] D138883: [SelectionDAG][PowerPC] Memset reuse vector element for tail store
ChenZheng via Phabricator via llvm-commits
- [PATCH] D138883: [SelectionDAG][PowerPC] Memset reuse vector element for tail store
ChenZheng via Phabricator via llvm-commits
- [PATCH] D154488: [PowerPC] Define SchedModel for Power8
ChenZheng via Phabricator via llvm-commits
- [compiler-rt] 4c676d5 - [scudo] Clean up decl of RSSLimit funtions (NFC)
Chia-hung Duan via llvm-commits
- [llvm] [CMake] Pass doc-related LLVM variables to external projects (PR #65531)
Chris B via llvm-commits
- [llvm] Fix AtomicInterfacesTdFiles missing deps/typos in Bazel (PR #65562)
Christian Sigg via llvm-commits
- [llvm] Added erase() to fix memory leak of mlir/unittests/IR/InterfaceTest.cpp (PR #65583)
Christian Sigg via llvm-commits
- [llvm] Added erase() to fix memory leak of mlir/unittests/IR/InterfaceTest.cpp (PR #65583)
Christian Sigg via llvm-commits
- [llvm] Fix logic to detect cl::option equality. (PR #65754)
Christian Sigg via llvm-commits
- [llvm] Fix logic to detect cl::option equality. (PR #65754)
Christian Sigg via llvm-commits
- [llvm] Fix logic to detect cl::option equality. (PR #65754)
Christian Sigg via llvm-commits
- [PATCH] D159086: Change begin of macro in translateSourceRange in libclang
Christoph Busold via Phabricator via llvm-commits
- [llvm] [libc][NFC] split type_traits / utility in separate files (PR #65314)
Christopher Di Bella via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
Christopher Di Bella via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
Christopher Di Bella via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
Christopher Di Bella via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
Christopher Di Bella via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
Christopher Di Bella via llvm-commits
- [llvm] [lldb] removes final `dexter.builder` import (PR #65653)
Christopher Di Bella via llvm-commits
- [llvm] [lldb] removes final `dexter.builder` import (PR #65653)
Christopher Di Bella via llvm-commits
- [llvm] [lldb] removes final `dexter.builder` import (PR #65653)
Christopher Di Bella via llvm-commits
- [llvm] [cross-project-tests] removes final `dexter.builder` import (PR #65653)
Christopher Di Bella via llvm-commits
- [PATCH] D152710: AMDGPU: Implement llvm.get.fpmode
Christudasan Devadasan via Phabricator via llvm-commits
- [llvm] [NFC] Update coroutine intrinsics documentation and few remaining tests to opaque pointers (PR #65698)
Chuanqi Xu via llvm-commits
- [llvm] [llvm-exegesis] Add error handling for fork failures (PR #65186)
Clement Courbet via llvm-commits
- [llvm] [libc] Add is_scalar (PR #65740)
Clement Courbet via llvm-commits
- [llvm] [libc] Add is_object (PR #65749)
Clement Courbet via llvm-commits
- [llvm] [libc] Add invoke_result type traits (PR #65750)
Clement Courbet via llvm-commits
- [PATCH] D158052: [llvm-exegesis] Add explicit error for segmenetation faults
Clement Courbet via Phabricator via llvm-commits
- [PATCH] D158052: [llvm-exegesis] Add explicit error for segmenetation faults
Clement Courbet via Phabricator via llvm-commits
- [compiler-rt] [clang-tidy][misc-include-cleaner]Avoid to insert same include header multiple times (PR #65431)
Congcong Cai via llvm-commits
- [llvm] [clang-tidy][misc-include-cleaner]Avoid to insert same include header multiple times (PR #65431)
Congcong Cai via llvm-commits
- [llvm] 31cc069 - [Demangle] demangle builtin type transformations
Congcong Cai via llvm-commits
- [llvm] 91a848b - Revert "[Demangle] demangle builtin type transformations"
Congcong Cai via llvm-commits
- [llvm] [Demangle] demangle builtin type transformations (PR #65902)
Congcong Cai via llvm-commits
- [llvm] [Demangle] demangle builtin type transformations (PR #65902)
Congcong Cai via llvm-commits
- [llvm] [Demangle] demangle builtin type transformations (PR #65902)
Congcong Cai via llvm-commits
- [PATCH] D148465: [Demangle] demangle builtin type transformations
Congcong Cai via Phabricator via llvm-commits
- [PATCH] D148465: [Demangle] demangle builtin type transformations
Congcong Cai via Phabricator via llvm-commits
- [PATCH] D140828: [C++] Implement "Deducing this" (P0847R7)
Corentin Jabot via Phabricator via llvm-commits
- [PATCH] D140828: [C++] Implement "Deducing this" (P0847R7)
Corentin Jabot via Phabricator via llvm-commits
- [PATCH] D140828: [C++] Implement "Deducing this" (P0847R7)
Corentin Jabot via Phabricator via llvm-commits
- [PATCH] D157986: [Cmake] Make sure MSVC knows LLVM source files are UTF-8 encoded
Corentin Jabot via Phabricator via llvm-commits
- [PATCH] D148465: [Demangle] demangle builtin type transformations
Corentin Jabot via Phabricator via llvm-commits
- [PATCH] D148465: [Demangle] demangle builtin type transformations
Corentin Jabot via Phabricator via llvm-commits
- [llvm] [C API] Fix LLVMGetOrdering/LLVMIsAtomicSingleThread for fence/memory instrs (PR #65228)
Craig Disselkoen via llvm-commits
- [llvm] [RISCV] Add more files to .github/CODEOWNERS (PR #65234)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add gisel-commandline-option.ll similar to AArch64. (PR #65299)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add gisel-commandline-option.ll similar to AArch64. (PR #65299)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add gisel-commandline-option.ll similar to AArch64. (PR #65299)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add gisel-commandline-option.ll similar to AArch64. (PR #65299)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add gisel-commandline-option.ll similar to AArch64. (PR #65299)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add gisel-commandline-option.ll similar to AArch64. (PR #65299)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add gisel-commandline-option.ll similar to AArch64. (PR #65299)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add gisel-commandline-option.ll similar to AArch64. (PR #65299)
Craig Topper via llvm-commits
- [llvm] [RISCV] Disable zcmp push/pop for variadic functions. (PR #65302)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add gisel-commandline-option.ll similar to AArch64. (PR #65299)
Craig Topper via llvm-commits
- [llvm] [RISCV] Split VFWREDUSUM and VFWREDOSUM SchedWrite (PR #65386)
Craig Topper via llvm-commits
- [llvm] [RISCV] Move slide and gather costing to subtarget [NFC] (PR #65396)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use add.uw for (or (and X, 0xFFFFFFFF), Y) if Y has zeroes in the lower 32 bits. (PR #65402)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use add.uw for (or (and X, 0xFFFFFFFF), Y) if Y has zeroes in the lower 32 bits. (PR #65402)
Craig Topper via llvm-commits
- [llvm] [RISCV] Remove -riscv-v-vector-bits-min=128 in tests where implied by V. NFC (PR #65404)
Craig Topper via llvm-commits
- [llvm] [RISCV] Remove -riscv-v-vector-bits-min=128 in tests where implied by V. NFC (PR #65404)
Craig Topper via llvm-commits
- [llvm] [RISCV] Extract subregister if VLEN is known when lowering extract_subvector (PR #65392)
Craig Topper via llvm-commits
- [llvm] [RISCV] Remove -riscv-v-vector-bits-min=128 in tests where implied by V. NFC (PR #65404)
Craig Topper via llvm-commits
- [llvm] [RISCV] Fix SiFive7 formula for Reductions and ordered Reductions (PR #65385)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use add.uw for (or (and X, 0xFFFFFFFF), Y) if Y has zeroes in the lower 32 bits. (PR #65402)
Craig Topper via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use BitVector. (PR #65423)
Craig Topper via llvm-commits
- [llvm] [RISCV] Specify FilterClassField to filter out unneeded pseudos (PR #65460)
Craig Topper via llvm-commits
- [llvm] bb810d8 - [RISCV] Disable machine verifier in gisel-commandline-option.ll. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add gisel-commandline-option.ll similar to AArch64. (PR #65299)
Craig Topper via llvm-commits
- [llvm] [RISCV] Extract subregister if VLEN is known when lowering extract_subvector (PR #65392)
Craig Topper via llvm-commits
- [llvm] [RISCV] Move slide and gather costing to subtarget [NFC] (PR #65396)
Craig Topper via llvm-commits
- [llvm] [RISCV] Refactor extract_subvector lowering slightly. NFC (PR #65391)
Craig Topper via llvm-commits
- [llvm] [RISCV] Refactor extract_subvector lowering slightly. NFC (PR #65391)
Craig Topper via llvm-commits
- [llvm] [RISCV] Lower constant build_vectors with few non-sign bits via ZSEXT (PR #65648)
Craig Topper via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use BitVector. (PR #65423)
Craig Topper via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use BitVector. (PR #65423)
Craig Topper via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use BitVector. (PR #65423)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add initial pre-legalizer combiners copying from AArch64. (PR #65663)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add initial pre-legalizer combiners copying from AArch64. (PR #65663)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add initial pre-legalizer combiners copying from AArch64. (PR #65663)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add initial pre-legalizer combiners copying from AArch64. (PR #65663)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add initial pre-legalizer combiners copying from AArch64. (PR #65663)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add initial pre-legalizer combiners copying from AArch64. (PR #65663)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add initial pre-legalizer combiners copying from AArch64. (PR #65663)
Craig Topper via llvm-commits
- [llvm] [RISCV] Lower constant build_vectors with few non-sign bits via vsext (PR #65648)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add a combine to form masked.load from unit strided load (PR #65674)
Craig Topper via llvm-commits
- [llvm] [RISCV] Lower constant build_vectors with few non-sign bits via vsext (PR #65648)
Craig Topper via llvm-commits
- [llvm] [RISCV] Move slide and gather costing to subtarget [NFC] (PR #65396)
Craig Topper via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Craig Topper via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Craig Topper via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Craig Topper via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Craig Topper via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Craig Topper via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Craig Topper via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Craig Topper via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISel] Add initial pre-legalizer combiners copying from AArch64. (PR #65663)
Craig Topper via llvm-commits
- [llvm] [RISCV] Match indices based on significant bits when forming strided ops (PR #65777)
Craig Topper via llvm-commits
- [PATCH] D76445: [RISCV][GlobalISel] Select ALU GPR instructions
Craig Topper via Phabricator via llvm-commits
- [PATCH] D159375: [RISCV] Lower fixed vectors extract_vector_elt through stack at high LMUL
Craig Topper via Phabricator via llvm-commits
- [PATCH] D159131: [RISCV][GlobalISel] Select G_ICMP
Craig Topper via Phabricator via llvm-commits
- [PATCH] D158449: [IR]Add NumSrcElts param to is..Mask static function in ShuffleVectorInst.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D158068: [DAG] FoldSetCC - add missing icmp(X,undef) -> isTrueWhenEqual case
Craig Topper via Phabricator via llvm-commits
- [PATCH] D159131: [RISCV][GlobalISel] Select G_ICMP
Craig Topper via Phabricator via llvm-commits
- [PATCH] D159131: [RISCV][GlobalISel] Select G_ICMP
Craig Topper via Phabricator via llvm-commits
- [PATCH] D76445: [RISCV][GlobalISel] Select ALU GPR instructions
Craig Topper via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pseudo for vector values.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D76445: [RISCV][GlobalISel] Select ALU GPR instructions
Craig Topper via Phabricator via llvm-commits
- [PATCH] D158291: [PoC][WIP] Add an AArch64 specific pass for loop idiom recognition
Craig Topper via Phabricator via llvm-commits
- [PATCH] D158291: [PoC][WIP] Add an AArch64 specific pass for loop idiom recognition
Craig Topper via Phabricator via llvm-commits
- [PATCH] D159131: [RISCV][GlobalISel] Select G_ICMP
Craig Topper via Phabricator via llvm-commits
- [llvm] f9fe603 - [TextAPI] Support more constructors for PackedVersions
Cyndy Ishida via llvm-commits
- [llvm] 866ae69 - [AArch64] [BranchRelaxation] Optimize for hot code size in AArch64 branch relaxation
Daniel Hoekwater via llvm-commits
- [PATCH] D156767: [AArch64] [BranchRelaxation] Optimize for hot code size in AArch64 branch relaxation
Daniel Hoekwater via Phabricator via llvm-commits
- [PATCH] D156767: [AArch64] [BranchRelaxation] Optimize for hot code size in AArch64 branch relaxation
Daniel Hoekwater via Phabricator via llvm-commits
- [PATCH] D156767: [AArch64] [BranchRelaxation] Optimize for hot code size in AArch64 branch relaxation
Daniel Hoekwater via Phabricator via llvm-commits
- [PATCH] D156767: [AArch64] [BranchRelaxation] Optimize for hot code size in AArch64 branch relaxation
Daniel Hoekwater via Phabricator via llvm-commits
- [PATCH] D156767: [AArch64] [BranchRelaxation] Optimize for hot code size in AArch64 branch relaxation
Daniel Hoekwater via Phabricator via llvm-commits
- [llvm] [llvm-nm] Fix msan error in llvm-nm/wasm/weak-symbols.yaml.test (PR #65538)
Daniel Kutenin via llvm-commits
- [llvm] [llvm-nm] Fix msan error in llvm-nm/wasm/weak-symbols.yaml.test (PR #65538)
Daniel Kutenin via llvm-commits
- [llvm] [llvm-nm] Fix msan error in llvm-nm/wasm/weak-symbols.yaml.test (PR #65538)
Daniel Kutenin via llvm-commits
- [lld] f2f36c9 - Emit line numbers in CodeView for trailing (after `ret`) blocks from inlined functions
Daniel Paoliello via llvm-commits
- [PATCH] D159226: Emit line numbers in CodeView for trailing (after `ret`) blocks from inlined functions
Daniel Paoliello via Phabricator via llvm-commits
- [llvm] [GlobPattern][Docs] End list with "." (PR #65397)
Daniel Rodríguez Troitiño via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the MIPS backend (PR #65384)
Daniel Sanders via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the MIPS backend (PR #65384)
Daniel Sanders via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the MIPS backend (PR #65384)
Daniel Sanders via llvm-commits
- [PATCH] D150987: [llvm-nm] Add --line-numbers flag
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D150987: [llvm-nm] Add --line-numbers flag
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D150987: [llvm-nm] Add --line-numbers flag
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D150987: [llvm-nm] Add --line-numbers flag
Daniel Thornburgh via Phabricator via llvm-commits
- [llvm] [OpenMPOpt] Fix incorrect end-of-kernel barrier removal (PR #65670)
Daniel Woodworth via llvm-commits
- [llvm] [OpenMPOpt] Fix incorrect end-of-kernel barrier removal (PR #65670)
Daniel Woodworth via llvm-commits
- [llvm] [OpenMPOpt] Fix incorrect end-of-kernel barrier removal (PR #65670)
Daniel Woodworth via llvm-commits
- [llvm] [OpenMPOpt] Fix incorrect end-of-kernel barrier removal (PR #65670)
Daniel Woodworth via llvm-commits
- [PATCH] D158574: [AArch64][ELF] Support PAUTH ABI marking
Daniil Kovalev via Phabricator via llvm-commits
- [PATCH] D158574: [AArch64][ELF] Support PAUTH ABI marking
Daniil Kovalev via Phabricator via llvm-commits
- [PATCH] D158574: [AArch64][ELF] Support PAUTH ABI marking
Daniil Kovalev via Phabricator via llvm-commits
- [PATCH] D156882: [AArch64][ELF][lld] Support dynamic R_AARCH64_AUTH_* relocations
Daniil Kovalev via Phabricator via llvm-commits
- [PATCH] D159162: [llvm] Add assembly syntax highlighting
Danila Malyutin via Phabricator via llvm-commits
- [PATCH] D159162: [llvm] Add assembly syntax highlighting
Danila Malyutin via Phabricator via llvm-commits
- [PATCH] D159162: [llvm] Add assembly syntax highlighting
Danila Malyutin via Phabricator via llvm-commits
- [PATCH] D152828: [MachineSink][AArch64] Sink instruction copies when they can replace copy into hard register or folded into addressing mode
Dave Green via Phabricator via llvm-commits
- [PATCH] D159356: [AArch64] Check FeatureAddrLSLFast to fold base address with scale
Dave Green via Phabricator via llvm-commits
- [PATCH] D124092: CodeGen: Remove MaxBytesForAlignment from MachineBasicBlock
Dave Green via Phabricator via llvm-commits
- [PATCH] D159367: [ARM] Improve reduction fadd/fmul costs
Dave Green via Phabricator via llvm-commits
- [PATCH] D159267: [AArch64] Remove copy instruction between uaddlv and dup
Dave Green via Phabricator via llvm-commits
- [PATCH] D154157: [LV] Cost model for out-of-loop reductions
Dave Green via Phabricator via llvm-commits
- [PATCH] D159447: [AArch64] Replace uaddlv intrinsic with uaddlv sdnode
Dave Green via Phabricator via llvm-commits
- [PATCH] D159447: [AArch64] Replace uaddlv intrinsic with uaddlv sdnode
Dave Green via Phabricator via llvm-commits
- [PATCH] D159443: [AArch64] Fix schedmodel zero latency moves for Neoverse V2
Dave Green via Phabricator via llvm-commits
- [PATCH] D158626: [AArch64] Add missing vrnd intrinsics
Dave Green via Phabricator via llvm-commits
- [PATCH] D157740: [WIP] [InstCombine] Fold icmp into phi beyond the same BB.
Dave Green via Phabricator via llvm-commits
- [PATCH] D159265: [AArch64] Remove copy instruction between uaddlv and urshr
Dave Green via Phabricator via llvm-commits
- [PATCH] D159480: [Clang][AArch64] Fine-grained ldp and stp policies.
Dave Green via Phabricator via llvm-commits
- [PATCH] D159267: [AArch64] Remove copy instruction between uaddlv and dup
Dave Green via Phabricator via llvm-commits
- [PATCH] D158626: [AArch64] Add missing vrnd intrinsics
Dave Green via Phabricator via llvm-commits
- [PATCH] D152407: [AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre.
Dave Green via Phabricator via llvm-commits
- [PATCH] D159480: [Clang][AArch64] Fine-grained ldp and stp policies.
Dave Green via Phabricator via llvm-commits
- [PATCH] D159267: [AArch64] Remove copy instruction between uaddlv and dup
Dave Green via Phabricator via llvm-commits
- [PATCH] D159265: [AArch64] Remove copy instruction between uaddlv and urshr
Dave Green via Phabricator via llvm-commits
- [llvm] [lldb] Allow lldbDataFormatters.py to be used by other names (NFC) (PR #65528)
Dave Lee via llvm-commits
- [llvm] [lldb] Allow lldbDataFormatters.py to be used by other names (NFC) (PR #65528)
Dave Lee via llvm-commits
- [llvm] [lldb] Allow lldbDataFormatters.py to be used by other names (NFC) (PR #65528)
Dave Lee via llvm-commits
- [PATCH] D159374: [llvm][dwarf][rfc][donotcommit] Enable print of ranges addresses from .debug_info.dwo
David Blaikie via Phabricator via llvm-commits
- [llvm] 5afb161 - [ARM] Add various vector reduce costmodel tests. NFC
David Green via llvm-commits
- [llvm] 4530f02 - [ARM] Improve reduction fadd/fmul costs
David Green via llvm-commits
- [llvm] 2955cc1 - [ARM] Improve costs for FMin/Max reductions
David Green via llvm-commits
- [llvm] 4cef24a - [ARM] Improve reduction integer min/max costs
David Green via llvm-commits
- [llvm] 233fb98 - [ARM] Improve bitwise reduction costs
David Green via llvm-commits
- [llvm] [AArch64][CodeGen] Fix wrong operand order when creating vcmla intrinsic (PR #65278)
David Green via llvm-commits
- [llvm] [AArch64][CodeGen] Fix wrong operand order when creating vcmla intrinsic (PR #65278)
David Green via llvm-commits
- [llvm] [GlobalISel] Fold G_SHUFFLE_VECTOR with a single element mask to G_EXTRACT_VECTOR_ELT (PR #65342)
David Green via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use BitVector. (PR #65423)
David Green via llvm-commits
- [llvm] [AArch64][GlobalISel] Look through COPY and G_BITCAST while selecting fcvtl2 (fpext) (PR #65463)
David Green via llvm-commits
- [llvm] [AArch64][GlobalISel] Look through COPY and G_BITCAST while selecting fcvtl2 (fpext) (PR #65463)
David Green via llvm-commits
- [llvm] [AArch64][GlobalISel] Look through COPY and G_BITCAST while selecting fcvtl2 (fpext) (PR #65463)
David Green via llvm-commits
- [llvm] [AArch64][GlobalISel] Look through COPY and G_BITCAST while selecting fcvtl2 (fpext) (PR #65463)
David Green via llvm-commits
- [llvm] [AArch64][GlobalISel] Look through COPY and G_BITCAST while selecting fcvtl2 (fpext) (PR #65463)
David Green via llvm-commits
- [llvm] [GlobalISel] Fold G_SHUFFLE_VECTOR with a single element mask to G_EXTRACT_VECTOR_ELT (PR #65342)
David Green via llvm-commits
- [llvm] [ARM] Change CRC predicated to just HasCRC (PR #65591)
David Green via llvm-commits
- [llvm] [ARM] Change CRC predicated to just HasCRC (PR #65591)
David Green via llvm-commits
- [llvm] [AArch64][GlobalISel] Look through COPY and G_BITCAST while selecting fcvtl2 (fpext) (PR #65463)
David Green via llvm-commits
- [llvm] [AArch64][GlobalISel] Look through COPY and G_BITCAST while selecting fcvtl2 (fpext) (PR #65463)
David Green via llvm-commits
- [llvm] [AArch64][GlobalISel] Look through COPY and G_BITCAST while selecting fcvtl2 (fpext) (PR #65463)
David Green via llvm-commits
- [compiler-rt] [AArch64][CodeGen] Fix wrong operand order when creating vcmla intrinsic (PR #65278)
David Green via llvm-commits
- [llvm] a82c106 - [ARM] Change CRC predicate to just HasCRC
David Green via llvm-commits
- [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #65759)
David Green via llvm-commits
- [llvm] f2b0443 - [ARM] Correct Cortex-M55 scheduling info for VMINV/VMAXV
David Green via llvm-commits
- [llvm] [ARM][ISel] Fix crash of ISD::FMINNUM/FMAXNUM (PR #65849)
David Green via llvm-commits
- [llvm] 41fd143 - [AArch64][GlobalISel] Fix || / && precedence warning in assert. NFC
David Green via llvm-commits
- [llvm] 4e52fd8 - [AArch64] Add GlobalISel coverage for BIT/BIF/BSL. NFC
David Green via llvm-commits
- [llvm] [AArch64][GlobalISel] Add lowering for constant BIT/BIF/BSP (PR #65897)
David Green via llvm-commits
- [llvm] [AArch64][GlobalISel] Add lowering for constant BIT/BIF/BSP (PR #65897)
David Green via llvm-commits
- [llvm] 64094e3 - [DAGCombiner] Pre-commit tests for D159191
David Sherwood via llvm-commits
- [llvm] 50598f0 - [DAGCombiner][SVE] Add support for illegal extending masked loads
David Sherwood via llvm-commits
- [PATCH] D159192: [DAGCombiner][SVE] Pre-commit tests for D159191
David Sherwood via Phabricator via llvm-commits
- [PATCH] D158291: [PoC][WIP] Add an AArch64 specific pass for loop idiom recognition
David Sherwood via Phabricator via llvm-commits
- [PATCH] D158291: [PoC][WIP] Add an AArch64 specific pass for loop idiom recognition
David Sherwood via Phabricator via llvm-commits
- [PATCH] D158291: [PoC][WIP] Add an AArch64 specific pass for loop idiom recognition
David Sherwood via Phabricator via llvm-commits
- [PATCH] D158291: [PoC][WIP] Add an AArch64 specific pass for loop idiom recognition
David Sherwood via Phabricator via llvm-commits
- [PATCH] D158291: [PoC][WIP] Add an AArch64 specific pass for loop idiom recognition
David Sherwood via Phabricator via llvm-commits
- [llvm] [bolt][X86] Correct 2 test RUN lines (PR #65252)
David Spickett via llvm-commits
- [llvm] [bolt][X86] Correct 2 test RUN lines (PR #65252)
David Spickett via llvm-commits
- [llvm] [bolt][X86] Correct 2 test RUN lines (PR #65252)
David Spickett via llvm-commits
- [llvm] 48987fb - [llvm][MC] Remove [[nodiscard]] from WithMarkup constructor
David Spickett via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use BitVector. (PR #65423)
David Spickett via llvm-commits
- [llvm] [lldb] Add lldb team to CODEOWNERS (PR #65454)
David Spickett via llvm-commits
- [llvm] [lldb] Add lldb team to CODEOWNERS (PR #65454)
David Spickett via llvm-commits
- [llvm] [lldb] Add lldb team to CODEOWNERS (PR #65454)
David Spickett via llvm-commits
- [llvm] [lldb] Add lldb team to CODEOWNERS (PR #65454)
David Spickett via llvm-commits
- [llvm] [clang][AArch64] Add --print-supported-extensions support (PR #65466)
David Spickett via llvm-commits
- [llvm] [clang][AArch64] Add --print-supported-extensions support (PR #65466)
David Spickett via llvm-commits
- [llvm] [clang][AArch64] Add --print-supported-extensions support (PR #65466)
David Spickett via llvm-commits
- [llvm] [clang][AArch64] Add --print-supported-extensions support (PR #65466)
David Spickett via llvm-commits
- [llvm] [clang][AArch64] Add --print-supported-extensions support (PR #65466)
David Spickett via llvm-commits
- [llvm] [clang][AArch64] Add --print-supported-extensions support (PR #65466)
David Spickett via llvm-commits
- [llvm] [lldb] Add lldb team to CODEOWNERS (PR #65454)
David Spickett via llvm-commits
- [llvm] [lldb] Add lldb team to CODEOWNERS (PR #65454)
David Spickett via llvm-commits
- [llvm] [lldb] Add lldb team to CODEOWNERS (PR #65454)
David Spickett via llvm-commits
- [llvm] [lldb] Add lldb team to CODEOWNERS (PR #65454)
David Spickett via llvm-commits
- [llvm] [lldb] Add lldb team to CODEOWNERS (PR #65454)
David Spickett via llvm-commits
- [llvm] [clang][AArch64] Add --print-supported-extensions support (PR #65466)
David Spickett via llvm-commits
- [llvm] [clang][AArch64] Add --print-supported-extensions support (PR #65466)
David Spickett via llvm-commits
- [llvm] [clang][AArch64] Add --print-supported-extensions support (PR #65466)
David Spickett via llvm-commits
- [llvm] [bolt][X86] Correct 2 test RUN lines (PR #65252)
David Spickett via llvm-commits
- [llvm] 254847f - [llvm][Docs] Fix missing ' in GitHub documentation
David Spickett via llvm-commits
- [PATCH] D159162: [llvm] Add assembly syntax highlighting
David Spickett via Phabricator via llvm-commits
- [llvm] [AMDGPU] New intrinsic void llvm.amdgcn.s.nop(i16) (PR #65757)
David Stuttard via llvm-commits
- [llvm] [AMDGPU] New intrinsic void llvm.amdgcn.s.nop(i16) (PR #65757)
David Stuttard via llvm-commits
- [llvm] [AMDGPU] New intrinsic void llvm.amdgcn.s.nop(i16) (PR #65757)
David Stuttard via llvm-commits
- [llvm] [AMDGPU] New intrinsic void llvm.amdgcn.s.nop(i16) (PR #65757)
David Stuttard via llvm-commits
- [PATCH] D158750: New intrinsic void llvm.amdgcn.s.nop(i16)
David Stuttard via Phabricator via llvm-commits
- [PATCH] D158750: New intrinsic void llvm.amdgcn.s.nop(i16)
David Stuttard via Phabricator via llvm-commits
- [PATCH] D158750: New intrinsic void llvm.amdgcn.s.nop(i16)
David Stuttard via Phabricator via llvm-commits
- [PATCH] D158750: New intrinsic void llvm.amdgcn.s.nop(i16)
David Stuttard via Phabricator via llvm-commits
- [PATCH] D159319: [AIX] Use microseconds for timestamp in sinit/sterm symbols
David Tenty via Phabricator via llvm-commits
- [PATCH] D159319: [AIX] Add threadId and use nanosecond timestamp in sinit/sterm symbols
David Tenty via Phabricator via llvm-commits
- [llvm] Add a GitHub team to subscribe to WebAssembly backend (PR #65419)
Derek Schuff via llvm-commits
- [llvm] Add a GitHub team to subscribe to WebAssembly backend (PR #65419)
Derek Schuff via llvm-commits
- [llvm] Add a GitHub team to subscribe to WebAssembly backend (PR #65419)
Derek Schuff via llvm-commits
- [llvm] Add a GitHub team to subscribe to WebAssembly backend (PR #65419)
Derek Schuff via llvm-commits
- [llvm] Add a GitHub team to subscribe to WebAssembly backend (PR #65419)
Derek Schuff via llvm-commits
- [llvm] Add a GitHub team to subscribe to WebAssembly backend (PR #65419)
Derek Schuff via llvm-commits
- [llvm] Add a GitHub team to subscribe to WebAssembly backend (PR #65419)
Derek Schuff via llvm-commits
- [llvm] e13e808 - [SROA] Limit the number of allowed slices when trying to split allocas
Dhruv Chawla via llvm-commits
- [PATCH] D159354: [SROA] Limit the number of allowed slices when trying to split allocas
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D158527: [InstCombine] Add a cl::opt to control calls to getOrEnforceKnownAlignment in LoadInst and StoreInst
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D158600: [InferAlignment] Enable InferAlignment pass by default
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D159354: [SROA] Limit the number of allowed slices when trying to split allocas
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI
Di Mo via Phabricator via llvm-commits
- [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI
Di Mo via Phabricator via llvm-commits
- [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI
Di Mo via Phabricator via llvm-commits
- [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI
Di Mo via Phabricator via llvm-commits
- [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI
Di Mo via Phabricator via llvm-commits
- [PATCH] D155940: [SimplifyCFG] Transform for redirecting phis between unmergeable BB and SuccBB
DianQK via Phabricator via llvm-commits
- [PATCH] D155711: [SimplifyCFG] Hoist common instructions on Switch.
DianQK via Phabricator via llvm-commits
- [PATCH] D144872: [AIX] Align the content of an xcoff object file which has auxiliary header in big archive.
Digger Lin via Phabricator via llvm-commits
- [PATCH] D144872: [AIX] Align the content of an xcoff object file which has auxiliary header in big archive.
Digger Lin via Phabricator via llvm-commits
- [PATCH] D139864: [llvm-cxxfilt] Not consider the prefix dot as part of the demangled symbol name.
Digger Lin via Phabricator via llvm-commits
- [PATCH] D152205: [Aarch64][SVE]SVE2] Enable tbl, tbl2 for shuffle lowering for fixed vector types.
Dinar Temirbulatov via Phabricator via llvm-commits
- [PATCH] D152205: [Aarch64][SVE]SVE2] Enable tbl, tbl2 for shuffle lowering for fixed vector types.
Dinar Temirbulatov via Phabricator via llvm-commits
- [llvm] 6cfb411 - [llvm][test] Write temporary files to %t instead of CWD
Dmitri Gribenko via llvm-commits
- [llvm] 97bf104 - Revert "[DAG] Fold (shl (sext (add_nsw x, c1)), c2) -> (add (shl (sext x), c2), c1 << c2)"
Dmitri Gribenko via llvm-commits
- [llvm] [cross-project-tests] removes final `dexter.builder` import (PR #65653)
Dmitri Gribenko via llvm-commits
- [llvm] [cross-project-tests] removes final `dexter.builder` import (PR #65653)
Dmitri Gribenko via llvm-commits
- [llvm] [cross-project-tests] removes final `dexter.builder` import (PR #65653)
Dmitri Gribenko via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Dmitri Gribenko via llvm-commits
- [llvm] b3a14ca - Revert "[NVPTX] Make i16x2 a native type and add supported vec instructions (#65432)"
Dmitri Gribenko via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
Dmitri Gribenko via llvm-commits
- [PATCH] D159198: [DAG] Fold (shl (sext (add_nsw x, c1)), c2) -> (add (shl (sext x), c2), c1 << c2)
Dmitri Gribenko via Phabricator via llvm-commits
- [PATCH] D156618: [IR] Fix a memory leak if Function::dropAllReferences() is followed by setHungoffOperand
Duncan P. N. Exon Smith via Phabricator via llvm-commits
- [PATCH] D154119: Fix: Distinguish CFI Metadata Checks in MergeFunctions Pass
Duncan P. N. Exon Smith via Phabricator via llvm-commits
- [PATCH] D154119: Fix: Distinguish CFI Metadata Checks in MergeFunctions Pass
Duncan P. N. Exon Smith via Phabricator via llvm-commits
- [PATCH] D156618: [IR] Fix a memory leak if Function::dropAllReferences() is followed by setHungoffOperand
Duncan P. N. Exon Smith via Phabricator via llvm-commits
- [llvm] [Clang] Allow mixed scalar type constraints for inline asm (PR #65465)
Dávid Ferenc Szabó via llvm-commits
- [llvm] [Clang] Allow mixed scalar type constraints for inline asm (PR #65465)
Dávid Ferenc Szabó via llvm-commits
- [llvm] [Clang] Allow mixed scalar type constraints for inline asm (PR #65465)
Dávid Ferenc Szabó via llvm-commits
- [PATCH] D158920: Delete CloudABI support
Ed Maste via Phabricator via llvm-commits
- [PATCH] D133361: [BPF] Attribute btf_decl_tag("ctx") for structs
Eduard Zingerman via Phabricator via llvm-commits
- [PATCH] D133361: [BPF] Attribute btf_decl_tag("ctx") for structs
Eduard Zingerman via Phabricator via llvm-commits
- [PATCH] D150079: [BPF][DebugInfo] Show CO-RE relocations in llvm-objdump
Eduard Zingerman via Phabricator via llvm-commits
- [PATCH] D150079: [BPF][DebugInfo] Show CO-RE relocations in llvm-objdump
Eduard Zingerman via Phabricator via llvm-commits
- [PATCH] D150079: [BPF][DebugInfo] Show CO-RE relocations in llvm-objdump
Eduard Zingerman via Phabricator via llvm-commits
- [PATCH] D150079: [BPF][DebugInfo] Show CO-RE relocations in llvm-objdump
Eduard Zingerman via Phabricator via llvm-commits
- [llvm] [AArch64][CodeGen] Fix wrong operand order when creating vcmla intrinsic (PR #65278)
Eli Friedman via llvm-commits
- [polly] 17f747b - [polly] Dynamic libraries are not supported on Cygwin
Eli Friedman via llvm-commits
- [llvm] [StackProtector] Clear out stack protector slot (PR #65461)
Eli Friedman via llvm-commits
- [llvm] [StackProtector] Clear out stack protector slot (PR #65461)
Eli Friedman via llvm-commits
- [llvm] [AArch64][CodeGen] Fix wrong operand order when creating vcmla intrinsic (PR #65278)
Eli Friedman via llvm-commits
- [compiler-rt] [AArch64][CodeGen] Fix wrong operand order when creating vcmla intrinsic (PR #65278)
Eli Friedman via llvm-commits
- [PATCH] D159267: [AArch64] Remove copy instruction between uaddlv and dup
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D155796: [polly] Dynamic libraries are not supported on Cygwin
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D159265: [AArch64] Remove copy instruction between uaddlv and urshr
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D159265: [AArch64] Remove copy instruction between uaddlv and urshr
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D159267: [AArch64] Remove copy instruction between uaddlv and dup
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D155924: [IR] Remove support for and/or constant expressions
Eli Friedman via Phabricator via llvm-commits
- [llvm] [GlobPattern][Docs] End list with "." (PR #65397)
Ellis Hoag via llvm-commits
- [llvm] [GlobPattern][Docs] End list with "." (PR #65397)
Ellis Hoag via llvm-commits
- [llvm] [GlobPattern][Docs] End list with "." (PR #65397)
Ellis Hoag via llvm-commits
- [lld] [lld][MachO] Add option to suppress mismatch profile errors (PR #65551)
Ellis Hoag via llvm-commits
- [lld] [lld][MachO] Add option to suppress mismatch profile errors (PR #65551)
Ellis Hoag via llvm-commits
- [lld] [lld][MachO] Add option to suppress mismatch profile errors (PR #65551)
Ellis Hoag via llvm-commits
- [llvm] [GlobPattern][Docs] End list with "." (PR #65397)
Ellis Hoag via llvm-commits
- [PATCH] D159094: Fix failed tests
Elvina Yakubova via Phabricator via llvm-commits
- [PATCH] D159094: [BOLT][test] Fix failed tests
Elvina Yakubova via Phabricator via llvm-commits
- [PATCH] D159094: [BOLT][test] Fix cross-compilation tests after D151920
Elvina Yakubova via Phabricator via llvm-commits
- [PATCH] D159094: [BOLT][test] Fix cross-compilation tests after D151920
Elvina Yakubova via Phabricator via llvm-commits
- [PATCH] D158495: [PowerPC] Try to use less instructions to materialize 64-bit constant when High32=Low32
Esme Yi via Phabricator via llvm-commits
- [PATCH] D158495: [PowerPC] Try to use less instructions to materialize 64-bit constant when High32=Low32
Esme Yi via Phabricator via llvm-commits
- [PATCH] D157458: [X86] Run X86FastPreTileConfigPass only with FastISel.
Evgenii Kudriashov via Phabricator via llvm-commits
- [PATCH] D157458: [X86] Run X86FastPreTileConfigPass only with FastISel.
Evgenii Kudriashov via Phabricator via llvm-commits
- [PATCH] D157540: [JITLink][AArch32] Fixes for initial AArc32 backend
Eymen Ünay via Phabricator via llvm-commits
- [PATCH] D157540: [JITLink][AArch32] Fixes for initial AArc32 backend
Eymen Ünay via Phabricator via llvm-commits
- [PATCH] D158280: [jitlink/rtdydl][checker] Construct disassembler at every decodeInst
Eymen Ünay via Phabricator via llvm-commits
- [PATCH] D158280: [jitlink/rtdydl][checker] Add TargetFlag dependent disassembler switching support
Eymen Ünay via Phabricator via llvm-commits
- [PATCH] D159492: Reapply [jitlink/rtdydl][checker] Add TargetFlag dependent disassembler switching support
Eymen Ünay via Phabricator via llvm-commits
- [PATCH] D158280: [jitlink/rtdydl][checker] Add TargetFlag dependent disassembler switching support
Eymen Ünay via Phabricator via llvm-commits
- [PATCH] D159492: Reapply [jitlink/rtdydl][checker] Add TargetFlag dependent disassembler switching support
Eymen Ünay via Phabricator via llvm-commits
- [PATCH] D158280: [jitlink/rtdydl][checker] Add TargetFlag dependent disassembler switching support
Eymen Ünay via Phabricator via llvm-commits
- [compiler-rt] [MLIR] Enabling Intel GPU Integration. (PR #65539)
Fabian Mora via llvm-commits
- [llvm] [MLIR] Enabling Intel GPU Integration. (PR #65539)
Fabian Mora via llvm-commits
- [lld] [MLIR] Enabling Intel GPU Integration. (PR #65539)
Fabian Mora via llvm-commits
- [compiler-rt] [MLIR] Enabling Intel GPU Integration. (PR #65539)
Fabian Mora via llvm-commits
- [compiler-rt] fdb29f7 - [scudo] Rename AllocatorRingBuffer into scudo:ring_buffer
Fabio D'Urso via llvm-commits
- [llvm] [test] Use host platform specific error message substitution in lit tests (PR #65328)
Fanbo Meng via llvm-commits
- [llvm] [llvm-cov] - Output better error message when the error kind is `coveragemap_error::malforme`. (PR #65264)
Fangrui Song via llvm-commits
- [llvm] [llvm-cov] - Output better error message when the error kind is `coveragemap_error::malforme`. (PR #65264)
Fangrui Song via llvm-commits
- [llvm] [llvm-cov] - Output better error message when the error kind is `coveragemap_error::malforme`. (PR #65264)
Fangrui Song via llvm-commits
- [llvm] [llvm-cov] - Output better error message when the error kind is `coveragemap_error::malforme`. (PR #65264)
Fangrui Song via llvm-commits
- [llvm] [llvm-cov] - Output better error message when the error kind is `coveragemap_error::malforme`. (PR #65264)
Fangrui Song via llvm-commits
- [llvm] Add a GitHub team to subscribe to WebAssembly backend (PR #65419)
Fangrui Song via llvm-commits
- [llvm] [ADT] Fix a comment typo (PR #65497)
Fangrui Song via llvm-commits
- [llvm] [ADT] Fix a comment typo (PR #65497)
Fangrui Song via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the MIPS backend (PR #65384)
Fangrui Song via llvm-commits
- [lld] [lld/ELF, gold] Remove transitionary opaque pointer flags (PR #65529)
Fangrui Song via llvm-commits
- [llvm] [llvm-nm] Fix msan error in llvm-nm/wasm/weak-symbols.yaml.test (PR #65538)
Fangrui Song via llvm-commits
- [llvm] [llvm-nm] Fix msan error in llvm-nm/wasm/weak-symbols.yaml.test (PR #65538)
Fangrui Song via llvm-commits
- [llvm] [llvm-nm] Fix msan error in llvm-nm/wasm/weak-symbols.yaml.test (PR #65538)
Fangrui Song via llvm-commits
- [llvm] [llvm-nm] Fix msan error in llvm-nm/wasm/weak-symbols.yaml.test (PR #65538)
Fangrui Song via llvm-commits
- [llvm] Add llvm-binary-utilities to .github/CODEOWNERS (PR #65545)
Fangrui Song via llvm-commits
- [llvm] Add llvm-binary-utilities to .github/CODEOWNERS (PR #65545)
Fangrui Song via llvm-commits
- [llvm] Add llvm-binary-utilities to .github/CODEOWNERS (PR #65545)
Fangrui Song via llvm-commits
- [llvm] Add llvm-binary-utilities to .github/CODEOWNERS (PR #65545)
Fangrui Song via llvm-commits
- [llvm] Add llvm-binary-utilities to .github/CODEOWNERS (PR #65545)
Fangrui Song via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
Fangrui Song via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
Fangrui Song via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
Fangrui Song via llvm-commits
- [llvm] [llvm-readelf] Add --extra-sym-info (PR #65580)
Fangrui Song via llvm-commits
- [llvm] [llvm-readelf] Add --extra-sym-info (PR #65580)
Fangrui Song via llvm-commits
- [llvm] [GitHub] Add teams for ADT and Support (PR #65519)
Fangrui Song via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
Fangrui Song via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
Fangrui Song via llvm-commits
- [llvm] Add llvm-binary-utilities to .github/CODEOWNERS (PR #65545)
Fangrui Song via llvm-commits
- [llvm] [llvm-nm] Fix heap-use-after-free while executing 'llvm-nm -n --export-symbols' (PR #65668)
Fangrui Song via llvm-commits
- [llvm] Add llvm-binary-utilities to .github/CODEOWNERS (PR #65545)
Fangrui Song via llvm-commits
- [llvm] Add llvm-binary-utilities to .github/CODEOWNERS (PR #65545)
Fangrui Song via llvm-commits
- [llvm] Add llvm-binary-utilities to .github/CODEOWNERS (PR #65545)
Fangrui Song via llvm-commits
- [llvm] [llvm-nm] Fix heap-use-after-free while executing 'llvm-nm -n --export-symbols' (PR #65668)
Fangrui Song via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Fangrui Song via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Fangrui Song via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Fangrui Song via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Fangrui Song via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Fangrui Song via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Fangrui Song via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Fangrui Song via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Fangrui Song via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Fangrui Song via llvm-commits
- [llvm] Reland "[CUDA][HIP] Fix overloading resolution in global var init" (PR #65606)
Fangrui Song via llvm-commits
- [llvm] [libc++] Fix CODEOWNERS file for libc++ (PR #65344)
Fangrui Song via llvm-commits
- [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)
Fangrui Song via llvm-commits
- [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)
Fangrui Song via llvm-commits
- [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)
Fangrui Song via llvm-commits
- [llvm] Add llvm-binary-utilities to .github/CODEOWNERS (PR #65545)
Fangrui Song via llvm-commits
- [llvm] [llvm-readelf] Add --extra-sym-info (PR #65580)
Fangrui Song via llvm-commits
- [llvm] c6a101d - [llvm-readobj][test] Test -s with an invalid section name
Fangrui Song via llvm-commits
- [llvm] [llvm-readelf] Add --extra-sym-info (PR #65580)
Fangrui Song via llvm-commits
- [llvm] [llvm-readelf] Add --extra-sym-info (PR #65580)
Fangrui Song via llvm-commits
- [llvm] [llvm-readelf] Add --extra-sym-info (PR #65580)
Fangrui Song via llvm-commits
- [llvm] [llvm-readelf] Add --extra-sym-info (PR #65580)
Fangrui Song via llvm-commits
- [llvm] [llvm-readelf] Add --extra-sym-info (PR #65580)
Fangrui Song via llvm-commits
- [llvm] [GitHub] Add more CODEOWNERS for top level projects (PR #65509)
Fangrui Song via llvm-commits
- [llvm] Update GoogleTest to v1.14.0 (PR #65823)
Fangrui Song via llvm-commits
- [llvm] Update GoogleTest to v1.14.0 (PR #65823)
Fangrui Song via llvm-commits
- [lld] [ELF] Respect orders of symbol assignments and DEFINED (PR #65866)
Fangrui Song via llvm-commits
- [lld] [ELF] Respect orders of symbol assignments and DEFINED (PR #65866)
Fangrui Song via llvm-commits
- [lld] [ELF] Respect orders of symbol assignments and DEFINED (PR #65866)
Fangrui Song via llvm-commits
- [lld] 21ac457 - [ELF] Priorize the last catch-all pattern in version scripts
Fangrui Song via llvm-commits
- [llvm] 9f77fac - [Driver] Properly report error for unsupported powerpc darwin/macos triples
Fangrui Song via llvm-commits
- [llvm] 61c44f1 - [X86] FastISel -fno-pic: emit R_386_PC32 when calling an intrinsic
Fangrui Song via llvm-commits
- [llvm] 0649594 - [M68k] Swap operands of atomic_store after D123143
Fangrui Song via llvm-commits
- [PATCH] D159082: [ELF][RISCV] Implement --emit-relocs with relaxation
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D156767: [AArch64] [BranchRelaxation] Optimize for hot code size in AArch64 branch relaxation
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D156767: [AArch64] [BranchRelaxation] Optimize for hot code size in AArch64 branch relaxation
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D156767: [AArch64] [BranchRelaxation] Optimize for hot code size in AArch64 branch relaxation
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D150987: [llvm-nm] Add --line-numbers flag
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D159082: [ELF][RISCV] Implement --emit-relocs with relaxation
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D159082: [ELF][RISCV] Implement --emit-relocs with relaxation
Fangrui Song via Phabricator via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Felipe de Azevedo Piovezan via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Felipe de Azevedo Piovezan via llvm-commits
- [llvm] [lldb] Allow lldbDataFormatters.py to be used by other names (NFC) (PR #65528)
Felipe de Azevedo Piovezan via llvm-commits
- [llvm] f5fc8b6 - [DebugInfo][NFC] Move ObjC Selector name handling to lib DebugInfo
Felipe de Azevedo Piovezan via llvm-commits
- [llvm] ab0eb59 - [DWARFVerifier] Allow ObjectiveC names in dwarf_debug tables
Felipe de Azevedo Piovezan via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Felipe de Azevedo Piovezan via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Felipe de Azevedo Piovezan via llvm-commits
- [PATCH] D158675: [NFC][AsmPrinter] Refactor DbgVariable as a std::variant
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D159468: [AsmPrinter][DwarfDebug] Skip vars with fragments in different location kinds
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D159468: [AsmPrinter][DwarfDebug] Skip vars with fragments in different location kinds
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D158675: [NFC][AsmPrinter] Refactor DbgVariable as a std::variant
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D158980: [DebugInfo][NFC] Move ObjC Selector name handling to lib DebugInfo
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D158980: [DebugInfo][NFC] Move ObjC Selector name handling to lib DebugInfo
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D159471: [DWARFVerifier] Allow ObjectiveC names in dwarf_debug tables
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D159471: [DWARFVerifier] Allow ObjectiveC names in dwarf_debug tables
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D158980: [DebugInfo][NFC] Move ObjC Selector name handling to lib DebugInfo
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D158980: [DebugInfo][NFC] Move ObjC Selector name handling to lib DebugInfo
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D158980: [DebugInfo][NFC] Move ObjC Selector name handling to lib DebugInfo
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D159471: [DWARFVerifier] Allow ObjectiveC names in dwarf_debug tables
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D159471: [DWARFVerifier] Allow ObjectiveC names in dwarf_debug tables
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D159471: [DWARFVerifier] Allow ObjectiveC names in dwarf_debug tables
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D159471: [DWARFVerifier] Allow ObjectiveC names in dwarf_debug tables
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D159484: [DebugInfo] Parse StrOffsets section if needed
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D159484: [DebugInfo] Parse StrOffsets section if needed
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D159468: [AsmPrinter][DwarfDebug] Skip vars with fragments in different location kinds
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- [PATCH] D159484: [DebugInfo] Parse StrOffsets section if needed
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [llvm] 0609b65 - [SCEV] Fix potentially empty set for unsigned ranges
Florian Hahn via llvm-commits
- [llvm] cb54522 - [LV] Add test coverage for adding DebugLoc to vector select.
Florian Hahn via llvm-commits
- [llvm] 3fa1b25 - [VPlan] Print blend recipe as operand directly, instead of IR PHI.
Florian Hahn via llvm-commits
- [llvm] 168e23c - [VPlan] Remove reference to Instr when setting debug loc. (NFCI)
Florian Hahn via llvm-commits
- [llvm] 165e24a - [VPlan] Move DebugLoc to VPRecipeBase (NFCI).
Florian Hahn via llvm-commits
- [llvm] [VectorCombine] Enable transform 'scalarizeLoadExtract' for scalable vector types (PR #65443)
Florian Hahn via llvm-commits
- [llvm] [VectorCombine][test] Supplement tests of the load-extractelement seq… (PR #65442)
Florian Hahn via llvm-commits
- [llvm] [VectorCombine][test] Supplement tests of the load-extractelement seq… (PR #65442)
Florian Hahn via llvm-commits
- [llvm] [VectorCombine][test] Supplement tests of the load-extractelement seq… (PR #65442)
Florian Hahn via llvm-commits
- [llvm] 4c9223c - [ComplexDeinterleaving] Use MapVector to fix codegen non-determinism.
Florian Hahn via llvm-commits
- [llvm] 785e706 - [VPlan] Don't rely on underlying instr in VPWidenRecipe (NFCI).
Florian Hahn via llvm-commits
- [llvm] 3e2d564 - [VPlan] Use VPRecipeWithFlags for VPScalarIVStepsRecipe (NFC).
Florian Hahn via llvm-commits
- [llvm] 08de650 - [LV] Return debug loc directly from getDebugLocFromInstrOrOps (NFCI)
Florian Hahn via llvm-commits
- [PATCH] D159160: [SCEV] Fix potentially empty set for unsigned ranges
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D157484: [VPlan] Support scalable vectors in outer-loop vectorization
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D152022: [CodeGen] Add support for reductions in ComplexDeinterleaving pass
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- [llvm] 4bbc903 - [InstCombine] Baseline tests for folding ((A&B)^A)|((A&B)^B) to A^B
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Jakub Kuderski via llvm-commits
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Jakub Kuderski via llvm-commits
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James Y Knight via llvm-commits
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Jan Patrick Lehr via llvm-commits
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- [llvm] [GlobalISel] Fold G_SHUFFLE_VECTOR with a single element mask to G_EXTRACT_VECTOR_ELT (PR #65342)
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- [llvm] [GlobalISel] Fold G_SHUFFLE_VECTOR with a single element mask to G_EXTRACT_VECTOR_ELT (PR #65342)
Jay Foad via llvm-commits
- [llvm] [GlobalISel] Fold G_SHUFFLE_VECTOR with a single element mask to G_EXTRACT_VECTOR_ELT (PR #65342)
Jay Foad via llvm-commits
- [llvm] [X86] Simplify the API of FixupBWInstPass::getSuperRegDestIfDead. NFC. (PR #65581)
Jay Foad via llvm-commits
- [llvm] [X86] Simplify the API of FixupBWInstPass::getSuperRegDestIfDead. NFC. (PR #65581)
Jay Foad via llvm-commits
- [llvm] [X86] Simplify the API of FixupBWInstPass::getSuperRegDestIfDead. NFC. (PR #65581)
Jay Foad via llvm-commits
- [llvm] [AArch64][GlobalISel] Select UMULL instruction (PR #65469)
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- [llvm] [X86] Convert X86FixupBWInsts from LivePhysRegs to LiveRegUnits. NFCI. (PR #65592)
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- [llvm] [X86] Convert X86FixupBWInsts from LivePhysRegs to LiveRegUnits. NFCI. (PR #65592)
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- [llvm] [X86] Convert X86FixupBWInsts from LivePhysRegs to LiveRegUnits. NFCI. (PR #65592)
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- [llvm] [AMDGPU] Remove predicate on real packed fp32 instructions (PR #65589)
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- [llvm] [CodeGen] Implement MVT::getSizeInBits with a lookup table (PR #65604)
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- [llvm] [CodeGen] Implement MVT::getSizeInBits with a lookup table (PR #65604)
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- [llvm] [CodeGen] Implement MVT::getSizeInBits with a lookup table (PR #65604)
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- [llvm] [LiveRegUnits] Remove use of std::function from phys_regs_and_masks (PR #65615)
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- [llvm] [LiveRegUnits] Remove use of std::function from phys_regs_and_masks (PR #65615)
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- [llvm] [LiveRegUnits] Remove use of std::function from phys_regs_and_masks (PR #65615)
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- [llvm] [LiveRegUnits] Remove use of std::function from phys_regs_and_masks (PR #65615)
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- [llvm] [LiveRegUnits] Remove use of std::function from phys_regs_and_masks (PR #65615)
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- [llvm] [LiveRegUnits] Remove use of std::function from phys_regs_and_masks (PR #65615)
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- [llvm] [LiveRegUnits] Remove use of std::function from phys_regs_and_masks (PR #65615)
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- [llvm] [LiveRegUnits] Remove use of std::function from phys_regs_and_masks (PR #65615)
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- [llvm] [LiveRegUnits] Remove use of std::function from phys_regs_and_masks (PR #65615)
Jay Foad via llvm-commits
- [llvm] [LiveRegUnits] Remove use of std::function from phys_regs_and_masks (PR #65615)
Jay Foad via llvm-commits
- [llvm] [CodeGen] Implement MVT::getSizeInBits with a lookup table (PR #65604)
Jay Foad via llvm-commits
- [llvm] e0094ac - [IR] Move trivial accessor Module::getDataLayout into header
Jay Foad via llvm-commits
- [llvm] Clean up strange uses of getAnalysisIfAvailable (PR #65729)
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- [llvm] Clean up strange uses of getAnalysisIfAvailable (PR #65729)
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- [llvm] Clean up strange uses of getAnalysisIfAvailable (PR #65729)
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- [llvm] AMDGPU: Scratch instructions are trivially disjoint from SMEM and buffer instructions (PR #65287)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Mark S_NOP as having side effects (PR #65745)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Mark S_NOP as having side effects (PR #65745)
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- [llvm] [AMDGPU] Mark S_NOP as having side effects (PR #65745)
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- [llvm] [AMDGPU] Mark S_NOP as having side effects (PR #65745)
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- [llvm] [AMDGPU] Mark S_NOP as having side effects (PR #65745)
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- [llvm] [AMDGPU] Mark S_NOP as having side effects (PR #65745)
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- [llvm] [AMDGPU] Mark S_NOP as having side effects (PR #65745)
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- [llvm] [X86] Convert X86FixupBWInsts from LivePhysRegs to LiveRegUnits. NFCI. (PR #65592)
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- [llvm] [X86] Convert X86FixupBWInsts from LivePhysRegs to LiveRegUnits. NFCI. (PR #65592)
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- [llvm] [X86] Convert X86FixupBWInsts from LivePhysRegs to LiveRegUnits. NFCI. (PR #65592)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Cope with SelectionDAG::UpdateNodeOperands returning a different SDNode (PR #65765)
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- [llvm] [AMDGPU] Cope with SelectionDAG::UpdateNodeOperands returning a different SDNode (PR #65765)
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- [llvm] [AMDGPU] Cope with SelectionDAG::UpdateNodeOperands returning a different SDNode (PR #65765)
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- [llvm] [AMDGPU] Cope with SelectionDAG::UpdateNodeOperands returning a different SDNode (PR #65765)
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- [llvm] [AMDGPU] Cope with SelectionDAG::UpdateNodeOperands returning a different SDNode (PR #65765)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Cope with SelectionDAG::UpdateNodeOperands returning a different SDNode (PR #65765)
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- [llvm] AMDGPU: Fix handling of -0 in round lowering (PR #65761)
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- [llvm] [X86] Convert X86FixupBWInsts from LivePhysRegs to LiveRegUnits. NFCI. (PR #65592)
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- [llvm] [AMDGPU] New intrinsic void llvm.amdgcn.s.nop(i16) (PR #65757)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Cope with SelectionDAG::UpdateNodeOperands returning a different SDNode (PR #65765)
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- [llvm] fd453e2 - [TwoAddressInstruction] Use member functions instead of static helpers
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- [PATCH] D158750: New intrinsic void llvm.amdgcn.s.nop(i16)
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- [PATCH] D158167: [AMDGPU] Handle isUndef flag in LiveVariables::recomputeForSingleDefVirtReg
Jay Foad via Phabricator via llvm-commits
- [PATCH] D158750: New intrinsic void llvm.amdgcn.s.nop(i16)
Jay Foad via Phabricator via llvm-commits
- [PATCH] D158059: [AMDGPU/wmma] - Disable 3-address syntax for f16
Jay Foad via Phabricator via llvm-commits
- [PATCH] D158167: [AMDGPU] Handle isUndef flag in LiveVariables::recomputeForSingleDefVirtReg
Jay Foad via Phabricator via llvm-commits
- [PATCH] D156679: [WIP][AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already
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- [PATCH] D158750: New intrinsic void llvm.amdgcn.s.nop(i16)
Jay Foad via Phabricator via llvm-commits
- [llvm] [AMDGPU] Teach CalculateByteProvider about AMDGPUISD::PERM (PR #65547)
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- [llvm] [AMDGPU] Teach CalculateByteProvider about AMDGPUISD::PERM (PR #65547)
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- [llvm] [AMDGPU] Teach CalculateByteProvider about AMDGPUISD::PERM (PR #65547)
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- [llvm] [AMDGPU] Teach CalculateByteProvider about AMDGPUISD::PERM (PR #65547)
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- [llvm] [AMDGPU] Teach CalculateByteProvider about AMDGPUISD::PERM (PR #65547)
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- [llvm] [AMDGPU] Teach CalculateByteProvider about AMDGPUISD::PERM (PR #65547)
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- [llvm] 7fda1b7 - [AMDGPU]: Allow combining into v_dot4
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- [llvm] [AMDGPU] Teach CalculateByteProvider about AMDGPUISD::PERM (PR #65547)
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- [llvm] [AMDGPU] Add basic patterns to select lshl_or instead of v_perm (PR #65693)
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- [llvm] [AMDGPU] Add basic patterns to select lshl_or instead of v_perm (PR #65693)
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- [llvm] [AMDGPU] Add basic patterns to select lshl_or instead of v_perm (PR #65693)
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- [llvm] [AMDGPU] Add basic patterns to select lshl_or instead of v_perm (PR #65693)
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- [llvm] [AMDGPU] Add basic patterns to select lshl_or instead of v_perm (PR #65693)
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- [llvm] [AMDGPU] Improve selection into lshl_or (PR #65794)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Improve selection into lshl_or (PR #65794)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Improve selection into lshl_or (PR #65794)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Improve selection into lshl_or (PR #65794)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Improve selection into lshl_or (PR #65794)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Improve selection into lshl_or (PR #65794)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Improve selection into lshl_or (PR #65794)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Improve selection into lshl_or (PR #65794)
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- [PATCH] D155995: [AMDGPU]: Allow combining into v_dot4
Jeffrey Byrnes via Phabricator via llvm-commits
- [PATCH] D155995: [AMDGPU]: Allow combining into v_dot4
Jeffrey Byrnes via Phabricator via llvm-commits
- [PATCH] D155995: [AMDGPU]: Allow combining into v_dot4
Jeffrey Byrnes via Phabricator via llvm-commits
- [PATCH] D159303: [AMDGPU] Precommit test for i8 vector CopyToReg handling patch
Jeffrey Byrnes via Phabricator via llvm-commits
- [PATCH] D133731: [AMDGPU] Add Lower Bound to PipelineSolver
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- [PATCH] D133731: [AMDGPU] Add Lower Bound to PipelineSolver
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- [PATCH] D155995: [AMDGPU]: Allow combining into v_dot4
Jeffrey Byrnes via Phabricator via llvm-commits
- [PATCH] D155868: [AMDGPU] Add patterns for v_dot*_IU for GFX11
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- [llvm] 4427407 - [NFC][RemoveDIs] Create a new spelling of the moveBefore method
Jeremy Morse via llvm-commits
- [PATCH] D152468: [NFC][DebugInfo][RemoveDIs] Use iterators over instruction pointers when using IRBuilder in various passes
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- [PATCH] D157616: [ExtendLifetimes][2/4] Implement fake.use intrinsic in LLVM to extend the lifetime of operands
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- [PATCH] D152534: [NFC][DebugInfo][RemoveDIs] Use moveBeforePreserving when transforms intend to move dbg.values
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- [PATCH] D157616: [ExtendLifetimes][2/4] Implement fake.use intrinsic in LLVM to extend the lifetime of operands
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- [PATCH] D152468: [NFC][DebugInfo][RemoveDIs] Use iterators over instruction pointers when using IRBuilder in various passes
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- [PATCH] D152468: [NFC][DebugInfo][RemoveDIs] Use iterators over instruction pointers when using IRBuilder in various passes
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- [PATCH] D152534: [NFC][DebugInfo][RemoveDIs] Use moveBeforePreserving when transforms intend to move dbg.values
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- [PATCH] D152534: [NFC][DebugInfo][RemoveDIs] Use moveBeforePreserving when transforms intend to move dbg.values
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- [PATCH] D152468: [NFC][DebugInfo][RemoveDIs] Use iterators over instruction pointers when using IRBuilder in various passes
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- [PATCH] D152534: [NFC][DebugInfo][RemoveDIs] Use moveBeforePreserving when transforms intend to move dbg.values
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- [PATCH] D159485: [DebugInfo][RemoveDIs] Use getStableDebugLoc when picking IRBuilder source locations
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- [PATCH] D152468: [NFC][DebugInfo][RemoveDIs] Use iterators over instruction pointers when using IRBuilder in various passes
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- [llvm] [RISCV] Disable zcmp push/pop for variadic functions. (PR #65302)
Jessica Clarke via llvm-commits
- [llvm] y (PR #65434)
Jessica Clarke via llvm-commits
- [llvm] y (PR #65434)
Jessica Clarke via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Jessica Clarke via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Jessica Clarke via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Jessica Clarke via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Jessica Clarke via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Jessica Clarke via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Jessica Clarke via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Jessica Clarke via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Jessica Clarke via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Jessica Clarke via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Jessica Clarke via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Jessica Clarke via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Jessica Clarke via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Jessica Clarke via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Jessica Clarke via llvm-commits
- [PATCH] D159082: [ELF][RISCV] Implement --emit-relocs with relaxation
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D158059: [AMDGPU/wmma] - Disable 3-address syntax for f16
Jessica Del via Phabricator via llvm-commits
- [PATCH] D158059: [AMDGPU/wmma] - Disable 3-address syntax for f16
Jessica Del via Phabricator via llvm-commits
- [PATCH] D158059: [AMDGPU/wmma] - Disable 3-address syntax for f16
Jessica Del via Phabricator via llvm-commits
- [PATCH] D158059: [AMDGPU/wmma] - Disable 3-address syntax for f16
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- [PATCH] D158059: [AMDGPU/wmma] - Disable 3-address syntax for f16
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- [PATCH] D156095: [Bazel] Introduce `//compiler-rt:profile`
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- [lld] [lld][MachO] Add option to suppress mismatch profile errors (PR #65551)
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- [lld] [lld][MachO] Add option to suppress mismatch profile errors (PR #65551)
Jez Ng via llvm-commits
- [lld] [lld][MachO] Add option to suppress mismatch profile errors (PR #65551)
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- [compiler-rt] Enabling Intel GPU Integration. (PR #65539)
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- [lld] Enabling Intel GPU Integration. (PR #65539)
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- [llvm] Enabling Intel GPU Integration. (PR #65539)
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- [lld] [MLIR] Enabling Intel GPU Integration. (PR #65539)
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- [llvm] [MLIR] Enabling Intel GPU Integration. (PR #65539)
Jianhui Li via llvm-commits
- [compiler-rt] [MLIR] Enabling Intel GPU Integration. (PR #65539)
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- [lld] [MLIR] Enabling Intel GPU Integration. (PR #65539)
Jianhui Li via llvm-commits
- [compiler-rt] [MLIR] Enabling Intel GPU Integration. (PR #65539)
Jianhui Li via llvm-commits
- [llvm] [MLIR] Enabling Intel GPU Integration. (PR #65539)
Jianhui Li via llvm-commits
- [llvm] [RISCV][NFC] Remove unused checkline (PR #65560)
Jianjian Guan via llvm-commits
- [llvm] [RISCV][NFC] Remove unused checkline (PR #65560)
Jianjian Guan via llvm-commits
- [llvm] [RISCV][NFC] Remove unused checkline (PR #65560)
Jianjian Guan via llvm-commits
- [llvm] [RISCV][NFC] Remove unused checkline (PR #65560)
Jianjian Guan via llvm-commits
- [PATCH] D159053: [RISCV] Support select/merge like ops for fp16 vectors when only have Zvfhmin
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- [PATCH] D159053: [RISCV] Support select/merge like ops for fp16 vectors when only have Zvfhmin
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- [compiler-rt] 1438544 - [DFSAN] Silence parameter 'va_labels' set but not used warning (NFC)
Jie Fu via llvm-commits
- [llvm] 71b5f57 - [RISCV] Adjust first sp size to use c.addi16sp.
Jie Fu via llvm-commits
- [llvm] 1f3fa96 - [llvm-cov] Fix -Wcovered-switch-default in CoverageMapping.cpp (NFC)
Jie Fu via llvm-commits
- [llvm] 2f62c78 - [PowerPC] Fix build error in PPCAsmPrinter.cpp (NFC)
Jie Fu via llvm-commits
- [PATCH] D159431: [RISCV] adjust first sp size to use c.addi16sp.
Jie Fu via Phabricator via llvm-commits
- [PATCH] D159427: [InlineAsm] Add constraint A to getMemConstraintName
Jim Lin via Phabricator via llvm-commits
- [PATCH] D159267: [AArch64] Remove copy instruction between uaddlv and dup
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D159267: [AArch64] Remove copy instruction between uaddlv and dup
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D159267: [AArch64] Remove copy instruction between uaddlv and dup
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D159267: [AArch64] Remove copy instruction between uaddlv and dup
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D159267: [AArch64] Remove copy instruction between uaddlv and dup
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D159447: [AArch64] Replace uaddlv intrinsic with uaddlv sdnode
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D159267: [AArch64] Remove copy instruction between uaddlv and dup
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D159447: [AArch64] Replace uaddlv intrinsic with uaddlv sdnode
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D159447: [AArch64] Replace uaddlv intrinsic with uaddlv sdnode
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D159447: [AArch64] Replace uaddlv intrinsic with uaddlv sdnode
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D159265: [AArch64] Remove copy instruction between uaddlv and urshr
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D159265: [AArch64] Remove copy instruction between uaddlv and urshr
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D159265: [AArch64] Remove copy instruction between uaddlv and urshr
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D159265: [AArch64] Remove copy instruction between uaddlv and urshr
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D159265: [AArch64] Remove copy instruction between uaddlv and urshr
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D159265: [AArch64] Remove copy instruction between uaddlv and urshr
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D159267: [AArch64] Remove copy instruction between uaddlv and dup
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D159267: [AArch64] Remove copy instruction between uaddlv and dup
JinGu Kang via Phabricator via llvm-commits
- [llvm] 67fc0d3 - [AArch64] Remove copy instruction between uaddlv and dup
Jingu Kang via llvm-commits
- [llvm] 06ec1ff - [AArch64] Replace uaddlv intrinsic with uaddlv sdnode
Jingu Kang via llvm-commits
- [llvm] [lit] Echo full RUN lines in case of external shells (PR #65267)
Jinsong Ji via llvm-commits
- [llvm] [lit] Echo full RUN lines in case of external shells (PR #65267)
Jinsong Ji via llvm-commits
- [PATCH] D86596: Implement __isOSVersionAtLeast for Android
Jiyong Park via Phabricator via llvm-commits
- [llvm] [MC][NFC] Allow MCInstrAnalysis to store state (PR #65479)
Job Noorman via llvm-commits
- [llvm] [MC][NFC] Allow MCInstrAnalysis to store state (PR #65479)
Job Noorman via llvm-commits
- [llvm] [MC][NFC] Allow MCInstrAnalysis to store state (PR #65479)
Job Noorman via llvm-commits
- [llvm] [MC][NFC] Allow MCInstrAnalysis to store state (PR #65479)
Job Noorman via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Job Noorman via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Job Noorman via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Job Noorman via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Job Noorman via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Job Noorman via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Job Noorman via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Job Noorman via llvm-commits
- [llvm] [MC][NFC] Allow MCInstrAnalysis to store state (PR #65479)
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- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Job Noorman via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Job Noorman via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Job Noorman via llvm-commits
- [llvm] [RISCV][MC] Implement evaluateBranch for auipc+jalr pairs (PR #65480)
Job Noorman via llvm-commits
- [llvm] [BOLT][RISCV] Implement R_RISCV_PCREL_LO12_S (PR #65204)
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- [lld] 649cac3 - [ELF][RISCV] Implement --emit-relocs with relaxation
Job Noorman via llvm-commits
- [PATCH] D159082: [ELF][RISCV] Implement --emit-relocs with relaxation
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- [PATCH] D159082: [ELF][RISCV] Implement --emit-relocs with relaxation
Job Noorman via Phabricator via llvm-commits
- [PATCH] D158830: [RISCV][MC] Allow symbol diff expression directly as LI operand
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- [PATCH] D159114: [llvm-objdump][RISCV] Print target of auipc+jalr calls
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Joel E. Denny via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
- [llvm] [OpenMPOpt] Fix incorrect end-of-kernel barrier removal (PR #65670)
Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
- [llvm] [Attributor] Avoid AS-cast for function pointers (PR #65825)
Johannes Doerfert via llvm-commits
- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65785)
Johannes Doerfert via llvm-commits
- [llvm] 67635b6 - [OpenMPOpt][NFC] Precommit test
Johannes Doerfert via llvm-commits
- [llvm] [OpenMPOpt] Allow indirect calls in AAKernelInfoCallSite (PR #65836)
Johannes Doerfert via llvm-commits
- [llvm] [OpenMPOpt] Allow indirect calls in AAKernelInfoCallSite (PR #65836)
Johannes Doerfert via llvm-commits
- [llvm] [OpenMPOpt] Allow indirect calls in AAKernelInfoCallSite (PR #65836)
Johannes Doerfert via llvm-commits
- [llvm] [OpenMPOpt] Allow indirect calls in AAKernelInfoCallSite (PR #65836)
Johannes Doerfert via llvm-commits
- [llvm] [OpenMPOpt] Allow indirect calls in AAKernelInfoCallSite (PR #65836)
Johannes Doerfert via llvm-commits
- [llvm] [OpenMPOpt] Allow indirect calls in AAKernelInfoCallSite (PR #65836)
Johannes Doerfert via llvm-commits
- [llvm] [OpenMPOpt] Allow indirect calls in AAKernelInfoCallSite (PR #65836)
Johannes Doerfert via llvm-commits
- [llvm] [OpenMPOpt] Allow indirect calls in AAKernelInfoCallSite (PR #65836)
Johannes Doerfert via llvm-commits
- [llvm] [OpenMPOpt] Allow indirect calls in AAKernelInfoCallSite (PR #65836)
Johannes Doerfert via llvm-commits
- [PATCH] D159402: [ValueTracking] Consider assumptions in isKnownNonEqual
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- [llvm] fae3f9e - [ARM] Fix prologue/epilogue for pacbti-m leaf functions
John Brawn via llvm-commits
- [PATCH] D157865: [ARM] Fix prologue/epilogue for pacbti-m leaf functions
John Brawn via Phabricator via llvm-commits
- [PATCH] D148465: [Demangle] demangle builtin type transformations
John McCall via Phabricator via llvm-commits
- [llvm] [llvm] Add LLVM_CTOR_NODISCARD (PR #65418)
Jon Roelofs via llvm-commits
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Jon Roelofs via llvm-commits
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Jon Roelofs via llvm-commits
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Jon Roelofs via llvm-commits
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Jon Roelofs via llvm-commits
- [llvm] [llvm] Add LLVM_CTOR_NODISCARD (PR #65418)
Jon Roelofs via llvm-commits
- [llvm] [llvm] Add LLVM_CTOR_NODISCARD (PR #65418)
Jon Roelofs via llvm-commits
- [PATCH] D159162: [llvm] Add assembly syntax highlighting
Jon Roelofs via Phabricator via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the MIPS backend (PR #65384)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the MIPS backend (PR #65384)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the MIPS backend (PR #65384)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the MIPS backend (PR #65384)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the MIPS backend (PR #65384)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the MIPS backend (PR #65384)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the MIPS backend (PR #65384)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Add LLVM_CTOR_NODISCARD (PR #65418)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Add LLVM_CTOR_NODISCARD (PR #65418)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Add LLVM_CTOR_NODISCARD (PR #65418)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Add LLVM_CTOR_NODISCARD (PR #65418)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Add LLVM_CTOR_NODISCARD (PR #65418)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Add LLVM_CTOR_NODISCARD (PR #65418)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Add LLVM_CTOR_NODISCARD (PR #65418)
Jonas Devlieghere via llvm-commits
- [llvm] 511b4dd - [llvm] Add LLVM_CTOR_NODISCARD to WithColor
Jonas Devlieghere via llvm-commits
- [llvm] [lldb] Add lldb team to CODEOWNERS (PR #65454)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the MIPS backend (PR #65384)
Jonas Devlieghere via llvm-commits
- [llvm] [lldb] Add lldb team to CODEOWNERS (PR #65454)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the MIPS backend (PR #65384)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the MIPS backend (PR #65384)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the MIPS backend (PR #65384)
Jonas Devlieghere via llvm-commits
- [llvm] Add llvm-binary-utilities to .github/CODEOWNERS (PR #65545)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the ARM backend (PR #65561)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the ARM backend (PR #65561)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the ARM backend (PR #65561)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the ARM backend (PR #65561)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the ARM backend (PR #65561)
Jonas Devlieghere via llvm-commits
- [llvm] Add GitHub workflow for check Python file formatting (PR #65482)
Jonas Devlieghere via llvm-commits
- [compiler-rt] 0f50d01 - Revert RTSanitizerCommonSymbolizerInternal changes
Jonas Devlieghere via llvm-commits
- [llvm] [NFC]Add assert to avoid possibly deref nullptr (PR #65564)
Jonas Devlieghere via llvm-commits
- [llvm] [NFC]Add assert to avoid possibly deref nullptr (PR #65564)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Add CODE_OF_CONDUCT.md (PR #65816)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Add CODE_OF_CONDUCT.md (PR #65816)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Add CODE_OF_CONDUCT.md (PR #65816)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Add CODE_OF_CONDUCT.md (PR #65816)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Add CODE_OF_CONDUCT.md (PR #65816)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Add CODE_OF_CONDUCT.md (PR #65816)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Add CODE_OF_CONDUCT.md (PR #65816)
Jonas Devlieghere via llvm-commits
- [llvm] [llvm] Add CODE_OF_CONDUCT.md (PR #65816)
Jonas Devlieghere via llvm-commits
- [llvm] [Documentation] Replace recommonmark by myst-parser (PR #65664)
Jonas Devlieghere via llvm-commits
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Jonas Devlieghere via llvm-commits
- [PATCH] D159384: [llvm] Adopt WithMarkup in the MIPS backend
Jonas Devlieghere via Phabricator via llvm-commits
- [PATCH] D159162: [llvm] Add assembly syntax highlighting
Jonas Devlieghere via Phabricator via llvm-commits
- [llvm] [Github][OpenMP] Adding rule for OpenMP label (PR #65331)
Joseph Huber via llvm-commits
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Joseph Huber via llvm-commits
- [lld] [AMDGPU] Make default AMDHSA Code Object Version to be 5 (PR #65410)
Joseph Huber via llvm-commits
- [llvm] [WIP][AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already (PR #65735)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [WIP][AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already (PR #65735)
Juan Manuel Martinez Caamaño via llvm-commits
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Juan Manuel Martinez Caamaño via llvm-commits
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Juan Manuel Martinez Caamaño via llvm-commits
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- [PATCH] D156679: [WIP][AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already
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- [PATCH] D159239: [AMDGPU] Incorrect error message regarding SCC modifier
Jun Wang via Phabricator via llvm-commits
- [PATCH] D159239: [AMDGPU] Incorrect error message regarding SCC modifier
Jun Wang via Phabricator via llvm-commits
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Jun Wang via Phabricator via llvm-commits
- [PATCH] D159239: [AMDGPU] Incorrect error message regarding SCC modifier
Jun Wang via Phabricator via llvm-commits
- [PATCH] D159103: [Driver][HLSL] Improve diagnostics for invalid shader model and stage
Justin Bogner via Phabricator via llvm-commits
- [PATCH] D159363: [clangd] SIGSEGV at clangd: DiagnosticConsumer Is Used After Free
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- [PATCH] D159363: [clangd] SIGSEGV at clangd: DiagnosticConsumer Is Used After Free
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- [PATCH] D158566: Add CLANGD_INCLUDE_TESTS as a separate flag to control clangd tests
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- [llvm] [PowerPC] Prefer VSX compare in vector selection (PR #65295)
Kai Luo via llvm-commits
- [PATCH] D158708: [JITLink][PowerPC] Fix incorrect assertion of addend for R_PPC64_REL24
Kai Luo via Phabricator via llvm-commits
- [PATCH] D159250: [X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D159250: [X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features
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- [llvm] [opt] Remove reference to new PM from description of optimization level flags (PR #65169)
Karl-Johan Karlsson via llvm-commits
- [llvm] e2e6846 - [RISCV] Use isNullConstant (NFC)
Kazu Hirata via llvm-commits
- [llvm] 2f0153a - [SelectionDAG] Remove deprecated getLoad, getStore, etc
Kazu Hirata via llvm-commits
- [llvm] c7b25fa - [llvm-exegesis] Use range-based for loops (NFC)
Kazu Hirata via llvm-commits
- [PATCH] D159448: [SelectionDAG] Remove deprecated getLoad, getStore, etc
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- [PATCH] D159448: [SelectionDAG] Remove deprecated getLoad, getStore, etc
Kazu Hirata via Phabricator via llvm-commits
- [PATCH] D159004: [libc++abi][VE] Support VE in long double demangler
Kazushi Marukawa via Phabricator via llvm-commits
- [PATCH] D152054: [OpenMP] Codegen support for thread_limit on target directive
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- [PATCH] D152054: [OpenMP] Codegen support for thread_limit on target directive
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- [PATCH] D158462: [OMPIRBuilder] Fix shared clause for task construct
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- [llvm] [RISCV] Disable zcmp push/pop for variadic functions. (PR #65302)
Kito Cheng via llvm-commits
- [llvm] [RISCV] Disable zcmp push/pop for variadic functions. (PR #65302)
Kito Cheng via llvm-commits
- [llvm] af9b25f - [RISCV] Optimize floating point scalar move and splat
Kito Cheng via llvm-commits
- [llvm] [TwoAddressInstruction] Check if segment was found when updating subreg LIs (PR #65916)
Kito Cheng via llvm-commits
- [PATCH] D159368: [RISCV] Remove SEW operand for load/store and SEW-aware pseudos
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D158177: [RISCV] Optimize floating point scalar move and splat
Kito Cheng via Phabricator via llvm-commits
- [llvm] [SimplifyCFG] handle monotonic wrapped case for D150943 (PR #65882)
Kohei Asano via llvm-commits
- [llvm] [SimplifyCFG] handle monotonic wrapped case for D150943 (PR #65882)
Kohei Asano via llvm-commits
- [llvm] [SimplifyCFG] handle monotonic wrapped case for D150943 (PR #65882)
Kohei Asano via llvm-commits
- [llvm] [SimplifyCFG] handle monotonic wrapped case for D150943 (PR #65882)
Kohei Asano via llvm-commits
- [PATCH] D159075: [MemCpyOpt] implement forward dataflow sensitive stack-move optimization
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D159075: [MemCpyOpt] implement forward dataflow sensitive stack-move optimization
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- [PATCH] D150943: [SimplifyCFG] add nsw on BuildLookuptable LinearMap calculation
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- [PATCH] D158861: [llvm] Move CallInst::CreateMalloc to IRBuilderBase::CreateMalloc
Konrad Wilhelm Kleine via Phabricator via llvm-commits
- [PATCH] D159418: Move CallInst::CreateFree to IRBuilderBase
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- [PATCH] D158861: [llvm] Move CallInst::CreateMalloc to IRBuilderBase::CreateMalloc
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Konstantin Varlamov via llvm-commits
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Konstantin Varlamov via llvm-commits
- [llvm] [libc++] Implement ranges::contains (PR #65148)
Konstantin Varlamov via llvm-commits
- [compiler-rt] [libc++] Implement ranges::contains (PR #65148)
Konstantin Varlamov via llvm-commits
- [compiler-rt] [libc++] Implement ranges::contains (PR #65148)
Konstantin Varlamov via llvm-commits
- [llvm] [libc++] Implement ranges::contains (PR #65148)
Konstantin Varlamov via llvm-commits
- [llvm] [libc++] Implement ranges::contains (PR #65148)
Konstantin Varlamov via llvm-commits
- [PATCH] D157267: [NewGVN] Don't always update use counts for SSA copies
Konstantina Mitropoulou via Phabricator via llvm-commits
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Kristof Beyls via llvm-commits
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LLVM GN Syncbot via llvm-commits
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Lang Hames via llvm-commits
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Lang Hames via Phabricator via llvm-commits
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Lei Huang via llvm-commits
- [PATCH] D158328: [PowerPC] Merge rotate and clear into single instruction.
Lei Huang via Phabricator via llvm-commits
- [PATCH] D155730: [PowerPC] Add a pass to merge all of the constant global arrays into one pool.
Lei Huang via Phabricator via llvm-commits
- [PATCH] D72959: Relative VTables ABI on Fuchsia
Leonard Chan via Phabricator via llvm-commits
- [PATCH] D158824: [RISCV][MC] MC layer support for xcvmem and xcvelw extensions
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D158587: [sanitizer][msan] VarArgHelper for loongarch64
Limin Zhang via Phabricator via llvm-commits
- [PATCH] D158587: [sanitizer][msan] VarArgHelper for loongarch64
Limin Zhang via Phabricator via llvm-commits
- [PATCH] D158587: [sanitizer][msan] VarArgHelper for loongarch64
Limin Zhang via Phabricator via llvm-commits
- [PATCH] D158587: [sanitizer][msan] VarArgHelper for loongarch64
Limin Zhang via Phabricator via llvm-commits
- [PATCH] D156618: [IR] Fix a memory leak if Function::dropAllReferences() is followed by setHungoffOperand
Liqiang Tao via Phabricator via llvm-commits
- [PATCH] D156618: [IR] Fix a memory leak if Function::dropAllReferences() is followed by setHungoffOperand
Liqiang Tao via Phabricator via llvm-commits
- [PATCH] D159478: [VP] IR expansion for inttoptr/ptrtoint
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D159478: [VP] IR expansion for inttoptr/ptrtoint
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D159478: [VP] IR expansion for inttoptr/ptrtoint
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D159491: [VP] IR expansion for zext/sext/trunc/fptosi/fptosi/sitofp/uitofp/fptrunc/fpext
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D159493: [VP]
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D159494: [VP] IR expansion for maxnum/minnum
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D159495: [VP] IR expansion for abs/smax/smin/umax/umin
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D159495: [VP] IR expansion for abs/smax/smin/umax/umin
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D159495: [VP] IR expansion for abs/smax/smin/umax/umin
LiqinWeng via Phabricator via llvm-commits
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LiqinWeng via Phabricator via llvm-commits
- [PATCH] D159491: [VP] IR expansion for zext/sext/trunc/fptosi/fptosi/sitofp/uitofp/fptrunc/fpext
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D159491: [VP] IR expansion for zext/sext/trunc/fptosi/fptosi/sitofp/uitofp/fptrunc/fpext
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D159494: [VP] IR expansion for maxnum/minnum
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D159494: [VP] IR expansion for maxnum/minnum
LiqinWeng via Phabricator via llvm-commits
- [llvm] [NFC] fix failed ompt tests on M1 device (PR #65696)
Lixi Zhou via llvm-commits
- [compiler-rt] [NFC] fix failed ompt tests on M1 device (PR #65696)
Lixi Zhou via llvm-commits
- [llvm] [NFC] fix failed ompt tests on M1 device (PR #65696)
Lixi Zhou via llvm-commits
- [PATCH] D157484: [VPlan] Support scalable vectors in outer-loop vectorization
Lou via Phabricator via llvm-commits
- [llvm] [libc++] Fix CODEOWNERS file for libc++ (PR #65344)
Louis Dionne via llvm-commits
- [llvm] [libc++] Fix CODEOWNERS file for libc++ (PR #65344)
Louis Dionne via llvm-commits
- [llvm] [libc++] Fix CODEOWNERS file for libc++ (PR #65344)
Louis Dionne via llvm-commits
- [llvm] [libc++] Fix CODEOWNERS file for libc++ (PR #65344)
Louis Dionne via llvm-commits
- [llvm] [libc++] Fix CODEOWNERS file for libc++ (PR #65344)
Louis Dionne via llvm-commits
- [llvm] [libc++] Fix CODEOWNERS file for libc++ (PR #65344)
Louis Dionne via llvm-commits
- [PATCH] D112374: [clang] Implement ElaboratedType sugaring for types written bare
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D136522: [libcxx] patch for implementing ranges::find_last
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D111748: [CMake] Set the CMP0114 policy
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D158878: [runtimes][cmake] Propagate cmake arguments.
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D120186: [pstl] Implementation of Grand Central Dispatch backend
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D115105: [test-release.sh] Add an option to build lib projects as a part of default runtimes.
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D126122: Fix RUNPATH not accounting for LLVM_ENABLE_PER_TARGET_RUNTIME_DIR
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D150699: [compiler-rt] [libunwind] Remove workarounds for older CMake versions
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D157836: [RFC][IR] Correct lowering of `f128` intrinsics
Louis Dionne via Phabricator via llvm-commits
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Louis Dionne via Phabricator via llvm-commits
- [PATCH] D60750: [libc++][CMake] Clean up logic for choosing which unwinder lib to link with tests
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D154869: [Flang] [FlangRT] Introduce FlangRT project as solution to Flang's runtime LLVM integration
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D72959: Relative VTables ABI on Fuchsia
Louis Dionne via Phabricator via llvm-commits
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Louis Dionne via Phabricator via llvm-commits
- [PATCH] D148985: fix typo and clean whitespaces
Louis Dionne via Phabricator via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use BitVector. (PR #65423)
Lucas Duarte Prates via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use BitVector. (PR #65423)
Lucas Duarte Prates via llvm-commits
- [llvm] [ARM] Change CRC predicated to just HasCRC (PR #65591)
Lucas Duarte Prates via llvm-commits
- [PATCH] D159357: [AArch64] Move PAuth codegen down the machine pipeline
Lucas Prates via Phabricator via llvm-commits
- [llvm] 6098d7d - [RISCV] Lower shuffles as rotates without zvbb
Luke Lau via llvm-commits
- [llvm] 2fc6fad - [RISCV] Fix typo in test title. NFC
Luke Lau via llvm-commits
- [llvm] [RISCV] Add extract_subvector tests for a statically-known VLEN. NFC (PR #65389)
Luke Lau via llvm-commits
- [llvm] [RISCV] Add extract_subvector tests for a statically-known VLEN. NFC (PR #65389)
Luke Lau via llvm-commits
- [llvm] [RISCV] Refactor extract_subvector lowering slightly. NFC (PR #65391)
Luke Lau via llvm-commits
- [llvm] [RISCV] Refactor extract_subvector lowering slightly. NFC (PR #65391)
Luke Lau via llvm-commits
- [llvm] [RISCV] Extract subregister if VLEN is known when lowering extract_subvector (PR #65392)
Luke Lau via llvm-commits
- [llvm] [RISCV] Extract subregister if VLEN is known when lowering extract_subvector (PR #65392)
Luke Lau via llvm-commits
- [llvm] [RISCV] Extract subregister if VLEN is known when lowering extract_subvector (PR #65392)
Luke Lau via llvm-commits
- [llvm] [RISCV] Extract subregister if VLEN is known when lowering extract_subvector (PR #65392)
Luke Lau via llvm-commits
- [llvm] [RISCV] Extract subregister if VLEN is known when lowering extract_subvector (PR #65392)
Luke Lau via llvm-commits
- [llvm] [RISCV] Add extract_subvector tests for a statically-known VLEN. NFC (PR #65389)
Luke Lau via llvm-commits
- [llvm] [RISCV] Remove -riscv-v-vector-bits-min=128 in tests where implied by V. NFC (PR #65404)
Luke Lau via llvm-commits
- [llvm] [RISCV] Remove -riscv-v-vector-bits-min=128 in tests where implied by V. NFC (PR #65404)
Luke Lau via llvm-commits
- [llvm] [RISCV] Remove -riscv-v-vector-bits-min=128 in tests where implied by V. NFC (PR #65404)
Luke Lau via llvm-commits
- [llvm] [RISCV] Remove -riscv-v-vector-bits-min=128 in tests where implied by V. NFC (PR #65404)
Luke Lau via llvm-commits
- [llvm] [RISCV] Remove -riscv-v-vector-bits-min=128 in tests where implied by V. NFC (PR #65404)
Luke Lau via llvm-commits
- [llvm] [RISCV] Remove -riscv-v-vector-bits-min=128 in tests where implied by V. NFC (PR #65404)
Luke Lau via llvm-commits
- [llvm] [RISCV] Remove -riscv-v-vector-bits-min=128 in tests where implied by V. NFC (PR #65404)
Luke Lau via llvm-commits
- [llvm] [RISCV] Remove -riscv-v-vector-bits-min=128 in tests where implied by V. NFC (PR #65404)
Luke Lau via llvm-commits
- [llvm] [RISCV] Extract subregister if VLEN is known when lowering extract_subvector (PR #65392)
Luke Lau via llvm-commits
- [llvm] [RISCV] Remove -riscv-v-vector-bits-min=128 in tests where implied by V. NFC (PR #65404)
Luke Lau via llvm-commits
- [llvm] [RISCV] Add extract_subvector tests for a statically-known VLEN. NFC (PR #65389)
Luke Lau via llvm-commits
- [llvm] [RISCV] Add extract_subvector tests for a statically-known VLEN. NFC (PR #65389)
Luke Lau via llvm-commits
- [llvm] [RISCV] Add extract_subvector tests for a statically-known VLEN. NFC (PR #65389)
Luke Lau via llvm-commits
- [llvm] [RISCV] Refactor extract_subvector lowering slightly. NFC (PR #65391)
Luke Lau via llvm-commits
- [llvm] [RISCV] Refactor extract_subvector lowering slightly. NFC (PR #65391)
Luke Lau via llvm-commits
- [llvm] [RISCV] Refactor extract_subvector lowering slightly. NFC (PR #65391)
Luke Lau via llvm-commits
- [llvm] [RISCV] Refactor extract_subvector lowering slightly. NFC (PR #65391)
Luke Lau via llvm-commits
- [llvm] [RISCV] Shrink vslidedown when lowering fixed extract_subvector (PR #65598)
Luke Lau via llvm-commits
- [llvm] [RISCV] Shrink vslidedown when lowering fixed extract_subvector (PR #65598)
Luke Lau via llvm-commits
- [llvm] [RISCV] Shrink vslidedown when lowering fixed extract_subvector (PR #65598)
Luke Lau via llvm-commits
- [llvm] [RISCV] Shrink vslidedown when lowering fixed extract_subvector (PR #65598)
Luke Lau via llvm-commits
- [llvm] [RISCV] Shrink vslidedown when lowering fixed extract_subvector (PR #65598)
Luke Lau via llvm-commits
- [llvm] [RISCV] Shrink vslidedown when lowering fixed extract_subvector (PR #65598)
Luke Lau via llvm-commits
- [llvm] [RISCV] Shrink vslidedown when lowering fixed extract_subvector (PR #65598)
Luke Lau via llvm-commits
- [llvm] [RISCV] Shrink vslidedown when lowering fixed extract_subvector (PR #65598)
Luke Lau via llvm-commits
- [llvm] [RISCV] Combine trunc (sra sext (x), zext (y)) to sra (x, smin (y, scalarsizeinbits(y) - 1)) (PR #65728)
Luke Lau via llvm-commits
- [llvm] [RISCV] Combine trunc (sra sext (x), zext (y)) to sra (x, smin (y, scalarsizeinbits(y) - 1)) (PR #65728)
Luke Lau via llvm-commits
- [llvm] [RISCV] Combine trunc (sra sext (x), zext (y)) to sra (x, smin (y, scalarsizeinbits(y) - 1)) (PR #65728)
Luke Lau via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Luke Lau via llvm-commits
- [llvm] [RISCV] Combine trunc (sra sext (x), zext (y)) to sra (x, smin (y, scalarsizeinbits(y) - 1)) (PR #65728)
Luke Lau via llvm-commits
- [llvm] [RISCV] Add tests where bin ops of splats could be scalarized. NFC (PR #65747)
Luke Lau via llvm-commits
- [llvm] [RISCV] Add tests where bin ops of splats could be scalarized. NFC (PR #65747)
Luke Lau via llvm-commits
- [llvm] [RISCV] Add tests where bin ops of splats could be scalarized. NFC (PR #65747)
Luke Lau via llvm-commits
- [llvm] [RISCV] Make InitUndef handle undef operand (PR #65755)
Luke Lau via llvm-commits
- [llvm] [RISCV] Match gather(splat(ptr)) as zero strided load (PR #65769)
Luke Lau via llvm-commits
- [llvm] Scalarize binop of splats build vector/free (PR #65773)
Luke Lau via llvm-commits
- [llvm] Scalarize binop of splats build vector/free (PR #65773)
Luke Lau via llvm-commits
- [llvm] [RISCV] Shrink vslidedown when lowering fixed extract_subvector (PR #65598)
Luke Lau via llvm-commits
- [llvm] [TwoAddressInstruction] Check if segment was found when updating subreg LIs (PR #65916)
Luke Lau via llvm-commits
- [llvm] [TwoAddressInstruction] Check if segment was found when updating subreg LIs (PR #65916)
Luke Lau via llvm-commits
- [llvm] [TwoAddressInstruction] Check if segment was found when updating subreg LIs (PR #65916)
Luke Lau via llvm-commits
- [PATCH] D159353: [RISCV] Lower shuffles as rotates without zvbb
Luke Lau via Phabricator via llvm-commits
- [llvm] Create sync-fork.yaml (PR #65714)
Maksim Levental via llvm-commits
- [llvm] Create sync-fork.yaml (PR #65714)
Maksim Levental via llvm-commits
- [llvm] Create sync-fork.yaml (PR #65714)
Maksim Levental via llvm-commits
- [PATCH] D159480: [Clang][AArch64] Fine-grained ldp and stp policies.
Manos Anagnostakis via Phabricator via llvm-commits
- [PATCH] D159480: [Clang][AArch64] Fine-grained ldp and stp policies.
Manos Anagnostakis via Phabricator via llvm-commits
- [PATCH] D159480: [Clang][AArch64] Fine-grained ldp and stp policies.
Manos Anagnostakis via Phabricator via llvm-commits
- [llvm] [GitHub] use checkout action v4 (PR #65819)
Marc Auberer via llvm-commits
- [llvm] [GitHub] use checkout action v4 (PR #65819)
Marc Auberer via llvm-commits
- [PATCH] D159402: [ValueTracking] Consider assumptions in isKnownNonEqual
Marc Auberer via Phabricator via llvm-commits
- [PATCH] D159380: [InstCombine] Fold ((A&B)^A)|((A&B)^B) to A^B
Marc Auberer via Phabricator via llvm-commits
- [PATCH] D159380: [InstCombine] Fold ((A&B)^A)|((A&B)^B) to A^B
Marc Auberer via Phabricator via llvm-commits
- [PATCH] D159204: [InstCombine] Baseline tests for folding (A/-B)==(A/B) to (A/B)==0
Marc Auberer via Phabricator via llvm-commits
- [PATCH] D159203: [InstCombine] Fold (A/-B)==(A/B) to (A/B)==0
Marc Auberer via Phabricator via llvm-commits
- [PATCH] D159203: [InstCombine] Fold (A/-B)==(A/B) to (A/B)==0
Marc Auberer via Phabricator via llvm-commits
- [PATCH] D159402: [ValueTracking] Consider assumptions in isKnownNonEqual
Marc Auberer via Phabricator via llvm-commits
- [PATCH] D159207: Bug fix for D154102, where multi-line labels would get incorrect header splitter line in CFG dot
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- [llvm] Add mlir-emitc subscribers to watch the Cpp target (PR #65603)
Marius Brehler via llvm-commits
- [llvm] Add mlir-emitc subscribers to watch the Cpp target (PR #65603)
Marius Brehler via llvm-commits
- [llvm] Add mlir-emitc subscribers to watch the Cpp target (PR #65603)
Marius Brehler via llvm-commits
- [llvm] Add mlir-emitc subscribers to watch the Cpp target (PR #65603)
Marius Brehler via llvm-commits
- [llvm] [LVI] Handle freeze instruction in BlockValue (PR #65399)
Mariusz Sikora via llvm-commits
- [llvm] [LVI] Handle freeze instruction in BlockValue (PR #65399)
Mariusz Sikora via llvm-commits
- [llvm] [LVI] Handle freeze instruction in BlockValue (PR #65399)
Mariusz Sikora via llvm-commits
- [llvm] [LVI] Handle freeze instruction in BlockValue (PR #65399)
Mariusz Sikora via llvm-commits
- [llvm] [LVI] Handle freeze instruction in BlockValue (PR #65399)
Mariusz Sikora via llvm-commits
- [llvm] [GlobalISel] Fold G_SHUFFLE_VECTOR with a single element mask to G_EXTRACT_VECTOR_ELT (PR #65342)
Mark de Wever via llvm-commits
- [llvm] [RISCV][llvm-mca] Add llvm-mca tests for SiFive7 Vector Integer Arith… (PR #65283)
Mark de Wever via llvm-commits
- [PATCH] D137337: Replace LLVM_LIBDIR_SUFFIX by CMAKE_INSTALL_LIBDIR
Mark de Wever via Phabricator via llvm-commits
- [PATCH] D130541: [cmake] Dedup linker flag check polyfill
Mark de Wever via Phabricator via llvm-commits
- [PATCH] D158878: [runtimes][cmake] Propagate cmake arguments.
Mark de Wever via Phabricator via llvm-commits
- [llvm] [ADT] Add detection utility for incomplete types (PR #65495)
Markus Böck via llvm-commits
- [llvm] [ADT] Add detection utility for incomplete types (PR #65495)
Markus Böck via llvm-commits
- [llvm] [ADT] Add detection utility for incomplete types (PR #65495)
Markus Böck via llvm-commits
- [llvm] [ADT] Fix an empty BitVector call getData assert `idx < size()' failed (PR #65505)
Markus Böck via llvm-commits
- [llvm] [ADT] Fix an empty BitVector call getData assert `idx < size()' failed (PR #65505)
Markus Böck via llvm-commits
- [llvm] [ADT] Fix an empty BitVector call getData assert `idx < size()' failed (PR #65505)
Markus Böck via llvm-commits
- [llvm] [ADT] Fix an empty BitVector call getData assert `idx < size()' failed (PR #65505)
Markus Böck via llvm-commits
- [llvm] [GitHub] Add main LLVM Dialect path to MLIR LLVM PR subscribers (PR #65513)
Markus Böck via llvm-commits
- [llvm] [GitHub] Add main LLVM Dialect path to MLIR LLVM PR subscribers (PR #65513)
Markus Böck via llvm-commits
- [llvm] [GitHub] Add main LLVM Dialect path to MLIR LLVM PR subscribers (PR #65513)
Markus Böck via llvm-commits
- [llvm] [GitHub] Add main LLVM Dialect path to MLIR LLVM PR subscribers (PR #65513)
Markus Böck via llvm-commits
- [llvm] [GitHub] Add main LLVM Dialect path to MLIR LLVM PR subscribers (PR #65513)
Markus Böck via llvm-commits
- [llvm] [GitHub] Add main LLVM Dialect path to MLIR LLVM PR subscribers (PR #65513)
Markus Böck via llvm-commits
- [llvm] [ADT] Fix an empty BitVector call getData assert `idx < size()' failed (PR #65505)
Markus Böck via llvm-commits
- [llvm] [mlir][LLVM] Model side effects of volatile and atomic load-store (PR #65730)
Markus Böck via llvm-commits
- [llvm] [mlir][LLVM] Model side effects of volatile and atomic load-store (PR #65730)
Markus Böck via llvm-commits
- [llvm] [mlir][LLVM] Model side effects of volatile and atomic load-store (PR #65730)
Markus Böck via llvm-commits
- [llvm] [mlir][LLVM] Model side effects of volatile and atomic load-store (PR #65730)
Markus Böck via llvm-commits
- [PATCH] D159085: [lli] Make sure the exported __chkstk functions are included when exporting them
Markus Mützel via Phabricator via llvm-commits
- [llvm] [lit] Are all RUN lines skipped in windows cmd? (PR #65242)
Martin Storsjö via llvm-commits
- [llvm] [lit] Are all RUN lines skipped in windows cmd? (PR #65242)
Martin Storsjö via llvm-commits
- [llvm] [lit] Are all RUN lines skipped in windows cmd? (PR #65242)
Martin Storsjö via llvm-commits
- [llvm] [lit] Are all RUN lines skipped in windows cmd? (PR #65242)
Martin Storsjö via llvm-commits
- [llvm] 4bba12f - [lli] Make sure the exported __chkstk functions are included when exporting them
Martin Storsjö via llvm-commits
- [llvm] [GlobalISel] Check for unsupported Windows features on invoke (PR #65864)
Martin Storsjö via llvm-commits
- [llvm] [GlobalISel] Check for unsupported Windows features on invoke (PR #65864)
Martin Storsjö via llvm-commits
- [llvm] [GlobalISel] Check for unsupported Windows features on invoke (PR #65864)
Martin Storsjö via llvm-commits
- [llvm] [GlobalISel] Check for unsupported Windows features on invoke (PR #65864)
Martin Storsjö via llvm-commits
- [llvm] [GlobalISel] Check for unsupported Windows features on invoke (PR #65864)
Martin Storsjö via llvm-commits
- [llvm] [GlobalISel] Check for unsupported Windows features on invoke (PR #65864)
Martin Storsjö via llvm-commits
- [llvm] [GlobalISel] Check for unsupported Windows features on invoke (PR #65864)
Martin Storsjö via llvm-commits
- [compiler-rt] [compiler-rt] Check for and use -lunwind when linking with -nodefaultlibs (PR #65912)
Martin Storsjö via llvm-commits
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Martin Storsjö via llvm-commits
- [compiler-rt] [compiler-rt] Check for and use -lunwind when linking with -nodefaultlibs (PR #65912)
Martin Storsjö via llvm-commits
- [compiler-rt] [compiler-rt] Check for and use -lunwind when linking with -nodefaultlibs (PR #65912)
Martin Storsjö via llvm-commits
- [PATCH] D155579: [Windows] Avoid using FileIndex for unique IDs on network mounts
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D150699: [compiler-rt] [libunwind] Remove workarounds for older CMake versions
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D86612: [libunwind] Enable the SEH unwinding codepaths if building in MSVC mode
Martin Storsjö via Phabricator via llvm-commits
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Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D152054: [OpenMP] Codegen support for thread_limit on target directive
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- [PATCH] D155579: [Windows] Avoid using FileIndex for unique IDs on network mounts
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D159085: [lli] Make sure the exported __chkstk functions are included when exporting them
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D155579: [Windows] Avoid using FileIndex for unique IDs on network mounts
Martin Storsjö via Phabricator via llvm-commits
- [llvm] [AMDGPU] Erase ShaderFunctions in AMDGPUPALMetadata::reset() (PR #65247)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Lower G_SHUFFLE_VECTOR with scalar result (PR #65275)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Lower G_SHUFFLE_VECTOR with scalar result (PR #65275)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel][AArch64] Combine unmerge(G_EXT v, undef) to unmerge(v). (PR #65263)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add dynamic LDS size implicit kernel argument to CO-v5 (PR #65273)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Commute G_FMUL and G_FADD constant LHS to RHS. (PR #65298)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel][AArch64] Combine unmerge(G_EXT v, undef) to unmerge(v). (PR #65263)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Extend v2i16 & v2f16 support for llvm.amdgcn.update.dpp intr… (PR #65318)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Commute G_FMUL and G_FADD constant LHS to RHS. (PR #65298)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Fold fmul x, 1.0 -> x (PR #65379)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Fold fmul x, 1.0 -> x (PR #65379)
Matt Arsenault via llvm-commits
- [llvm] Add regalloc team to CODEOWNERS (PR #65208)
Matt Arsenault via llvm-commits
- [llvm] Add amdgpu paths to CODEOWNERS (PR #65229)
Matt Arsenault via llvm-commits
- [llvm] Add amdgpu paths to CODEOWNERS (PR #65229)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Cope with SelectionDAG::UpdateNodeOperands returning a different SDNode (PR #65340)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Add constant-folding of FP binops to combiner. (PR #65230)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Add constant-folding of FP binops to combiner. (PR #65230)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Scratch instructions are trivially disjoint from SMEM and buffer instructions (PR #65287)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Scratch instructions are trivially disjoint from SMEM and buffer instructions (PR #65287)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix V_MOV_B32_indirect inst size (PR #65584)
Matt Arsenault via llvm-commits
- [llvm] [LiveRegUnits] Remove use of std::function from phys_regs_and_masks (PR #65615)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Add constant-folding of FP binops to combiner. (PR #65230)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Teach CalculateByteProvider about AMDGPUISD::PERM (PR #65547)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Teach CalculateByteProvider about AMDGPUISD::PERM (PR #65547)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen] Implement MVT::getSizeInBits with a lookup table (PR #65604)
Matt Arsenault via llvm-commits
- [llvm] [bolt][X86] Correct 2 test RUN lines (PR #65252)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Add constant-folding of FP binops to combiner. (PR #65230)
Matt Arsenault via llvm-commits
- [llvm] [InferAddressSpaces] Register pass. (PR #65639)
Matt Arsenault via llvm-commits
- [llvm] [LowerMatrixIntrinsics] Drop support for typed pointers (PR #65605)
Matt Arsenault via llvm-commits
- [llvm] 4fcc21b - AMDGPU: Remove unused node definition
Matt Arsenault via llvm-commits
- [llvm] ae542d9 - ValueTracking: Add baseline test for fcmp implying classes
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Add constant folding support for G_FMA/G_FMAD in the combiner. (PR #65659)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Incorrect error message regarding SCC modifier (PR #65660)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Teach CalculateByteProvider about AMDGPUISD::PERM (PR #65547)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Remove Code Object V2 (PR #65715)
Matt Arsenault via llvm-commits
- [lld] [AMDGPU] Remove Code Object V2 (PR #65715)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add basic patterns to select lshl_or instead of v_perm (PR #65693)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Add constant folding support for G_FMA/G_FMAD in the combiner. (PR #65659)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Scratch instructions are trivially disjoint from SMEM and buffer instructions (PR #65287)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Mark S_NOP as having side effects (PR #65745)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fix handling of -0 in round lowering (PR #65761)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fix handling of -0 in round lowering (PR #65761)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fix handling of -0 in round lowering (PR #65761)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][NFCI] Refactor BUFInstructions.td (PR #65746)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Cope with SelectionDAG::UpdateNodeOperands returning a different SDNode (PR #65765)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Fix handling of -0 in round lowering (PR #65761)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] New intrinsic void llvm.amdgcn.s.nop(i16) (PR #65757)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][NFCI] Refactor BUFInstructions.td (PR #65746)
Matt Arsenault via llvm-commits
- [llvm] [Attributor] Avoid AS-cast for function pointers (PR #65825)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Global ISel for packed fp32 instructions (PR #65803)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Autogenerate min.ll/max.ll tests. NFC. (PR #65786)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Improve selection into lshl_or (PR #65794)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Add constant folding support for G_FMA/G_FMAD in the combiner. (PR #65659)
Matt Arsenault via llvm-commits
- [llvm] [GlobalOpt] Handle DL.getAllocaAddrSpace() != 0 (PR #65847)
Matt Arsenault via llvm-commits
- [llvm] [GlobalOpt] Handle DL.getAllocaAddrSpace() != 0 (PR #65847)
Matt Arsenault via llvm-commits
- [llvm] [GlobalOpt] Handle DL.getAllocaAddrSpace() != 0 (PR #65847)
Matt Arsenault via llvm-commits
- [llvm] [GlobalOpt] Handle DL.getAllocaAddrSpace() != 0 (PR #65847)
Matt Arsenault via llvm-commits
- [llvm] [GlobalOpt] Handle DL.getAllocaAddrSpace() != 0 (PR #65847)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Support llvm.exp10 (PR #65860)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Support llvm.exp10 (PR #65860)
Matt Arsenault via llvm-commits
- [llvm] 17bd806 - AMDGPU: Implement llvm.get.fpmode
Matt Arsenault via llvm-commits
- [lld] [AMDGPU] Make default AMDHSA Code Object Version to be 5 (PR #65410)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Make default AMDHSA Code Object Version to be 5 (PR #65410)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Support llvm.exp10 (PR #65860)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] SILowerI1Copies: clear kill flags on COPY (PR #65883)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] SILowerI1Copies: clear kill flags on COPY (PR #65883)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] SILowerI1Copies: clear kill flags on COPY (PR #65883)
Matt Arsenault via llvm-commits
- [PATCH] D149587: InstSimplify: Simplifications for ldexp
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152710: AMDGPU: Implement llvm.get.fpmode
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153257: AMDGPU: Implement llvm.set.rounding
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D158648: InstCombine: Introduce SimplifyDemandedUseFPClass
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D158648: InstCombine: Introduce SimplifyDemandedUseFPClass
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151937: InstCombine: Recognize fabs as bitcasted integer
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D159439: [AMDGPU] Add utilities to track number of user SGPRs. NFC.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D159111: [TableGen][GlobalISel] Add support for matching/writing MIFlags in MIR Patterns
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152710: AMDGPU: Implement llvm.get.fpmode
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D159239: [AMDGPU] Incorrect error message regarding SCC modifier
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D149587: InstSimplify: Simplifications for ldexp
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D155995: [AMDGPU]: Allow combining into v_dot4
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D159452: [AMDGPU] Machine scheduler should take care of the 'amdgpu-num-vgp' function attribute
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D159464: [InstCombine] Fold comparison of adding two zero extended booleans
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D159239: [AMDGPU] Incorrect error message regarding SCC modifier
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D159111: [TableGen][GlobalISel] Add support for matching/writing MIFlags in MIR Patterns
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D159239: [AMDGPU] Incorrect error message regarding SCC modifier
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D149587: InstSimplify: Simplifications for ldexp
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D159464: [InstCombine] Fold comparison of adding two zero extended booleans
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D158850: RegisterCoalescer: Correctly set valid lanes when keeping live out implicit defs
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D159201: Attributor: Add denormal-fp-math to attributor-light
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D159464: [InstCombine] Fold comparison of adding two zero extended booleans
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D159002: Attributor: Fix not propagating nofpclass arguments through transitive callers
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D158882: RegisterCoalescer: Don't delete IMPLICIT_DEF if it's live into the same block
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D156999: [Inline Spiller] Consider bundles when marking defs as dead
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D158059: [AMDGPU/wmma] - Disable 3-address syntax for f16
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D158059: [AMDGPU/wmma] - Disable 3-address syntax for f16
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D158648: InstCombine: Introduce SimplifyDemandedUseFPClass
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D158650: InstCombine: Handle copysign in SimplifyDemandedFPClass
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152710: AMDGPU: Implement llvm.get.fpmode
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153257: AMDGPU: Implement llvm.set.rounding
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D158141: [AMDGPU] SILowerControlFlow: fix preservation of LiveIntervals
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D158850: RegisterCoalescer: Correctly set valid lanes when keeping live out implicit defs
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D158882: RegisterCoalescer: Don't delete IMPLICIT_DEF if it's live into the same block
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D159186: [AArch64][SME] Enable TPIDR2 lazy-save for za_preserved
Matt Devereau via Phabricator via llvm-commits
- [PATCH] D159186: [AArch64][SME] Enable TPIDR2 lazy-save for za_preserved
Matt Devereau via Phabricator via llvm-commits
- [PATCH] D159186: [AArch64][SME] Enable TPIDR2 lazy-save for za_preserved
Matt Devereau via Phabricator via llvm-commits
- [PATCH] D159186: [AArch64][SME] Enable TPIDR2 lazy-save for za_preserved
Matt Devereau via Phabricator via llvm-commits
- [PATCH] D159186: [AArch64][SME] Enable TPIDR2 lazy-save for za_preserved
Matt Devereau via Phabricator via llvm-commits
- [llvm] Ensure NoTrapAfterNoreturn is false for the wasm backend (PR #65876)
Matt Harding via llvm-commits
- [llvm] Ensure NoTrapAfterNoreturn is false for the wasm backend (PR #65876)
Matt Harding via llvm-commits
- [llvm] Ensure NoTrapAfterNoreturn is false for the wasm backend (PR #65876)
Matt Harding via llvm-commits
- [llvm] Ensure NoTrapAfterNoreturn is false for the wasm backend (PR #65876)
Matt Harding via llvm-commits
- [llvm] [AArch64][SME] Disable tail-call optimization for __arm_locally_streaming functions. (PR #65258)
Matthew Devereau via llvm-commits
- [llvm] [AArch64][SME] Disable tail-call optimization for __arm_locally_streaming functions. (PR #65258)
Matthew Devereau via llvm-commits
- [llvm] [AArch64] Separate PNR into it's own Register Class (PR #65306)
Matthew Devereau via llvm-commits
- [llvm] [AArch64] Separate PNR into it's own Register Class (PR #65306)
Matthew Devereau via llvm-commits
- [llvm] [AArch64] Separate PNR into it's own Register Class (PR #65306)
Matthew Devereau via llvm-commits
- [llvm] [AArch64] Separate PNR into it's own Register Class (PR #65306)
Matthew Devereau via llvm-commits
- [llvm] [AArch64] Separate PNR into its own Register Class (PR #65306)
Matthew Devereau via llvm-commits
- [llvm] [AArch64][SME] Various tests should work with +sme, just as they do for +sve (PR #65260)
Matthew Devereau via llvm-commits
- [llvm] [AArch64][SME] Various tests should work with +sme, just as they do for +sve (PR #65260)
Matthew Devereau via llvm-commits
- [llvm] [AArch64] Separate PNR into its own Register Class (PR #65306)
Matthew Devereau via llvm-commits
- [lld] [lld/ELF] Remove transitionary -plugin-opt=opaque-pointers flag (PR #65529)
Matthias Braun via llvm-commits
- [lld] [lld/ELF] Remove transitionary -plugin-opt=opaque-pointers flag (PR #65529)
Matthias Braun via llvm-commits
- [llvm] [lld/ELF, gold] Remove transitionary opaque pointer flags (PR #65529)
Matthias Braun via llvm-commits
- [llvm] [lld/ELF, gold] Remove transitionary opaque pointer flags (PR #65529)
Matthias Braun via llvm-commits
- [llvm] [lld/ELF, gold] Remove transitionary opaque pointer flags (PR #65529)
Matthias Braun via llvm-commits
- [PATCH] D158680: RFC: Interpet {branch_weights 1, 0} as likely/unlikely
Matthias Braun via Phabricator via llvm-commits
- [PATCH] D159322: LoopVectorize: Set branch_weight for conditional branches
Matthias Braun via Phabricator via llvm-commits
- [PATCH] D159322: LoopVectorize: Set branch_weight for conditional branches
Matthias Braun via Phabricator via llvm-commits
- [PATCH] D159322: LoopVectorize: Set branch_weight for conditional branches
Matthias Braun via Phabricator via llvm-commits
- [PATCH] D159322: LoopVectorize: Set branch_weight for conditional branches
Matthias Braun via Phabricator via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Generalize tensor slice rules to subset ops (PR #65619)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Generalize tensor slice rules to subset ops (PR #65619)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Generalize tensor slice rules to subset ops (PR #65619)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Generalize tensor slice rules to subset ops (PR #65619)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Generalize tensor slice rules to subset ops (PR #65619)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination based on SubsetOpInterface (PR #65766)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination based on SubsetOpInterface (PR #65766)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination based on SubsetOpInterface (PR #65766)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization][NFC] Rename copy_tensor op to materialize_in_destination (PR #65467)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization][NFC] Rename copy_tensor op to materialize_in_destination (PR #65467)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization][NFC] Rename copy_tensor op to materialize_in_destination (PR #65467)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination based on SubsetOpInterface (PR #65766)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination based on SubsetOpInterface (PR #65766)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Generalize tensor slice rules to subset ops (PR #65619)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
Matthias Springer via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
Matthias Springer via llvm-commits
- [compiler-rt] [tsan][go]: add atomic or/and functions (PR #65695)
Mauri de Souza Meneguzzo via llvm-commits
- [compiler-rt] [tsan][go]: add atomic or/and functions (PR #65695)
Mauri de Souza Meneguzzo via llvm-commits
- [PATCH] D158626: [AArch64] Add missing vrnd intrinsics
Max Iyengar via Phabricator via llvm-commits
- [PATCH] D158626: [AArch64] Add missing vrnd intrinsics
Max Iyengar via Phabricator via llvm-commits
- [PATCH] D158626: [AArch64] Add missing vrnd intrinsics
Max Iyengar via Phabricator via llvm-commits
- [PATCH] D158626: [AArch64] Add missing vrnd intrinsics
Max Iyengar via Phabricator via llvm-commits
- [llvm] Add a team to subscribe to changes to MLIR Presburger library (PR #65294)
Mehdi Amini via llvm-commits
- [llvm] Add a team to subscribe to changes to MLIR Presburger library (PR #65294)
Mehdi Amini via llvm-commits
- [llvm] Add a GitHub team to subscribe to changes to MLIR Presburger library (PR #65294)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [libc++] Fix CODEOWNERS file for libc++ (PR #65344)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] Lit internal shell (PR #65415)
Mehdi Amini via llvm-commits
- [llvm] Lit internal shell (PR #65415)
Mehdi Amini via llvm-commits
- [llvm] Lit internal shell (PR #65415)
Mehdi Amini via llvm-commits
- [llvm] Switch MLIR to use the internal LIT shell by default (PR #65415)
Mehdi Amini via llvm-commits
- [llvm] Switch MLIR to use the internal LIT shell by default (PR #65415)
Mehdi Amini via llvm-commits
- [llvm] Add a GitHub team to subscribe to changes to MLIR Presburger library (PR #65294)
Mehdi Amini via llvm-commits
- [llvm] [libc++] Fix CODEOWNERS file for libc++ (PR #65344)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] [GitHub] Add main LLVM Dialect path to MLIR LLVM PR subscribers (PR #65513)
Mehdi Amini via llvm-commits
- [lld] Enabling Intel GPU Integration. (PR #65539)
Mehdi Amini via llvm-commits
- [compiler-rt] Enabling Intel GPU Integration. (PR #65539)
Mehdi Amini via llvm-commits
- [compiler-rt] Enabling Intel GPU Integration. (PR #65539)
Mehdi Amini via llvm-commits
- [lld] Enabling Intel GPU Integration. (PR #65539)
Mehdi Amini via llvm-commits
- [llvm] Enabling Intel GPU Integration. (PR #65539)
Mehdi Amini via llvm-commits
- [lld] Enabling Intel GPU Integration. (PR #65539)
Mehdi Amini via llvm-commits
- [llvm] Enabling Intel GPU Integration. (PR #65539)
Mehdi Amini via llvm-commits
- [llvm] Enabling Intel GPU Integration. (PR #65539)
Mehdi Amini via llvm-commits
- [compiler-rt] Enabling Intel GPU Integration. (PR #65539)
Mehdi Amini via llvm-commits
- [lld] Enabling Intel GPU Integration. (PR #65539)
Mehdi Amini via llvm-commits
- [llvm] Enabling Intel GPU Integration. (PR #65539)
Mehdi Amini via llvm-commits
- [compiler-rt] Enabling Intel GPU Integration. (PR #65539)
Mehdi Amini via llvm-commits
- [llvm] Enabling Intel GPU Integration. (PR #65539)
Mehdi Amini via llvm-commits
- [lld] Enabling Intel GPU Integration. (PR #65539)
Mehdi Amini via llvm-commits
- [compiler-rt] Enabling Intel GPU Integration. (PR #65539)
Mehdi Amini via llvm-commits
- [llvm] [GitHub] Add main LLVM Dialect path to MLIR LLVM PR subscribers (PR #65513)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Mehdi Amini via llvm-commits
- [llvm] [GitHub] Add main LLVM Dialect path to MLIR LLVM PR subscribers (PR #65513)
Mehdi Amini via llvm-commits
- [llvm] Add mlir-emitc subscribers to watch the Cpp target (PR #65603)
Mehdi Amini via llvm-commits
- [llvm] Reland "[CUDA][HIP] Fix overloading resolution in global variable ini… (PR #65606)
Mehdi Amini via llvm-commits
- [compiler-rt] [MLIR] Enabling Intel GPU Integration. (PR #65539)
Mehdi Amini via llvm-commits
- [compiler-rt] [MLIR] Enabling Intel GPU Integration. (PR #65539)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Mehdi Amini via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Mehdi Amini via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Mehdi Amini via llvm-commits
- [llvm] [libc++] Fix CODEOWNERS file for libc++ (PR #65344)
Mehdi Amini via llvm-commits
- [llvm] [libc++] Fix CODEOWNERS file for libc++ (PR #65344)
Mehdi Amini via llvm-commits
- [llvm] Aligning the section about pull-request with the `gh` tools with the section using the web UI (PR #65795)
Mehdi Amini via llvm-commits
- [llvm] Aligning the section about pull-request with the `gh` tools with the section using the web UI (PR #65795)
Mehdi Amini via llvm-commits
- [llvm] Aligning the section about pull-request with the `gh` tools with the section using the web UI (PR #65795)
Mehdi Amini via llvm-commits
- [llvm] Update the developer policy information on "Stay Informed" to refer to GitHub teams (PR #65798)
Mehdi Amini via llvm-commits
- [llvm] Update the developer policy information on "Stay Informed" to refer to GitHub teams (PR #65798)
Mehdi Amini via llvm-commits
- [llvm] Update the developer policy information on "Stay Informed" to refer to GitHub teams (PR #65798)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] [llvm] Add CODE_OF_CONDUCT.md (PR #65816)
Mehdi Amini via llvm-commits
- [llvm] Update the developer policy information on "Stay Informed" to refer to GitHub teams (PR #65798)
Mehdi Amini via llvm-commits
- [llvm] Update the developer policy information on "Stay Informed" to refer to GitHub teams (PR #65798)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] 9818bf2 - Clariy the GitHub PR doc that a "single commit" is only the expected initial state
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Fix logic to detect cl::option equality. (PR #65754)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Improve the pull-request subcription notification format by adding the description and files statistics (PR #65828)
Mehdi Amini via llvm-commits
- [llvm] Improve the pull-request subcription notification format by adding the description and files statistics (PR #65828)
Mehdi Amini via llvm-commits
- [llvm] Improve the pull-request subcription notification format by adding the description and files statistics (PR #65828)
Mehdi Amini via llvm-commits
- [llvm] Improve the pull-request subcription notification format by adding the description and files statistics (PR #65828)
Mehdi Amini via llvm-commits
- [llvm] Improve the pull-request subcription notification format by adding the description and files statistics (PR #65828)
Mehdi Amini via llvm-commits
- [llvm] Improve the pull-request subcription notification format by adding the description and files statistics (PR #65828)
Mehdi Amini via llvm-commits
- [llvm] Empty test (just a test...) (PR #65439)
Mehdi Amini via llvm-commits
- [llvm] Include the issue description in the subscription comment so that email notification is self-contained (PR #65839)
Mehdi Amini via llvm-commits
- [llvm] Include the issue description in the subscription comment so that email notification is self-contained (PR #65839)
Mehdi Amini via llvm-commits
- [llvm] Include the issue description in the subscription comment so that email notification is self-contained (PR #65839)
Mehdi Amini via llvm-commits
- [llvm] Update the developer policy information on "Stay Informed" to refer to GitHub teams (PR #65798)
Mehdi Amini via llvm-commits
- [llvm] Update GoogleTest to v1.14.0 (PR #65823)
Mehdi Amini via llvm-commits
- [llvm] 26aed5b - [VPlan][LoopUtils] Remove unused parameter TTI
Mel Chen via llvm-commits
- [PATCH] D158148: [VPlan][LoopUtils] Remove unused parameter TTI
Mel Chen via Phabricator via llvm-commits
- [PATCH] D158148: [VPlan][LoopUtils] Remove unused parameter TTI
Mel Chen via Phabricator via llvm-commits
- [llvm] [RISCV][llvm-mca] Add llvm-mca tests for SiFive7 Vector Integer Arith… (PR #65283)
Michael Maitland via llvm-commits
- [llvm] [RISCV][llvm-mca] Add llvm-mca tests for SiFive7 Vector Integer Arith… (PR #65283)
Michael Maitland via llvm-commits
- [llvm] [RISCV][llvm-mca] Add llvm-mca tests for SiFive7 Vector Integer Arith… (PR #65283)
Michael Maitland via llvm-commits
- [llvm] [RISCV][llvm-mca] Add llvm-mca tests for SiFive7 Vector Integer Arith… (PR #65283)
Michael Maitland via llvm-commits
- [llvm] [RISCV][llvm-mca] Add llvm-mca tests for SiFive7 Vector Integer Arith… (PR #65283)
Michael Maitland via llvm-commits
- [llvm] [RISCV][llvm-mca] Add llvm-mca tests for SiFive7 Vector Integer Arith… (PR #65283)
Michael Maitland via llvm-commits
- [llvm] [RISCV][llvm-mca] Add llvm-mca tests for SiFive7 Vector Integer Arith… (PR #65283)
Michael Maitland via llvm-commits
- [llvm] [RISCV][llvm-mca] Add llvm-mca tests for SiFive7 Vector Integer Arith… (PR #65283)
Michael Maitland via llvm-commits
- [llvm] 3065ce1 - [RISCV][llvm-mca] Fix Fix getLMUL values
Michael Maitland via llvm-commits
- [llvm] [RISCV][llvm-mca] Add llvm-mca tests for SiFive7 Vector Integer Arith… (PR #65283)
Michael Maitland via llvm-commits
- [llvm] [RISCV][llvm-mca] Add llvm-mca tests for SiFive7 Vector Integer Arith… (PR #65283)
Michael Maitland via llvm-commits
- [llvm] [RISCV][llvm-mca] Add llvm-mca tests for SiFive7 Vector Integer Arith… (PR #65283)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Split VFWREDUSUM and VFWREDOSUM pseudos and Fix SiFive7 formula for Reductions and ordered Reductions (PR #65385)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Split VFWREDUSUM and VFWREDOSUM pseudos and Fix SiFive7 formula for Reductions and ordered Reductions (PR #65385)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Split VFWREDUSUM and VFWREDOSUM pseudos and Fix SiFive7 formula for Reductions and ordered Reductions (PR #65385)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Split VFWREDUSUM and VFWREDOSUM pseudos and Fix SiFive7 formula for Reductions and ordered Reductions (PR #65385)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Fix SiFive7 formula for Reductions and ordered Reductions (PR #65385)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Split VFWREDUSUM and VFWREDOSUM pseudos (PR #65386)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Split VFWREDUSUM and VFWREDOSUM pseudos (PR #65386)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Split VFWREDUSUM and VFWREDOSUM pseudos (PR #65386)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Split VFWREDUSUM and VFWREDOSUM pseudos (PR #65386)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Fix SiFive7 formula for Reductions and ordered Reductions (PR #65385)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Fix SiFive7 formula for Reductions and ordered Reductions (PR #65385)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Split VFWREDUSUM and VFWREDOSUM SchedWrite (PR #65386)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Split VFWREDUSUM and VFWREDOSUM SchedWrite (PR #65386)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Fix SiFive7 formula for Reductions and ordered Reductions (PR #65385)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Fix SiFive7 formula for Reductions and ordered Reductions (PR #65385)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Fix SiFive7 formula for Reductions and ordered Reductions (PR #65385)
Michael Maitland via llvm-commits
- [llvm] [TableGen] Add a field to filter out GenericTable entries (PR #65458)
Michael Maitland via llvm-commits
- [llvm] [TableGen] Add a field to filter out GenericTable entries (PR #65458)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Added definition of Ventana veyron-v1 processor. (PR #65535)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Added definition of Ventana veyron-v1 processor. (PR #65535)
Michael Maitland via llvm-commits
- [llvm] [RISCV][CostModel] Add getCFInstrCost RISC-V implementation (PR #65599)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Michael Maitland via llvm-commits
- [llvm] [TableGen] Add a field to filter out GenericTable entries (PR #65458)
Michael Maitland via llvm-commits
- [llvm] [TableGen] Add a field to filter out GenericTable entries (PR #65458)
Michael Maitland via llvm-commits
- [llvm] [TableGen] Add a field to filter out GenericTable entries (PR #65458)
Michael Maitland via llvm-commits
- [llvm] [RISCV][llvm-mca] Add llvm-mca tests for SiFive7 Vector Integer Arith… (PR #65283)
Michael Maitland via llvm-commits
- [llvm] [RISCV][llvm-mca] Add llvm-mca tests for SiFive7 Vector Integer Arith… (PR #65283)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats of scalar operand (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
Michael Maitland via llvm-commits
- [PATCH] D159368: [RISCV] Remove SEW operand for load/store and SEW-aware pseudos
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D159301: [RISCV][llvm-mca] Fix getLMUL values
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D159368: [RISCV] Remove SEW operand for load/store and SEW-aware pseudos
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D155978: [SPIRV] Add SPIR-V logical triple.
Michal Paszkowski via Phabricator via llvm-commits
- [PATCH] D158764: [SPIR-V] Support SPV_INTEL_arbitrary_precision_integers_extension and add misc utilities for other extensions
Michal Paszkowski via Phabricator via llvm-commits
- [PATCH] D155978: [SPIRV] Add SPIR-V logical triple.
Michal Paszkowski via Phabricator via llvm-commits
- [PATCH] D156049: [SPIR-V] Remove -opaque-pointers=0 from LITs, fixes for opaque pointers support
Michal Paszkowski via Phabricator via llvm-commits
- [PATCH] D156049: [SPIR-V] Remove -opaque-pointers=0 from LITs, fixes for opaque pointers support
Michal Paszkowski via Phabricator via llvm-commits
- [PATCH] D159376: [SPIRV] Fix OpConstant float lowering and writing
Michal Paszkowski via Phabricator via llvm-commits
- [PATCH] D150943: [SimplifyCFG] add nsw on BuildLookuptable LinearMap calculation
Mikael Holmén via Phabricator via llvm-commits
- [llvm] Scheduled bildkite pipeline generation (PR #65574)
Mikhail Goncharov via llvm-commits
- [llvm] Scheduled bildkite pipeline generation (PR #65574)
Mikhail Goncharov via llvm-commits
- [llvm] Scheduled bildkite pipeline generation (PR #65574)
Mikhail Goncharov via llvm-commits
- [llvm] Scheduled bildkite pipeline generation (PR #65574)
Mikhail Goncharov via llvm-commits
- [llvm] Scheduled bildkite pipeline generation (PR #65574)
Mikhail Goncharov via llvm-commits
- [llvm] Scheduled buildkite pipeline generation (PR #65574)
Mikhail Goncharov via llvm-commits
- [llvm] [libc][bazel] Fix missing dependencies for `lseek` (PR #65618)
Mikhail R. Gadelha via llvm-commits
- [llvm] a09f09c - [TableGen] Fix incorrect handling of nested `#ifndef` directives
Min-Yih Hsu via llvm-commits
- [PATCH] D159236: [TableGen] Fix incorrect handling of nested `#ifndef` directives
Min-Yih Hsu via Phabricator via llvm-commits
- [PATCH] D156767: [AArch64] [BranchRelaxation] Optimize for hot code size in AArch64 branch relaxation
Mingming Liu via Phabricator via llvm-commits
- [llvm] [nfc][thinlto] Factor common state for `computeImportForModule` (PR #65427)
Mircea Trofin via llvm-commits
- [llvm] [nfc][thinlto] Factor common state for `computeImportForModule` (PR #65427)
Mircea Trofin via llvm-commits
- [llvm] [nfc][thinlto] Factor common state for `computeImportForModule` (PR #65427)
Mircea Trofin via llvm-commits
- [llvm] [ADT] Fix a comment typo (PR #65497)
Mircea Trofin via llvm-commits
- [llvm] [nfc][thinlto] Factor common state for `computeImportForModule` (PR #65427)
Mircea Trofin via llvm-commits
- [llvm] [nfc][thinlto] Factor common state for `computeImportForModule` (PR #65427)
Mircea Trofin via llvm-commits
- [llvm] [nfc][thinlto] Factor common state for `computeImportForModule` (PR #65427)
Mircea Trofin via llvm-commits
- [llvm] [nfc][thinlto] Factor common state for `computeImportForModule` (PR #65427)
Mircea Trofin via llvm-commits
- [llvm] ea9e47d - `ForceFunctionAttrs`: support overriding attributes via csv file
Mircea Trofin via llvm-commits
- [PATCH] D155617: Pass to annotate functions with appropriate optimization level.
Mircea Trofin via Phabricator via llvm-commits
- [PATCH] D155617: Pass to annotate functions with appropriate optimization level.
Mircea Trofin via Phabricator via llvm-commits
- [PATCH] D155617: `ForceFunctionAttrs`: support overriding attributes via csv file
Mircea Trofin via Phabricator via llvm-commits
- [PATCH] D159406: [SelectionDAG] Generalise SelectionDAG::computeOverflowKind to support other opcodes
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159406: [SelectionDAG] Generalise SelectionDAG::computeOverflowKind to support other opcodes
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159406: [SelectionDAG] Generalise SelectionDAG::computeOverflowKind to support other opcodes
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159406: [SelectionDAG] Generalise SelectionDAG::computeOverflowKind to support other opcodes
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159406: [SelectionDAG] Generalise SelectionDAG::computeOverflowKind to support other opcodes
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159406: [SelectionDAG] Generalise SelectionDAG::computeOverflowKind to support other opcodes
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159406: [SelectionDAG] Generalise SelectionDAG::computeOverflowKind to support other opcodes
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159406: [SelectionDAG] Generalise SelectionDAG::computeOverflowKind to support other opcodes
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159406: [SelectionDAG] Generalise SelectionDAG::computeOverflowKind to support other opcodes
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159406: [SelectionDAG] Generalise SelectionDAG::computeOverflowKind to support other opcodes
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159406: [SelectionDAG] Generalise SelectionDAG::computeOverflowKind to support other opcodes
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159464: Fold comparison of add of zero extended booleans
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159464: [InstCombine] Fold comparison of adding two zero extended booleans
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159406: [SelectionDAG] Add computeOverflowForSignedMul / computeOverflowForUnsignedMul overflow handlers
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159406: [SelectionDAG] Add computeOverflowForSignedMul / computeOverflowForUnsignedMul overflow handlers
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159406: [SelectionDAG] Add computeOverflowForSignedMul / computeOverflowForUnsignedMul overflow handlers
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159464: [InstCombine] Fold comparison of adding two zero extended booleans
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159464: [InstCombine] Fold comparison of adding two zero extended booleans
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159464: [InstCombine] Fold comparison of adding two zero extended booleans
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159464: [InstCombine] Fold comparison of adding two zero extended booleans
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159464: [InstCombine] Fold comparison of adding two zero extended booleans
Mohamed Atef via Phabricator via llvm-commits
- [PATCH] D159464: [InstCombine] Fold comparison of adding two zero extended booleans
Mohamed Atef via Phabricator via llvm-commits
- [llvm] [github] GitHub Actions workflows changes (PR #65856)
Mohammed Keyvanzadeh via llvm-commits
- [llvm] [github] GitHub Actions workflows changes (PR #65856)
Mohammed Keyvanzadeh via llvm-commits
- [PATCH] D153638: [CodeGenPrepare][NFC] Update the dominator tree instead of rebuilding it
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D152827: [AArch64] Correctly determine if {ADD,SUB}{W,X}rs instructions are cheap
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D157116: [AArch64] Pre-commit some tests for D152828 (NFC)
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D152828: [MachineSink][AArch64] Sink instruction copies when they can replace copy into hard register or folded into addressing mode
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D152828: [MachineSink][AArch64] Sink instruction copies when they can replace copy into hard register or folded into addressing mode
Momchil Velikov via Phabricator via llvm-commits
- [llvm] 42a4673 - Revert "fix test for #65212"
Muhammad Omair Javaid via llvm-commits
- [PATCH] D156095: [Bazel] Introduce `//compiler-rt:profile`
NAKAMURA Takumi via Phabricator via llvm-commits
- [PATCH] D156095: [Bazel] Introduce `//compiler-rt:profile`
NAKAMURA Takumi via Phabricator via llvm-commits
- [PATCH] D156095: [Bazel] Introduce `//compiler-rt:profile`
NAKAMURA Takumi via Phabricator via llvm-commits
- [PATCH] D159227: [SPIRV] Fix bug in emitting GLSL ext inst names
Natalie Chouinard via Phabricator via llvm-commits
- [PATCH] D155978: [SPIRV] Add SPIR-V logical triple.
Nathan Gauër via Phabricator via llvm-commits
- [PATCH] D155978: [SPIRV] Add SPIR-V logical triple.
Nathan Gauër via Phabricator via llvm-commits
- [PATCH] D156424: [SPIRV] Add SPIR-V logical triple to llc
Nathan Gauër via Phabricator via llvm-commits
- [PATCH] D156424: [SPIRV] Add SPIR-V logical triple to llc
Nathan Gauër via Phabricator via llvm-commits
- [PATCH] D156424: [SPIRV] Add SPIR-V logical triple to llc
Nathan Gauër via Phabricator via llvm-commits
- [PATCH] D156424: [SPIRV] Add SPIR-V logical triple to llc
Nathan Gauër via Phabricator via llvm-commits
- [llvm] Remove unneeded work from machine memset (PR #65672)
Nathan Sidwell via llvm-commits
- [llvm] Remove unneeded work from machine memset (PR #65672)
Nathan Sidwell via llvm-commits
- [llvm] Replace llvm.memcpy et al's i1 isVolatile with i8 VolFlags (PR #65748)
Nathan Sidwell via llvm-commits
- [PATCH] D159444: [aarch64][NFC] Remove unneeded work from machine memset
Nathan Sidwell via Phabricator via llvm-commits
- [PATCH] D159444: [aarch64][NFC] Remove unneeded work from machine memset
Nathan Sidwell via Phabricator via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
Nemanja Ivanovic via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
Nemanja Ivanovic via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
Nemanja Ivanovic via llvm-commits
- [PATCH] D155600: [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)
Nemanja Ivanovic via Phabricator via llvm-commits
- [PATCH] D152945: [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFWriter
Neumann Hon via Phabricator via llvm-commits
- [llvm] [StackProtector] Clear out stack protector slot (PR #65461)
Nick Desaulniers via llvm-commits
- [llvm] [StackProtector] Clear out stack protector slot (PR #65461)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
Nick Desaulniers via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
Nick Desaulniers via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
Nick Desaulniers via llvm-commits
- [llvm] 5857fe0 - [gn] port bc45acbddceea58cdd1
Nico Weber via llvm-commits
- [llvm] d50b56d - [gn] port fbdf684fae52
Nico Weber via llvm-commits
- [llvm] 8f675d1 - [gn] port f78f93bc9fd4 (libc++ tzdb)
Nico Weber via llvm-commits
- [PATCH] D153808: [CodeGen] Extend ComplexDeinterleaving pass to recognise patterns using integer types
Nico Weber via Phabricator via llvm-commits
- [PATCH] D159095: [lld-macho]Limit "cannot-export-hidden-symbol" warnings to only 3 to avoid crowding logs
Nico Weber via Phabricator via llvm-commits
- [PATCH] D159319: [AIX] Add threadId and use nanosecond timestamp in sinit/sterm symbols
Nico Weber via Phabricator via llvm-commits
- [llvm] f5fb6ad - AMDGPU: Precommit a test file
Nicolai Hähnle via llvm-commits
- [llvm] 62790a8 - AMDGPU: Fix test from previous commit
Nicolai Hähnle via llvm-commits
- [llvm] AMDGPU: Scratch instructions are trivially disjoint from SMEM and buffer instructions (PR #65287)
Nicolai Hähnle via llvm-commits
- [llvm] AMDGPU: Scratch instructions are trivially disjoint from SMEM and buffer instructions (PR #65287)
Nicolai Hähnle via llvm-commits
- [llvm] AMDGPU: Scratch instructions are trivially disjoint from SMEM and buffer instructions (PR #65287)
Nicolai Hähnle via llvm-commits
- [llvm] AMDGPU: Scratch instructions are trivially disjoint from SMEM and buffer instructions (PR #65287)
Nicolai Hähnle via llvm-commits
- [llvm] AMDGPU: Scratch instructions are trivially disjoint from SMEM and buffer instructions (PR #65287)
Nicolai Hähnle via llvm-commits
- [llvm] AMDGPU: Scratch instructions are trivially disjoint from SMEM and buffer instructions (PR #65287)
Nicolai Hähnle via llvm-commits
- [llvm] [LVI] Handle freeze instruction in BlockValue (PR #65399)
Nikita Popov via llvm-commits
- [llvm] Add `visitGEPOfAlloc` to restore the `visitGEPOfBitcast` part of the behavior of non-opaque pointers. (PR #65764)
Nikita Popov via llvm-commits
- [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #65759)
Nikita Popov via llvm-commits
- [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #65759)
Nikita Popov via llvm-commits
- [llvm] [EarlyCSE] Compare GEP instructions based on offset (PR #65875)
Nikita Popov via llvm-commits
- [PATCH] D159418: Move CallInst::CreateFree to IRBuilderBase
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D158861: [llvm] Move CallInst::CreateMalloc to IRBuilderBase::CreateMalloc
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D159354: [SROA] Limit the number of allowed slices when trying to split allocas
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D159075: [MemCpyOpt] implement forward dataflow sensitive stack-move optimization
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D159451: [BasicAA] BasicAA update for scalable quantity
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D155406: [MemCpyOpt] implement multi BB stack-move optimization
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D159451: [BasicAA] BasicAA update for scalable quantity
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D158527: [InstCombine] Add a cl::opt to control calls to getOrEnforceKnownAlignment in LoadInst and StoreInst
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D159354: [SROA] Limit the number of allowed slices when trying to split allocas
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D158527: [InstCombine] Add a cl::opt to control calls to getOrEnforceKnownAlignment in LoadInst and StoreInst
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D159131: [RISCV][GlobalISel] Select G_ICMP
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D159131: [RISCV][GlobalISel] Select G_ICMP
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D159131: [RISCV][GlobalISel] Select G_ICMP
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D159131: [RISCV][GlobalISel] Select G_ICMP
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D159131: [RISCV][GlobalISel] Select G_ICMP
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D158648: InstCombine: Introduce SimplifyDemandedUseFPClass
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D158648: InstCombine: Introduce SimplifyDemandedUseFPClass
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D159464: [InstCombine] Fold comparison of adding two zero extended booleans
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D156657: [InstCombine] Fold icmp(constants[x]) when the range of x is given
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D159464: [InstCombine] Fold comparison of adding two zero extended booleans
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D159464: [InstCombine] Fold comparison of adding two zero extended booleans
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D159203: [InstCombine] Fold (A/-B)==(A/B) to (A/B)==0
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D157977: [InstCombine] OptimizePointerDifference when a gep has phi ptr
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D159464: [InstCombine] Fold comparison of adding two zero extended booleans
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- [llvm] SLP/RISCV: add test for vectorized ctpop, like in X86 (PR #65330)
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Puneeth via Phabricator via llvm-commits
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Puneeth via Phabricator via llvm-commits
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Puneeth via Phabricator via llvm-commits
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Puneeth via Phabricator via llvm-commits
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Qi Hu via Phabricator via llvm-commits
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Qiu Chaofan via llvm-commits
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Qiu Chaofan via llvm-commits
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Rahman Lavaee via llvm-commits
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Rahman Lavaee via llvm-commits
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Rahman Lavaee via llvm-commits
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Rahman Lavaee via llvm-commits
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Rahman Lavaee via llvm-commits
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Rahman Lavaee via llvm-commits
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Rahman Lavaee via llvm-commits
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Rahman Lavaee via llvm-commits
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Rahman Lavaee via llvm-commits
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Rahman Lavaee via llvm-commits
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Rahman Lavaee via llvm-commits
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Rahman Lavaee via llvm-commits
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Rahman Lavaee via llvm-commits
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Rahman Lavaee via llvm-commits
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Rahman Lavaee via llvm-commits
- [llvm] [BasicBlockSections] Introduce the basic block sections profile version 1. (PR #65506)
Rahman Lavaee via llvm-commits
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Rahman Lavaee via llvm-commits
- [llvm] [BasicBlockSections] Introduce the basic block sections profile version 1. (PR #65506)
Rahman Lavaee via llvm-commits
- [llvm] [BasicBlockSections] Introduce the basic block sections profile version 1. (PR #65506)
Rahman Lavaee via llvm-commits
- [llvm] [BasicBlockSections] Introduce the basic block sections profile version 1. (PR #65506)
Rahman Lavaee via llvm-commits
- [llvm] [BasicBlockSections] Introduce the basic block sections profile version 1. (PR #65506)
Rahman Lavaee via llvm-commits
- [llvm] [BasicBlockSections] Introduce the basic block sections profile version 1. (PR #65506)
Rahman Lavaee via llvm-commits
- [llvm] [BasicBlockSections] Introduce the basic block sections profile version 1. (PR #65506)
Rahman Lavaee via llvm-commits
- [llvm] [BasicBlockSections] Introduce the basic block sections profile version 1. (PR #65506)
Rahman Lavaee via llvm-commits
- [llvm] [BasicBlockSections] Introduce the basic block sections profile version 1. (PR #65506)
Rahman Lavaee via llvm-commits
- [llvm] [BasicBlockSections] Introduce the basic block sections profile version 1. (PR #65506)
Rahman Lavaee via llvm-commits
- [llvm] [BasicBlockSections] Introduce the basic block sections profile version 1. (PR #65506)
Rahman Lavaee via llvm-commits
- [llvm] [BasicBlockSections] Introduce the basic block sections profile version 1. (PR #65506)
Rahman Lavaee via llvm-commits
- [llvm] [BasicBlockSections] Introduce the basic block sections profile version 1. (PR #65506)
Rahman Lavaee via llvm-commits
- [llvm] [BasicBlockSections] Introduce the basic block sections profile version 1. (PR #65506)
Rahman Lavaee via llvm-commits
- [llvm] [BasicBlockSections] Introduce the basic block sections profile version 1. (PR #65506)
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Ralf Jung via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
- [llvm] SLP/RISCV: add test for vectorized ctpop, like in X86 (PR #65330)
Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
- [llvm] SLP/RISCV: add test for vectorized ctpop, like in X86 (PR #65330)
Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
- [llvm] SLP/RISCV: add test for vectorized ctpop, like in X86 (PR #65330)
Ramkumar Ramachandra via llvm-commits
- [llvm] SLP/RISCV: add test for vectorized ctpop, like in X86 (PR #65330)
Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
- [llvm] SLP/RISCV: add test for vectorized ctpop, like in X86 (PR #65330)
Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Razvan Lupusoru via llvm-commits
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Razvan Lupusoru via llvm-commits
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Renato Golin via llvm-commits
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Renato Golin via llvm-commits
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Renato Golin via llvm-commits
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Renato Golin via llvm-commits
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Renato Golin via llvm-commits
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Ronan Keryell via llvm-commits
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Ronan Keryell via llvm-commits
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Ronan Keryell via llvm-commits
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Ronan Keryell via llvm-commits
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Ronan Keryell via llvm-commits
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Ronan Keryell via llvm-commits
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Ronan Keryell via llvm-commits
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Ronan Keryell via llvm-commits
- [compiler-rt] [MLIR] Enabling Intel GPU Integration. (PR #65539)
Ronan Keryell via llvm-commits
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Ronan Keryell via llvm-commits
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Ronan Keryell via llvm-commits
- [llvm] [MLIR] Enabling Intel GPU Integration. (PR #65539)
Ronan Keryell via llvm-commits
- [compiler-rt] [MLIR] Enabling Intel GPU Integration. (PR #65539)
Ronan Keryell via llvm-commits
- [compiler-rt] [MLIR] Enabling Intel GPU Integration. (PR #65539)
Ronan Keryell via llvm-commits
- [llvm] [MLIR] Enabling Intel GPU Integration. (PR #65539)
Ronan Keryell via llvm-commits
- [compiler-rt] [MLIR] Enabling Intel GPU Integration. (PR #65539)
Ronan Keryell via llvm-commits
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Ronan Keryell via llvm-commits
- [compiler-rt] [MLIR] Enabling Intel GPU Integration. (PR #65539)
Ronan Keryell via llvm-commits
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Ronan Keryell via llvm-commits
- [PATCH] D151107: [IR] Add GraalVM calling conventions
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Saiyedul Islam via llvm-commits
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Saiyedul Islam via llvm-commits
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Saiyedul Islam via llvm-commits
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Saleem Abdulrasool via llvm-commits
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Saleem Abdulrasool via llvm-commits
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Saleem Abdulrasool via llvm-commits
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Saleem Abdulrasool via llvm-commits
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Saleem Abdulrasool via llvm-commits
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Saleem Abdulrasool via llvm-commits
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Saleem Abdulrasool via llvm-commits
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Saleem Abdulrasool via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
Saleem Abdulrasool via llvm-commits
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Saleem Abdulrasool via llvm-commits
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Saleem Abdulrasool via llvm-commits
- [llvm] Support: allow building with non-C/C++ language linkers (PR #65634)
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- [PATCH] D158675: [NFC][AsmPrinter] Refactor DbgVariable as a std::variant
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- [llvm] [llvm] Adopt WithMarkup in the MIPS backend (PR #65384)
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- [llvm] a479be0 - [MC] Change tryParseRegister to return ParseStatus (NFC)
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- [PATCH] D157232: [SPARC][IAS] Add v9 encoding of %fq
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- [llvm] [RISCV][CostModel] Add getCFInstrCost RISC-V implementation (PR #65599)
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- [llvm] [X86] Remove _REV instructions from the EVEX2VEX tables (PR #65752)
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- [llvm] [X86][EVEX512] Restrict attaching EVEX512 for default CPU only, NFCI (PR #65920)
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- [llvm] c5525a6 - Reapply "[Attributor] Enable AAAddressSpace for OpenMPOpt (#65544)""
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- [llvm] [OpenMPOpt] Allow indirect calls in AAKernelInfoCallSite (PR #65836)
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Shivam Gupta via llvm-commits
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- [llvm] e6971cb - [X86] combine-mulo.ll - add common CHECK prefix for SSE/AVX test runs
Simon Pilgrim via llvm-commits
- [llvm] 5463503 - [DAG] Move scalar BITCAST constant folds from getNode to FoldConstantArithmetic
Simon Pilgrim via llvm-commits
- [llvm] SLP/RISCV: add test for vectorized ctpop, like in X86 (PR #65330)
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Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
- [llvm] b027ce0 - [DAG] Fold (shl (sext (add_nsw x, c1)), c2) -> (add (shl (sext x), c2), c1 << c2)
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- [llvm] e4d0e12 - [DAG] Fold (shl (sext (add_nsw x, c1)), c2) -> (add (shl (sext x), c2), c1 << c2) (REAPPLIED)
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- [llvm] c61d198 - [X86] matchIndexRecursively - pull out repeated getOpcode() calls. NFCI.
Simon Pilgrim via llvm-commits
- [llvm] 84447c0 - [DAG] Add SelectionDAG::isADDLike helper. NFC.
Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
- [llvm] [X86] Simplify the API of FixupBWInstPass::getSuperRegDestIfDead. NFC. (PR #65581)
Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
- [llvm] 63af54a - [AArch64] ushl_sat.ll - regenerate checks. NFC.
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- [PATCH] D159406: [SelectionDAG] Generalise SelectionDAG::computeOverflowKind to support other opcodes
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- [PATCH] D159406: [SelectionDAG] Generalise SelectionDAG::computeOverflowKind to support other opcodes
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- [PATCH] D159406: [SelectionDAG] Generalise SelectionDAG::computeOverflowKind to support other opcodes
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- [PATCH] D66786: [x86] Fix bugs of some intrinsic functions in CLANG : _mm512_stream_ps, _mm512_stream_pd, _mm512_stream_si512
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- [PATCH] D159406: [SelectionDAG] Generalise SelectionDAG::computeOverflowKind to support other opcodes
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D159198: [DAG] Fold (shl (sext (add_nsw x, c1)), c2) -> (add (shl (sext x), c2), c1 << c2)
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- [PATCH] D159406: [SelectionDAG] Generalise SelectionDAG::computeOverflowKind to support other opcodes
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- [PATCH] D159406: [SelectionDAG] Add computeOverflowForSignedMul / computeOverflowForUnsignedMul overflow handlers
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D159406: [SelectionDAG] Add computeOverflowForSignedMul / computeOverflowForUnsignedMul overflow handlers
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D159406: [SelectionDAG] Add computeOverflowForSignedMul / computeOverflowForUnsignedMul overflow handlers
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D159478: [VP] IR expansion for inttoptr/ptrtoint
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D159250: [X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D159478: [VP] IR expansion for inttoptr/ptrtoint
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D155472: [DAG] Attempt shl narrowing in SimplifyDemandedBits (WIP)
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D159478: [VP] IR expansion for inttoptr/ptrtoint
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D159495: [VP] IR expansion for abs/smax/smin/umax/umin
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D159495: [VP] IR expansion for abs/smax/smin/umax/umin
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D159494: [VP] IR expansion for maxnum/minnum
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D159491: [VP] IR expansion for zext/sext/trunc/fptosi/fptosi/sitofp/uitofp/fptrunc/fpext
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D159493: [VP] more functional Intrinsic to definitions
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] [TableGen] Add a field to filter out GenericTable entries (PR #65458)
Simon Tatham via llvm-commits
- [llvm] [TableGen] Add a field to filter out GenericTable entries (PR #65458)
Simon Tatham via llvm-commits
- [llvm] [TableGen] Add a field to filter out GenericTable entries (PR #65458)
Simon Tatham via llvm-commits
- [llvm] [libc] customizable namespace 1/4 (PR #65321)
Siva Chandra via llvm-commits
- [llvm] [libc][NFC] split type_traits / utility in separate files (PR #65314)
Siva Chandra via llvm-commits
- [llvm] [libc] Fix lseek in bazel (PR #65542)
Siva Chandra via llvm-commits
- [llvm] [libc] move in_place_t in utility (PR #65623)
Siva Chandra via llvm-commits
- [llvm] a5a6008 - [AArch64] Fix schedmodel pre/post-index loads and stores for Neoverse V2
Sjoerd Meijer via llvm-commits
- [PATCH] D159367: [ARM] Improve reduction fadd/fmul costs
Sjoerd Meijer via Phabricator via llvm-commits
- [PATCH] D159254: [AArch64] Fix schedmodel pre/post-index loads and stores for Neoverse V2
Sjoerd Meijer via Phabricator via llvm-commits
- [PATCH] D159443: [AArch64] Fix schedmodel zero latency moves for Neoverse V2
Sjoerd Meijer via Phabricator via llvm-commits
- [PATCH] D159443: [AArch64] Fix schedmodel zero latency moves for Neoverse V2
Sjoerd Meijer via Phabricator via llvm-commits
- [PATCH] D159443: [AArch64] Fix schedmodel zero latency moves for Neoverse V2
Sjoerd Meijer via Phabricator via llvm-commits
- [llvm] [AMDGPU] Remove predicate on real packed fp32 instructions (PR #65589)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Remove predicate on real packed fp32 instructions (PR #65589)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Remove predicate on real packed fp32 instructions (PR #65589)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Remove predicate on real packed fp32 instructions (PR #65589)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Remove predicate on real packed fp32 instructions (PR #65589)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Remove predicate on real packed fp32 instructions (PR #65589)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Autogenerate min.ll/max.ll tests. NFC. (PR #65786)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Autogenerate min.ll/max.ll tests. NFC. (PR #65786)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Autogenerate min.ll/max.ll tests. NFC. (PR #65786)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Global ISel for packed fp32 instructions (PR #65803)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Global ISel for packed fp32 instructions (PR #65803)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Global ISel for packed fp32 instructions (PR #65803)
Stanislav Mekhanoshin via llvm-commits
- [PATCH] D159452: [AMDGPU] Machine scheduler should take care of the 'amdgpu-num-vgp' function attribute
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D159452: [AMDGPU] Machine scheduler should take care of the 'amdgpu-num-vgp' function attribute
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D159470: [AMDGPU] Remove predicate on real packed fp32 instructions
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D159470: [AMDGPU] Remove predicate on real packed fp32 instructions
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [llvm] 3e7cd5e - [JITLink][AArch32] Fixes for initial AArch32 backend
Stefan Gränitz via llvm-commits
- [llvm] 24f8822 - [JITLink][AArch32] Add initial test for R_ARM_THM_CALL and R_ARM_THM_JUMP24
Stefan Gränitz via llvm-commits
- [llvm] 4b17c81 - [jitlink/rtdydl][checker] Add TargetFlag dependent disassembler switching support
Stefan Gränitz via llvm-commits
- [PATCH] D157540: [JITLink][AArch32] Fixes for initial AArc32 backend
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D158280: [jitlink/rtdydl][checker] Construct disassembler at every decodeInst
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D157540: [JITLink][AArch32] Fixes for initial AArc32 backend
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D157540: [JITLink][AArch32] Fixes for initial AArc32 backend
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D158280: [jitlink/rtdydl][checker] Construct disassembler at every decodeInst
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D158280: [jitlink/rtdydl][checker] Add TargetFlag dependent disassembler switching support
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D157533: [JITLink][AArch32] Implement ELF::R_ARM_CALL relocation
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D157541: [JITLink][AArch32] Implement ELF::R_ARM_JUMP24
Stefan Gränitz via Phabricator via llvm-commits
- [llvm] 492c1f3 - [PowerPC] Merge rotate and clear into single instruction.
Stefan Pintilie via llvm-commits
- [llvm] 84e2fd7 - [PowerPC] Add a pass to merge all of the constant global arrays into one pool.
Stefan Pintilie via llvm-commits
- [PATCH] D158328: [PowerPC] Merge rotate and clear into single instruction.
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D155730: [PowerPC] Add a pass to merge all of the constant global arrays into one pool.
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D155730: [PowerPC] Add a pass to merge all of the constant global arrays into one pool.
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D158328: [PowerPC] Merge rotate and clear into single instruction.
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D155730: [PowerPC] Add a pass to merge all of the constant global arrays into one pool.
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D155730: [PowerPC] Add a pass to merge all of the constant global arrays into one pool.
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D157615: [ExtendLifetimes][1/4] Add "disable-post-ra" function attribute to disable the post-regalloc scheduler
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D157615: [ExtendLifetimes][1/4] Add "disable-post-ra" function attribute to disable the post-regalloc scheduler
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D151465: [Dexter] Remove builder from Dexter
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D157616: [ExtendLifetimes][2/4] Implement fake.use intrinsic in LLVM to extend the lifetime of operands
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D157616: [ExtendLifetimes][2/4] Implement fake.use intrinsic in LLVM to extend the lifetime of operands
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D158185: [DebugInfo] Process single-location debug values in variadic form when producing DWARF
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.
Su Hsien Ho via Phabricator via llvm-commits
- [llvm] update `llvm.spec` (PR #65452)
Sylvestre Ledru via llvm-commits
- [llvm] [clang][MSExtentions] Fix invalid overload failure about the loss of `__unaligned` qualifier (PR #65248)
Takuya Shimizu via llvm-commits
- [llvm] [clang][MSExtentions] Fix invalid overload failure about the loss of `__unaligned` qualifier (PR #65248)
Takuya Shimizu via llvm-commits
- [llvm] [nfc][thinlto] Factor common state for `computeImportForModule` (PR #65427)
Teresa Johnson via llvm-commits
- [llvm] [nfc][thinlto] Factor common state for `computeImportForModule` (PR #65427)
Teresa Johnson via llvm-commits
- [llvm] [nfc][thinlto] Factor common state for `computeImportForModule` (PR #65427)
Teresa Johnson via llvm-commits
- [llvm] [nfc][thinlto] Factor common state for `computeImportForModule` (PR #65427)
Teresa Johnson via llvm-commits
- [PATCH] D158258: [ThinLTO] Add -objc-arc-contract pass
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D159336: Statically analyze likely and unlikely blocks based on metadata
Teresa Johnson via Phabricator via llvm-commits
- [llvm] [lit] Echo full RUN lines in case of external shells (PR #65267)
Thomas Preud'homme via llvm-commits
- [llvm] [lit] Echo full RUN lines in case of external shells (PR #65267)
Thomas Preud'homme via llvm-commits
- [llvm] [lit] Echo full RUN lines in case of external shells (PR #65267)
Thomas Preud'homme via llvm-commits
- [llvm] [lit] Echo full RUN lines in case of external shells (PR #65267)
Thomas Preud'homme via llvm-commits
- [llvm] [lit] Are all RUN lines skipped in windows cmd? (PR #65242)
Thomas Preud'homme via llvm-commits
- [llvm] [update_cc_test_checks] Use lit's shell to run commands (PR #65333)
Thomas Preud'homme via llvm-commits
- [llvm] [update_cc_test_checks] Use lit's shell to run commands (PR #65333)
Thomas Preud'homme via llvm-commits
- [llvm] [update_cc_test_checks] Use lit's shell to run commands (PR #65333)
Thomas Preud'homme via llvm-commits
- [llvm] [update_cc_test_checks] Use lit's shell to run commands (PR #65333)
Thomas Preud'homme via llvm-commits
- [llvm] update `llvm.spec` (PR #65452)
Timm Baeder via llvm-commits
- [llvm] [ADT] Fix a comment typo (PR #65497)
Timm Baeder via llvm-commits
- [llvm] 71be020 - [SelectionDAG][PowerPC] Memset reuse vector element for tail store
Ting Wang via llvm-commits
- [PATCH] D138883: [SelectionDAG][PowerPC] Memset reuse vector element for tail store
Ting Wang via Phabricator via llvm-commits
- [PATCH] D138883: [SelectionDAG][PowerPC] Memset reuse vector element for tail store
Ting Wang via Phabricator via llvm-commits
- [PATCH] D138883: [SelectionDAG][PowerPC] Memset reuse vector element for tail store
Ting Wang via Phabricator via llvm-commits
- [llvm] [Github] Add labels on pull requests based on paths. (PR #65308)
Tobias Hieta via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Tobias Hieta via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Tobias Hieta via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Tobias Hieta via llvm-commits
- [llvm] Add GitHub workflow for check Python file formatting (PR #65482)
Tobias Hieta via llvm-commits
- [llvm] Add GitHub workflow for check Python file formatting (PR #65482)
Tobias Hieta via llvm-commits
- [llvm] Add GitHub workflow for check Python file formatting (PR #65482)
Tobias Hieta via llvm-commits
- [llvm] Add GitHub workflow for check Python file formatting (PR #65482)
Tobias Hieta via llvm-commits
- [llvm] Add GitHub workflow for check Python file formatting (PR #65482)
Tobias Hieta via llvm-commits
- [llvm] [Docs] Add example of making a PR with git and GitHub web interface (PR #65393)
Tobias Hieta via llvm-commits
- [llvm] Support: allow building with non-C/C++ language linkers (PR #65634)
Tobias Hieta via llvm-commits
- [llvm] Support: allow building with non-C/C++ language linkers (PR #65634)
Tobias Hieta via llvm-commits
- [llvm] Support: allow building with non-C/C++ language linkers (PR #65634)
Tobias Hieta via llvm-commits
- [llvm] Add GitHub workflow for check Python file formatting (PR #65482)
Tobias Hieta via llvm-commits
- [llvm] Add GitHub workflow for check Python file formatting (PR #65482)
Tobias Hieta via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Tobias Hieta via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Tobias Hieta via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Tobias Hieta via llvm-commits
- [llvm] Support: allow building with non-C/C++ language linkers (PR #65634)
Tobias Hieta via llvm-commits
- [llvm] [Documentation] Replace recommonmark by myst-parser (PR #65664)
Tobias Hieta via llvm-commits
- [llvm] Add GitHub workflow for check Python file formatting (PR #65482)
Tobias Hieta via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Tobias Hieta via llvm-commits
- [llvm] Tru/test cf (PR #65751)
Tobias Hieta via llvm-commits
- [llvm] Tru/test cf (PR #65751)
Tobias Hieta via llvm-commits
- [llvm] Tru/test cf (PR #65751)
Tobias Hieta via llvm-commits
- [llvm] Support: allow building with non-C/C++ language linkers (PR #65634)
Tobias Hieta via llvm-commits
- [llvm] Add GitHub workflow for check Python file formatting (PR #65482)
Tobias Hieta via llvm-commits
- [llvm] Aligning the section about pull-request with the `gh` tools with the section using the web UI (PR #65795)
Tobias Hieta via llvm-commits
- [llvm] [lit] Fix some issues from --per-test-coverage (PR #65242)
Tobias Hieta via llvm-commits
- [llvm] Fix #65890: Update the bot message to use github pull requests (PR #65914)
Tobias Hieta via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Tom Anderson via llvm-commits
- [llvm] [Docs] Update documentation for the new GitHub workflow (PR #65162)
Tom Anderson via llvm-commits
- [PATCH] D157986: [Cmake] Make sure MSVC knows LLVM source files are UTF-8 encoded
Tom Honermann via Phabricator via llvm-commits
- [llvm] Add a GitHub team to subscribe to changes to MLIR Presburger library (PR #65294)
Tom Stellard via llvm-commits
- [llvm] [Github] Add labels on pull requests based on paths. (PR #65308)
Tom Stellard via llvm-commits
- [llvm] [libc++] Fix CODEOWNERS file for libc++ (PR #65344)
Tom Stellard via llvm-commits
- [llvm] [Github] Workaround a GH action bug causing manually added labels to be removed (PR #65395)
Tom Stellard via llvm-commits
- [llvm] [libc++] Fix CODEOWNERS file for libc++ (PR #65344)
Tom Stellard via llvm-commits
- [llvm] Add amdgpu paths to CODEOWNERS (PR #65229)
Tom Stellard via llvm-commits
- [llvm] Add a GitHub team to subscribe to WebAssembly backend (PR #65419)
Tom Stellard via llvm-commits
- [llvm] Add GitHub workflow for check Python file formatting (PR #65482)
Tom Stellard via llvm-commits
- [llvm] [lldb] Add lldb team to CODEOWNERS (PR #65454)
Tom Stellard via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Tom Stellard via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Tom Stellard via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Tom Stellard via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Tom Stellard via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Tom Stellard via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Tom Stellard via llvm-commits
- [llvm] [libc++] Fix CODEOWNERS file for libc++ (PR #65344)
Tom Stellard via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Tom Stellard via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Tom Stellard via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Tom Stellard via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Tom Stellard via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Tom Stellard via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Tom Stellard via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Tom Stellard via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Tom Stellard via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Tom Stellard via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Tom Stellard via llvm-commits
- [llvm] Add GitHub workflow for check Python file formatting (PR #65482)
Tom Stellard via llvm-commits
- [llvm] Add GitHub workflow for check Python file formatting (PR #65482)
Tom Stellard via llvm-commits
- [llvm] workflows: Add a simple pull request subscription workflow (PR #64913)
Tom Stellard via llvm-commits
- [llvm] [LAA] Analyze pointers forked by a phi (PR #65834)
Tom Stellard via llvm-commits
- [llvm] [LAA] Analyze pointers forked by a phi (PR #65834)
Tom Stellard via llvm-commits
- [llvm] Improve the pull-request subcription notification format by adding the description and files statistics (PR #65828)
Tom Stellard via llvm-commits
- [llvm] Improve the pull-request subcription notification format by adding the description and files statistics (PR #65828)
Tom Stellard via llvm-commits
- [llvm] Improve the pull-request subcription notification format by adding the description and files statistics (PR #65828)
Tom Stellard via llvm-commits
- [llvm] Improve the pull-request subcription notification format by adding the description and files statistics (PR #65828)
Tom Stellard via llvm-commits
- [llvm] [GitHub] Add teams for the inliner (PR #65567)
Tom Stellard via llvm-commits
- [llvm] [GitHub] Add teams for ADT and Support (PR #65519)
Tom Stellard via llvm-commits
- [llvm] [GitHub] Add more CODEOWNERS for top level projects (PR #65509)
Tom Stellard via llvm-commits
- [llvm] 4871a9c - Revert "[jitlink/rtdydl][checker] Add TargetFlag dependent disassembler switching support"
Tom Weaver via llvm-commits
- [PATCH] D158280: [jitlink/rtdydl][checker] Add TargetFlag dependent disassembler switching support
Tom Weaver via Phabricator via llvm-commits
- [PATCH] D158280: [jitlink/rtdydl][checker] Add TargetFlag dependent disassembler switching support
Tom Weaver via Phabricator via llvm-commits
- [PATCH] D159357: [AArch64] Move PAuth codegen down the machine pipeline
Tomas Matheson via Phabricator via llvm-commits
- [llvm] b7a305d - [AArch64][GlobalISel] Optimise Combine Funnel Shift
Tuan Chuong Goh via llvm-commits
- [PATCH] D157591: [AArch64][GlobalISel] Optimize Combine Funnel Shift
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- [PATCH] D157591: [AArch64][GlobalISel] Optimize Combine Funnel Shift
Tuan Chuong Goh via Phabricator via llvm-commits
- [llvm] [AssumptionCache] Track GlobalValues as affected values. (PR #65425)
Tyler Lanphear via llvm-commits
- [llvm] [AssumptionCache] Track GlobalValues as affected values. (PR #65425)
Tyler Lanphear via llvm-commits
- [llvm] [AssumptionCache] Track GlobalValues as affected values. (PR #65425)
Tyler Lanphear via llvm-commits
- [llvm] [AssumptionCache] Track GlobalValues as affected values. (PR #65425)
Tyler Lanphear via llvm-commits
- [llvm] [AssumptionCache] Track GlobalValues as affected values. (PR #65425)
Tyler Lanphear via llvm-commits
- [llvm] [NFC][ValueTracking] Simplify check in llvm::isBitwiseValue() (PR #65817)
Tyler Lanphear via llvm-commits
- [llvm] [NFC][ValueTracking] Simplify check in llvm::isBitwiseValue() (PR #65817)
Tyler Lanphear via llvm-commits
- [llvm] [NFC][ValueTracking] Simplify check in llvm::isBitwiseValue() (PR #65817)
Tyler Lanphear via llvm-commits
- [llvm] [GlobalOpt] Handle DL.getAllocaAddrSpace() != 0 (PR #65847)
Tyler Lanphear via llvm-commits
- [llvm] [GlobalOpt] Handle DL.getAllocaAddrSpace() != 0 (PR #65847)
Tyler Lanphear via llvm-commits
- [llvm] [GlobalOpt] Handle DL.getAllocaAddrSpace() != 0 (PR #65847)
Tyler Lanphear via llvm-commits
- [llvm] [GlobalOpt] Handle DL.getAllocaAddrSpace() != 0 (PR #65847)
Tyler Lanphear via llvm-commits
- [llvm] [GlobalOpt] Handle DL.getAllocaAddrSpace() != 0 (PR #65847)
Tyler Lanphear via llvm-commits
- [llvm] [GlobalOpt] Handle DL.getAllocaAddrSpace() != 0 (PR #65847)
Tyler Lanphear via llvm-commits
- [llvm] [GlobalOpt] Handle DL.getAllocaAddrSpace() != 0 (PR #65847)
Tyler Lanphear via llvm-commits
- [llvm] [GlobalOpt] Handle DL.getAllocaAddrSpace() != 0 (PR #65847)
Tyler Lanphear via llvm-commits
- [llvm] [GlobalOpt] Handle DL.getAllocaAddrSpace() != 0 (PR #65847)
Tyler Lanphear via llvm-commits
- [llvm] [GlobalOpt] Handle DL.getAllocaAddrSpace() != 0 (PR #65847)
Tyler Lanphear via llvm-commits
- [llvm] [GlobalOpt] Handle DL.getAllocaAddrSpace() != 0 (PR #65847)
Tyler Lanphear via llvm-commits
- [llvm] [GlobalOpt] Handle DL.getAllocaAddrSpace() != 0 (PR #65847)
Tyler Lanphear via llvm-commits
- [PATCH] D159385: [AssumptionCache] Track GlobalValues as affected values.
Tyler Lanphear via Phabricator via llvm-commits
- [PATCH] D159385: [AssumptionCache] Track GlobalValues as affected values.
Tyler Lanphear via Phabricator via llvm-commits
- [llvm] [SystemZ][z/OS] This change adds support for the PPA2 section in zOS (PR #65407)
Ulrich Weigand via llvm-commits
- [llvm] [lit] Echo full RUN lines in case of external shells (PR #65267)
Ulrich Weigand via llvm-commits
- [llvm] [lit] Echo full RUN lines in case of external shells (PR #65267)
Ulrich Weigand via llvm-commits
- [llvm] [SystemZ][z/OS] This change adds support for the PPA2 section in zOS (PR #65407)
Ulrich Weigand via llvm-commits
- [PATCH] D158883: [Matrix] Try to emit fmuladd for both vector and matrix types
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- [PATCH] D159205: [SLP]Try to vectorize scalars, being vectorized already, but do not need to be scheduled.
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- [PATCH] D159368: [RISCV] Remove SEW operand for load/store and SEW-aware pseudos
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- [PATCH] D159368: [RISCV] Remove SEW operand for load/store and SEW-aware pseudos
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D159368: [RISCV] Remove SEW operand for load/store and SEW-aware pseudos
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D159322: LoopVectorize: Set branch_weight for conditional branches
Wenlei He via Phabricator via llvm-commits
- [PATCH] D158642: LoopUnrollRuntime: Add weights to all branches
Wenlei He via Phabricator via llvm-commits
- [PATCH] D157937: ProfDataUtils: Add extractFromBranchWeightMD function; NFC
Wenlei He via Phabricator via llvm-commits
- [PATCH] D158680: RFC: Interpet {branch_weights 1, 0} as likely/unlikely
Wenlei He via Phabricator via llvm-commits
- [PATCH] D158668: RFC: Add getLikelyBranchWeight helper function
Wenlei He via Phabricator via llvm-commits
- [PATCH] D158680: RFC: Interpet {branch_weights 1, 0} as likely/unlikely
Wenlei He via Phabricator via llvm-commits
- [llvm] [CMake] Pass doc-related LLVM variables to external projects (PR #65531)
Will Hawkins via llvm-commits
- [llvm] [CMake] Pass doc-related LLVM variables to external projects (PR #65531)
Will Hawkins via llvm-commits
- [llvm] [CMake] Pass doc-related LLVM variables to external projects (PR #65531)
Will Hawkins via llvm-commits
- [PATCH] D158483: [CMake] Pass doc-related LLVM variables to external projects
Will Hawkins via Phabricator via llvm-commits
- [PATCH] D100387: Simplify BitVector code
Wingrez via Phabricator via llvm-commits
- [llvm] [LTO] A static relocation model can override the PIC level wrt treating external address as directly accessible (PR #65512)
Wolfgang Pieb via llvm-commits
- [llvm] [LTO] A static relocation model can override the PIC level wrt treating external address as directly accessible (PR #65512)
Wolfgang Pieb via llvm-commits
- [llvm] [LTO] A static relocation model can override the PIC level wrt treating external address as directly accessible (PR #65512)
Wolfgang Pieb via llvm-commits
- [llvm] [LTO] A static relocation model can override the PIC level wrt treating external address as directly accessible (PR #65512)
Wolfgang Pieb via llvm-commits
- [llvm] [LTO] A static relocation model can override the PIC level wrt treating external address as directly accessible (PR #65512)
Wolfgang Pieb via llvm-commits
- [PATCH] D158587: [sanitizer][msan] VarArgHelper for loongarch64
WÁNG Xuěruì via Phabricator via llvm-commits
- [llvm] [NFC] [Support] Fix warning when build with clang-cl on Windows. (PR #65387)
Xiang Li via llvm-commits
- [llvm] [NFC] [Support] Fix warning when build with clang-cl on Windows. (PR #65387)
Xiang Li via llvm-commits
- [llvm] [NFC] [Support] Fix warning when build with clang-cl on Windows. (PR #65387)
Xiang Li via llvm-commits
- [llvm] [NFC] [Support] Fix warning when build with clang-cl on Windows. (PR #65387)
Xiang Li via llvm-commits
- [llvm] [NFC] [Support] Fix warning when build with clang-cl on Windows. (PR #65387)
Xiang Li via llvm-commits
- [llvm] [NFC] [Support] Fix warning when build with clang-cl on Windows. (PR #65387)
Xiang Li via llvm-commits
- [PATCH] D159319: [AIX] Add threadId and use nanosecond timestamp in sinit/sterm symbols
Xing Xue via Phabricator via llvm-commits
- [PATCH] D134600: [RISCV][LLD] Add RISCV zcmt optimise in linker relaxation
Xinlong Wu via Phabricator via llvm-commits
- [llvm] Reland "[CUDA][HIP] Fix overloading resolution in global variable ini… (PR #65606)
Yaxun Liu via llvm-commits
- [llvm] Reland "[CUDA][HIP] Fix overloading resolution in global variable ini… (PR #65606)
Yaxun Liu via llvm-commits
- [llvm] Reland "[CUDA][HIP] Fix overloading resolution in global variable ini… (PR #65606)
Yaxun Liu via llvm-commits
- [llvm] Reland "[CUDA][HIP] Fix overloading resolution in global variable ini… (PR #65606)
Yaxun Liu via llvm-commits
- [llvm] Reland "[CUDA][HIP] Fix overloading resolution in global variable ini… (PR #65606)
Yaxun Liu via llvm-commits
- [llvm] Reland "[CUDA][HIP] Fix overloading resolution in global variable ini… (PR #65606)
Yaxun Liu via llvm-commits
- [llvm] Reland "[CUDA][HIP] Fix overloading resolution in global var init" (PR #65606)
Yaxun Liu via llvm-commits
- [llvm] Reland "[CUDA][HIP] Fix overloading resolution in global var init" (PR #65606)
Yaxun Liu via llvm-commits
- [llvm] Reland "[CUDA][HIP] Fix overloading resolution in global var init" (PR #65606)
Yaxun Liu via llvm-commits
- [llvm] Reland "[CUDA][HIP] Fix overloading resolution in global var init" (PR #65606)
Yaxun Liu via llvm-commits
- [llvm] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)
Yaxun Liu via llvm-commits
- [compiler-rt] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)
Yaxun Liu via llvm-commits
- [llvm] [RISCV] Disable zcmp push/pop for variadic functions. (PR #65302)
Yeting Kuo via llvm-commits
- [llvm] [RISCV] Disable zcmp push/pop for variadic functions. (PR #65302)
Yeting Kuo via llvm-commits
- [llvm] [RISCV] Disable zcmp push/pop for variadic functions. (PR #65302)
Yeting Kuo via llvm-commits
- [llvm] [RISCV] Disable zcmp push/pop for variadic functions. (PR #65302)
Yeting Kuo via llvm-commits
- [llvm] [RISCV] Use add.uw for (or (and X, 0xFFFFFFFF), Y) if Y has zeroes in the lower 32 bits. (PR #65402)
Yeting Kuo via llvm-commits
- [llvm] [RISCV] Disable zcmp push/pop for variadic functions. (PR #65302)
Yeting Kuo via llvm-commits
- [PATCH] D159277: [RISCV] Disable zcmp push/pop for variadic functions.
Yeting Kuo via Phabricator via llvm-commits
- [compiler-rt] 61d6154 - [llvm-cov] Fix the test of bnary-id-lookup.c after the commit cd8fe1dbc.
Ying Yi via llvm-commits
- [llvm] [ConstraintElim] Add missing checks in test_overflow_in_negate_constraint (PR #65841)
Yingwei Zheng via llvm-commits
- [llvm] [ConstraintElim] Add missing checks in test_overflow_in_negate_constraint (PR #65841)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fix transforms of two select patterns (PR #65845)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fix transforms of two select patterns (PR #65845)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fix transforms of two select patterns (PR #65845)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fix transforms of two select patterns (PR #65845)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Simplify the pattern `a ne/eq (zext (a ne/eq c))` (PR #65852)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Simplify the pattern `a ne/eq (zext (a ne/eq c))` (PR #65852)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Simplify the pattern `a ne/eq (zext (a ne/eq c))` (PR #65852)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Simplify the pattern `a ne/eq (zext (a ne/eq c))` (PR #65852)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Simplify the pattern `a ne/eq (zext (a ne/eq c))` (PR #65852)
Yingwei Zheng via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fix transforms of two select patterns (PR #65845)
Yingwei Zheng via llvm-commits
- [llvm] 780b046 - [InstCombine] Use m_c_And/m_c_Or instead of duplicate logic. NFC.
Yingwei Zheng via llvm-commits
- [llvm] [InstSimplify] Simplify `icmp X & C1, X & C2` when `(C1 & C2) == C1/C2` (PR #65905)
Yingwei Zheng via llvm-commits
- [llvm] [InstSimplify] Simplify `icmp X & C1, X & C2` when `(C1 & C2) == C1/C2` (PR #65905)
Yingwei Zheng via llvm-commits
- [llvm] [InstSimplify] Simplify `icmp X & C1, X & C2` when `(C1 & C2) == C1/C2` (PR #65905)
Yingwei Zheng via llvm-commits
- [llvm] [InstSimplify] Simplify `icmp X & C1, X & C2` when `(C1 & C2) == C1/C2` (PR #65905)
Yingwei Zheng via llvm-commits
- [llvm] [InstSimplify] Simplify `icmp X & C1, X & C2` when `(C1 & C2) == C1/C2` (PR #65905)
Yingwei Zheng via llvm-commits
- [llvm] 32ad455 - [InstCombine] Add test cases from PR62898. NFC.
Yingwei Zheng via llvm-commits
- [llvm] 44e5afd - [InstCombine] Generalize foldICmpWithMinMax
Yingwei Zheng via llvm-commits
- [llvm] [ConstraintElim] Add missing checks in test_overflow_in_negate_constraint (PR #65841)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Simplify uaddo pattern (PR #65910)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Simplify uaddo pattern (PR #65910)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Simplify uaddo pattern (PR #65910)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Simplify uaddo pattern (PR #65910)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Simplify uaddo pattern (PR #65910)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Simplify uaddo pattern (PR #65910)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Simplify uaddo pattern (PR #65910)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Simplify uaddo pattern (PR #65910)
Yingwei Zheng via llvm-commits
- [compiler-rt] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [compiler-rt] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [lld] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [lld] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [lld] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [lld] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [lld] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [lld] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
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Yingwei Zheng via llvm-commits
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Yingwei Zheng via llvm-commits
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Yingwei Zheng via llvm-commits
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Yingwei Zheng via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [lld] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [lld] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
Yingwei Zheng via llvm-commits
- [PATCH] D158673: [SDAG][RISCV] Avoid neg instructions when lowering atomic_load_sub with a constant rhs
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D158673: [SDAG][RISCV] Avoid neg instructions when lowering atomic_load_sub with a constant rhs
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D158759: [RISCV] Add a pass to rewrite rd to x0 for non-computational instrs whose return values are unused
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D156390: [SDAG][RISCV] Avoid expanding is-power-of-2 pattern on riscv32/64 with zbb
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D153148: [InstCombine] Fold `(-1 + A) & B` into `A ? 0 : B` where A is effectively a bool
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D156227: [InstCombine] Add test cases from PR62898. NFC.
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D156238: [InstCombine] Generalize foldICmpWithMinMax
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D153505: [ConstantRange] Handle `Intrinsic::cttz` and `Intrinsic::ctpop`
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D158956: [RISCV] Initial ISel support for the experimental zacas extension
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D156238: [InstCombine] Generalize foldICmpWithMinMax
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D153148: [InstCombine] Fold `(-1 + A) & B` into `A ? 0 : B` where A is effectively a bool
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D156227: [InstCombine] Add test cases from PR62898. NFC.
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D156238: [InstCombine] Generalize foldICmpWithMinMax
Yingwei Zheng via Phabricator via llvm-commits
- [llvm] SLP/RISCV: add test for vectorized ctpop, like in X86 (PR #65330)
Yueh-Ting Chen via llvm-commits
- [llvm] [RISCV][NFC] Remove unused checkline (PR #65560)
Yueh-Ting Chen via llvm-commits
- [PATCH] D157694: [RISCV][MC]Add support for Binary MCExpr
Yunze Zhu(Thead) via Phabricator via llvm-commits
- [PATCH] D157694: [RISCV][MC]Add support for Binary MCExpr
Yunze Zhu(Thead) via Phabricator via llvm-commits
- [llvm] [SystemZ][z/OS] This change adds support for the PPA2 section in zOS (PR #65407)
Yusra Syeda via llvm-commits
- [llvm] [SystemZ][z/OS] This change adds support for the PPA2 section in zOS (PR #65407)
Yusra Syeda via llvm-commits
- [llvm] [SystemZ][z/OS] This change adds support for the PPA2 section in zOS (PR #65407)
Yusra Syeda via llvm-commits
- [llvm] [SystemZ][z/OS] This change adds support for the PPA2 section in zOS (PR #65407)
Yusra Syeda via llvm-commits
- [llvm] [SystemZ][z/OS] This change adds support for the PPA2 section in zOS (PR #65407)
Yusra Syeda via llvm-commits
- [llvm] [SystemZ][z/OS] This change adds support for the PPA2 section in zOS (PR #65407)
Yusra Syeda via llvm-commits
- [llvm] [SystemZ][z/OS] This change adds support for the PPA2 section in zOS (PR #65407)
Yusra Syeda via llvm-commits
- [llvm] [SystemZ][z/OS] This change adds support for the PPA2 section in zOS (PR #65407)
Yusra Syeda via llvm-commits
- [llvm] [SystemZ][z/OS] This change adds support for the PPA2 section in zOS (PR #65407)
Yusra Syeda via llvm-commits
- [llvm] [SystemZ][z/OS] This change adds support for the PPA2 section in zOS (PR #65407)
Yusra Syeda via llvm-commits
- [llvm] [SystemZ][z/OS] This change adds support for the PPA2 section in zOS (PR #65407)
Yusra Syeda via llvm-commits
- [llvm] [SystemZ][z/OS] This change adds support for the PPA2 section in zOS (PR #65407)
Yusra Syeda via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [Doc] Clarify the comments about how handleErrors works. (PR #65655)
Zequan Wu via llvm-commits
- [llvm] [Doc] Clarify the comments about how handleErrors works. (PR #65655)
Zequan Wu via llvm-commits
- [PATCH] D157913: [Coverage] Allow Clang coverage to be used with debug info correlation.
Zequan Wu via Phabricator via llvm-commits
- [PATCH] D157913: [Coverage] Allow Clang coverage to be used with debug info correlation.
Zequan Wu via Phabricator via llvm-commits
- [PATCH] D157913: [Coverage] Allow Clang coverage to be used with debug info correlation.
Zequan Wu via Phabricator via llvm-commits
- [llvm] [unittests] Add missing includes (PR #65681)
Zero Omega via llvm-commits
- [llvm] [unittests] Add missing includes (PR #65681)
Zero Omega via llvm-commits
- [llvm] [unittests] Add missing includes (PR #65681)
Zero Omega via llvm-commits
- [llvm] [unittests] Add missing includes (PR #65681)
Zero Omega via llvm-commits
- [llvm] [unittests] Add missing includes (PR #65681)
Zero Omega via llvm-commits
- [llvm] [unittests] Add missing includes (PR #65681)
Zero Omega via llvm-commits
- [llvm] [unittests] Add missing includes (PR #65681)
Zero Omega via llvm-commits
- [llvm] [unittests] Add missing includes (PR #65681)
Zero Omega via llvm-commits
- [llvm] Update GoogleTest to v1.14.0 (PR #65823)
Zero Omega via llvm-commits
- [llvm] Update GoogleTest to v1.14.0 (PR #65823)
Zero Omega via llvm-commits
- [llvm] Update GoogleTest to v1.14.0 (PR #65823)
Zero Omega via llvm-commits
- [llvm] Update GoogleTest to v1.14.0 (PR #65823)
Zero Omega via llvm-commits
- [llvm] Update GoogleTest to v1.14.0 (PR #65823)
Zero Omega via llvm-commits
- [PATCH] D152407: [AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre.
Zhuojia Shen via Phabricator via llvm-commits
- [PATCH] D159451: [BasicAA] BasicAA update for scalable quantity
harvin iriawan via Phabricator via llvm-commits
- [PATCH] D159451: [BasicAA] BasicAA update for scalable quantity
harvin iriawan via Phabricator via llvm-commits
- [PATCH] D159451: [BasicAA] BasicAA update for scalable quantity
harvin iriawan via Phabricator via llvm-commits
- [PATCH] D159451: [BasicAA] BasicAA update for scalable quantity
harvin iriawan via Phabricator via llvm-commits
- [PATCH] D159431: [RISCV] adjust first sp size to use c.addi16sp.
lcvon via Phabricator via llvm-commits
- [PATCH] D159431: [RISCV] adjust first sp size to use c.addi16sp.
lcvon via Phabricator via llvm-commits
- [PATCH] D158623: [RISCV] Reorder the stack frame objects.
lcvon via Phabricator via llvm-commits
- [PATCH] D158623: [RISCV] Reorder the stack frame objects.
lcvon via Phabricator via llvm-commits
- [PATCH] D159319: [AIX] Add threadId and use nanosecond timestamp in sinit/sterm symbols
wael yehia via Phabricator via llvm-commits
- [PATCH] D159319: [AIX] Add threadId and use nanosecond timestamp in sinit/sterm symbols
wael yehia via Phabricator via llvm-commits
- [PATCH] D159319: [AIX] Add threadId and use nanosecond timestamp in sinit/sterm symbols
wael yehia via Phabricator via llvm-commits
- [llvm] [AMDGPU] Erase ShaderFunctions in AMDGPUPALMetadata::reset() (PR #65247)
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- [llvm] [AMDGPU] Erase ShaderFunctions in AMDGPUPALMetadata::reset() (PR #65247)
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- [llvm] [mlir][OpenMP] Added omp.region operation (PR #65243)
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- [llvm] b1b6c06 - [AMDGPU] Erase ShaderFunctions in AMDGPUPALMetadata::reset() (#65247)
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- [llvm] [AArch64][SME] Disable tail-call optimization for __arm_locally_streaming functions. (PR #65258)
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- [llvm] [AArch64][SME] Disable tail-call optimization for __arm_locally_streaming functions. (PR #65258)
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- [llvm] [AArch64][SME] Disable tail-call optimization for __arm_locally_streaming functions. (PR #65258)
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- [llvm] [AArch64][SME] Disable tail-call optimization for __arm_locally_streaming functions. (PR #65258)
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- [llvm] [AArch64][SME] Various tests should work with +sme, just as they do for +sve (PR #65260)
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- [llvm] [AArch64][SME] Various tests should work with +sme, just as they do for +sve (PR #65260)
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- [llvm] [AArch64][SME] Various tests should work with +sme, just as they do for +sve (PR #65260)
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- [llvm] [AArch64][SME] Various tests should work with +sme, just as they do for +sve (PR #65260)
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- [llvm] [ADT] Fix an empty BitVector call getData assert `idx < size()' failed (PR #65505)
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- [llvm] [BasicBlockSections] Introduce the basic block sections profile version 1. (PR #65506)
via llvm-commits
- [llvm] d148767 - [llvm][ADT] Implement `IntrusiveRefCntPtr::useCount()` (#65502)
via llvm-commits
- [llvm] [ADT] Fix a comment typo (PR #65497)
via llvm-commits
- [llvm] 2e3d694 - [ADT] Add detection utility for incomplete types (#65495)
via llvm-commits
- [llvm] [GitHub] Add more CODEOWNERS for top level projects (PR #65509)
via llvm-commits
- [llvm] [GitHub] Add more CODEOWNERS for top level projects (PR #65509)
via llvm-commits
- [llvm] [GitHub] Add more CODEOWNERS for top level projects (PR #65509)
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- [llvm] 06d2db2 - [ADT] Fix a comment typo (#65497)
via llvm-commits
- [llvm] [ADT] Fix a comment typo (PR #65497)
via llvm-commits
- [llvm] [LTO] A static relocation model can override the PIC level wrt treating external address as directly accessible (PR #65512)
via llvm-commits
- [llvm] [LTO] A static relocation model can override the PIC level wrt treating external address as directly accessible (PR #65512)
via llvm-commits
- [llvm] [LTO] A static relocation model can override the PIC level wrt treating external address as directly accessible (PR #65512)
via llvm-commits
- [llvm] [LTO] A static relocation model can override the PIC level wrt treating external address as directly accessible (PR #65512)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65515)
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- [llvm] 24a0859 - [nfc][thinlto] Factor common state for `computeImportForModule` (#65427)
via llvm-commits
- [compiler-rt] [Fuzzer] Optimize UpdateFeatureFrequency (PR #65288)
via llvm-commits
- [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65515)
via llvm-commits
- [llvm] c473215 - [llvm] Adopt WithMarkup in the MIPS backend (#65384)
via llvm-commits
- [llvm] [NVPTX][NFC] Explicitly specify the matching type for Int32reg (PR #65527)
via llvm-commits
- [llvm] [NVPTX][NFC] Explicitly specify the matching type for Int32reg (PR #65527)
via llvm-commits
- [lld] [lld/ELF] Remove transitionary -plugin-opt=opaque-pointers flag (PR #65529)
via llvm-commits
- [lld] [lld/ELF] Remove transitionary -plugin-opt=opaque-pointers flag (PR #65529)
via llvm-commits
- [lld] [lld/ELF] Remove transitionary -plugin-opt=opaque-pointers flag (PR #65529)
via llvm-commits
- [lld] [lld/ELF] Remove transitionary -plugin-opt=opaque-pointers flag (PR #65529)
via llvm-commits
- [llvm] [lld/ELF] Remove transitionary -plugin-opt=opaque-pointers flag (PR #65529)
via llvm-commits
- [llvm] [lld/ELF] Remove transitionary -plugin-opt=opaque-pointers flag (PR #65529)
via llvm-commits
- [llvm] [lld/ELF] Remove transitionary -plugin-opt=opaque-pointers flag (PR #65529)
via llvm-commits
- [llvm] a4b82f7 - [lldb] Allow lldbDataFormatters.py to be used by other names (NFC) (#65528)
via llvm-commits
- [llvm] [lld/ELF, gold] Remove transitionary opaque pointer flags (PR #65529)
via llvm-commits
- [llvm] [lld/ELF, gold] Remove transitionary opaque pointer flags (PR #65529)
via llvm-commits
- [llvm] [NVPTX][NFC] Explicitly specify the matching type for Int32reg (PR #65527)
via llvm-commits
- [llvm] 24c5f18 - [NVPTX][NFC] Explicitly specify the matching type for Int32reg (#65527)
via llvm-commits
- [llvm] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [compiler-rt] [libc++] Implement ranges::contains (PR #65148)
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- [compiler-rt] [libc++] Implement ranges::contains (PR #65148)
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- [llvm] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [llvm] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
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- [llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [RISCV] Added definition of Ventana veyron-v1 processor. (PR #65535)
via llvm-commits
- [llvm] [RISCV] Added definition of Ventana veyron-v1 processor. (PR #65535)
via llvm-commits
- [llvm] [RISCV] Added definition of Ventana veyron-v1 processor. (PR #65535)
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- [llvm] [RISCV] Added definition of Ventana veyron-v1 processor. (PR #65535)
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- [llvm] [RISCV] Added definition of Ventana veyron-v1 processor. (PR #65535)
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- [llvm] [RISCV] Added definition of Ventana veyron-v1 processor. (PR #65535)
via llvm-commits
- [llvm] [RISCV] Added definition of Ventana veyron-v1 processor. (PR #65535)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [compiler-rt] Enabling Intel GPU Integration. (PR #65539)
via llvm-commits
- [llvm] Enabling Intel GPU Integration. (PR #65539)
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- [lld] Enabling Intel GPU Integration. (PR #65539)
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- [llvm] Enabling Intel GPU Integration. (PR #65539)
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- [lld] Enabling Intel GPU Integration. (PR #65539)
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- [compiler-rt] Enabling Intel GPU Integration. (PR #65539)
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- [compiler-rt] Enabling Intel GPU Integration. (PR #65539)
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- [lld] Enabling Intel GPU Integration. (PR #65539)
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- [llvm] Enabling Intel GPU Integration. (PR #65539)
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- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [lld/ELF, gold] Remove transitionary opaque pointer flags (PR #65529)
via llvm-commits
- [lld] a07d4c0 - [lld/ELF,gold] Remove transitionary opaque pointer flags (#65529)
via llvm-commits
- [llvm] [lld/ELF, gold] Remove transitionary opaque pointer flags (PR #65529)
via llvm-commits
- [llvm] [libc] Fix lseek in bazel (PR #65542)
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- [llvm] [libc] Fix lseek in bazel (PR #65542)
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- [llvm] [libc] Fix lseek in bazel (PR #65542)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] aea0ea5 - [llvm-nm] Fix msan error in llvm-nm/wasm/weak-symbols.yaml.test (#65538)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [compiler-rt] [sanitizer_symbolizer] Symbolizer Markup for linux. (PR #65543)
via llvm-commits
- [compiler-rt] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [llvm] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [compiler-rt] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [llvm] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [llvm] 5224039 - [AssumptionCache] Track GlobalValues as affected values. (#65425)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [compiler-rt] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [llvm] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [compiler-rt] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [compiler-rt] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [compiler-rt] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [lld] [lld][MachO] Add option to suppress mismatch profile errors (PR #65551)
via llvm-commits
- [llvm] [Sparc] Change register spelling to lowercase (NFC) (PR #65464)
via llvm-commits
- [llvm] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [compiler-rt] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [llvm] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [compiler-rt] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [llvm] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [compiler-rt] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [RISCV][NFC] Remove unused checkline (PR #65560)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [llvm] Adopt WithMarkup in the ARM backend (PR #65561)
via llvm-commits
- [llvm] [Bolt] Solving pie support issue (PR #65494)
via llvm-commits
- [llvm] [Bolt] Solving pie support issue (PR #65494)
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- [llvm] [Bolt] Solving pie support issue (PR #65494)
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- [llvm] [Bolt] Solving pie support issue (PR #65494)
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- [llvm] [Bolt] Solving pie support issue (PR #65494)
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- [llvm] [Bolt] Solving pie support issue (PR #65494)
via llvm-commits
- [llvm] Fix AtomicInterfacesTdFiles missing deps/typos in Bazel (PR #65562)
via llvm-commits
- [llvm] [Bolt] Solving pie support issue (PR #65494)
via llvm-commits
- [llvm] [Bolt] Solving pie support issue (PR #65494)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [lit] Echo full RUN lines in case of external shells (PR #65267)
via llvm-commits
- [llvm] [NFC]Add assert to avoid possibly deref nullptr (PR #65564)
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- [llvm] [NFC]Add assert to avoid possibly deref nullptr (PR #65564)
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- [llvm] [NFC]Add assert to avoid possibly deref nullptr (PR #65564)
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- [llvm] [NFC]Add assert to avoid possibly deref nullptr (PR #65564)
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- [llvm] [NFC]Add assert to avoid possibly deref nullptr (PR #65564)
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- [llvm] [NFC]Add assert to avoid possibly deref nullptr (PR #65564)
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- [llvm] [NFC]Add assert to avoid possibly deref nullptr (PR #65564)
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- [llvm] [NFC]Add assert to avoid possibly deref nullptr (PR #65564)
via llvm-commits
- [llvm] db5d845 - [NVPTX] Make i16x2 a native type and add supported vec instructions (#65432)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
via llvm-commits
- [llvm] [llvm] Use llvm::any_cast instead of any_cast (NFC) (PR #65565)
via llvm-commits
- [llvm] [llvm] Use llvm::any_cast instead of any_cast (NFC) (PR #65565)
via llvm-commits
- [llvm] [llvm] Use llvm::any_cast instead of any_cast (NFC) (PR #65565)
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- [llvm] [llvm] Use llvm::any_cast instead of any_cast (NFC) (PR #65565)
via llvm-commits
- [llvm] [llvm] Use llvm::any_cast instead of any_cast (NFC) (PR #65565)
via llvm-commits
- [llvm] [GitHub] Add teams for ADT and Support (PR #65519)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [GitHub] Add teams for the inliner (PR #65567)
via llvm-commits
- [llvm] [GitHub] Add teams for the inliner (PR #65567)
via llvm-commits
- [llvm] [GitHub] Add teams for the inliner (PR #65567)
via llvm-commits
- [llvm] [Bolt] Solving pie support issue (PR #65494)
via llvm-commits
- [llvm] 40aa39d - [Sparc] Change register spelling to lowercase (NFC) (#65464)
via llvm-commits
- [llvm] [NVPTX] Fix crash in libc gpu after db5d845 (PR #65579)
via llvm-commits
- [llvm] b6e19b3 - [NVPTX] Fix crash in libc gpu after db5d845 (#65579)
via llvm-commits
- [llvm] [NVPTX] Fix crash in libc gpu after db5d845 (PR #65579)
via llvm-commits
- [llvm] fab2594 - [RISCV][NFC] Remove unused checkline (#65560)
via llvm-commits
- [llvm] [X86] Simplify the API of FixupBWInstPass::getSuperRegDestIfDead. NFC. (PR #65581)
via llvm-commits
- [llvm] Added erase() to fix memory leak of mlir/unittests/IR/InterfaceTest.cpp (PR #65583)
via llvm-commits
- [llvm] Added erase() to fix memory leak of mlir/unittests/IR/InterfaceTest.cpp (PR #65583)
via llvm-commits
- [llvm] Added erase() to fix memory leak of mlir/unittests/IR/InterfaceTest.cpp (PR #65583)
via llvm-commits
- [llvm] Added erase() to fix memory leak of mlir/unittests/IR/InterfaceTest.cpp (PR #65583)
via llvm-commits
- [llvm] Fix compilation errors in llvm/DebugInfo/PDB headers when using -fforce-emit-vtables (PR #65456)
via llvm-commits
- [llvm] Fix compilation errors in llvm/DebugInfo/PDB headers when using -fforce-emit-vtables (PR #65456)
via llvm-commits
- [llvm] Fix compilation errors in llvm/DebugInfo/PDB headers when using -fforce-emit-vtables (PR #65456)
via llvm-commits
- [llvm] bd3a33c - [X86] Simplify the API of FixupBWInstPass::getSuperRegDestIfDead. NFC. (#65581)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Select UMULL instruction (PR #65469)
via llvm-commits
- [llvm] Fix compilation errors in llvm/DebugInfo/PDB headers when using -fforce-emit-vtables (PR #65456)
via llvm-commits
- [llvm] Fix compilation errors in llvm/DebugInfo/PDB headers when using -fforce-emit-vtables (PR #65456)
via llvm-commits
- [llvm] Fix compilation errors with -fforce-emit-vtables (PR #65456)
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- [llvm] [Sparc] Replace some CAS instructions with InstAlias (PR #65588)
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- [llvm] [Sparc] Replace some CAS instructions with InstAlias (PR #65588)
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- [llvm] [ARM] Change CRC predicated to just HasCRC (PR #65591)
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- [llvm] [ARM] Change CRC predicated to just HasCRC (PR #65591)
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- [llvm] [AMDGPU] Add dynamic LDS size implicit kernel argument to CO-v5 (PR #65273)
via llvm-commits
- [llvm] [AMDGPU] Add dynamic LDS size implicit kernel argument to CO-v5 (PR #65273)
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- [llvm] [X86] Convert X86FixupBWInsts from LivePhysRegs to LiveRegUnits. NFCI. (PR #65592)
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- [llvm] 0dd4d3b - [AMDGPU] Remove predicate on real packed fp32 instructions (#65589)
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- [llvm] 30955c9 - [AMDGPU] Fix V_MOV_B32_indirect inst size (#65584)
via llvm-commits
- [llvm] [RISCV] Shrink vslidedown when lowering fixed extract_subvector (PR #65598)
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- [llvm] 69036eb - [AMDGPU] Fix code-size-estimate.mir test
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- [llvm] [clang][AArch64] Add --print-supported-extensions support (PR #65466)
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- [llvm] [clang][AArch64] Add --print-supported-extensions support (PR #65466)
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- [llvm] [RISCV][CostModel] Add getCFInstrCost RISC-V implementation (PR #65599)
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- [llvm] [AArch64] Fix incorrect big-endian spill in foldMemoryOperandImpl (PR #65601)
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- [llvm] [AArch64] Fix incorrect big-endian spill in foldMemoryOperandImpl (PR #65601)
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- [llvm] [AArch64] Fix incorrect big-endian spill in foldMemoryOperandImpl (PR #65601)
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- [llvm] [AArch64] Fix incorrect big-endian spill in foldMemoryOperandImpl (PR #65601)
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- [llvm] [AArch64] Fix incorrect big-endian spill in foldMemoryOperandImpl (PR #65601)
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- [llvm] [AArch64] Fix incorrect big-endian spill in foldMemoryOperandImpl (PR #65601)
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- [llvm] [AArch64] Fix incorrect big-endian spill in foldMemoryOperandImpl (PR #65601)
via llvm-commits
- [llvm] Reland "[CUDA][HIP] Fix overloading resolution in global variable ini… (PR #65606)
via llvm-commits
- [llvm] [RISCV] Added definition of Ventana veyron-v1 processor. (PR #65535)
via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
via llvm-commits
- [llvm] [Github][OpenMP] Adding rule for OpenMP label (PR #65331)
via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use BitVector. (PR #65423)
via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use BitVector. (PR #65423)
via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use BitVector. (PR #65423)
via llvm-commits
- [llvm] 93cc72b - [Docs] Add example of making a PR with git and GitHub web interface (#65393)
via llvm-commits
- [llvm] [RISCV] Added definition of Ventana veyron-v1 processor. (PR #65535)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Select UMULL instruction (PR #65469)
via llvm-commits
- [llvm] c39b504 - [RISCV][llvm-mca] Add llvm-mca tests for SiFive7 Vector Integer Arith… (#65283)
via llvm-commits
- [llvm] [libc][bazel] Fix missing dependencies for `lseek` (PR #65618)
via llvm-commits
- [llvm] [mlir][bufferization] Generalize tensor slice rules to subset ops (PR #65619)
via llvm-commits
- [llvm] [mlir][bufferization] Generalize tensor slice rules to subset ops (PR #65619)
via llvm-commits
- [llvm] [mlir][bufferization] Generalize tensor slice rules to subset ops (PR #65619)
via llvm-commits
- [llvm] [mlir][bufferization] Generalize tensor slice rules to subset ops (PR #65619)
via llvm-commits
- [llvm] 1bd0485 - [LiveRegUnits] Remove use of std::function from phys_regs_and_masks (#65615)
via llvm-commits
- [llvm] [libc] move in_place_t in utility (PR #65623)
via llvm-commits
- [compiler-rt] 370880c - [InstCombine] Fold icmp into phi beyond the same BB.
via llvm-commits
- [llvm] [ADT] Fix an empty BitVector call getData assert `idx < size()' failed (PR #65505)
via llvm-commits
- [llvm] [PowerPC] Turn string pooling on by default. (PR #65628)
via llvm-commits
- [llvm] [PowerPC] Turn string pooling on by default. (PR #65628)
via llvm-commits
- [llvm] [PowerPC] Turn string pooling on by default. (PR #65628)
via llvm-commits
- [llvm] [PowerPC] Turn string pooling on by default. (PR #65628)
via llvm-commits
- [llvm] [PowerPC] Turn string pooling on by default. (PR #65628)
via llvm-commits
- [llvm] [ADT] Fix an empty BitVector call getData assert `idx < size()' failed (PR #65505)
via llvm-commits
- [llvm] 7f49957 - SLP/RISCV: add test for vectorized ctpop, like in X86 (#65330)
via llvm-commits
- [llvm] f8a1c8b - [llvm] Use llvm::any_cast instead of any_cast (NFC) (#65565)
via llvm-commits
- [llvm] [llvm] Use llvm::any_cast instead of any_cast (NFC) (PR #65565)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Select llvm.aarch64.neon.ld* intrinsics (PR #65630)
via llvm-commits
- [llvm] [libc] Add is_member_pointer_v (PR #65631)
via llvm-commits
- [llvm] e91e3cf - [Attributor] Enable AAAddressSpace for OpenMPOpt (#65544)
via llvm-commits
- [llvm] 1cc9f62 - [GlobalISel] Add constant-folding of FP binops to combiner. (#65230)
via llvm-commits
- [llvm] [ADT] Remove any_isa (NFC) (PR #65636)
via llvm-commits
- [llvm] [ADT] Remove any_isa (NFC) (PR #65636)
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- [llvm] [ADT] Remove any_isa (NFC) (PR #65636)
via llvm-commits
- [llvm] 1eab92b - [CodeGen] Implement MVT::getSizeInBits with a lookup table (#65604)
via llvm-commits
- [llvm] b85a9b3 - [PowerPC] Try to use less instructions to materialize 64-bit constant when High32=Low32.
via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
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- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
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- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use BitVector. (PR #65423)
via llvm-commits
- [llvm] [libc] Fix lseek in bazel (PR #65542)
via llvm-commits
- [llvm] [libc] Fix lseek in bazel (PR #65542)
via llvm-commits
- [llvm] Add GitHub workflow for check Python file formatting (PR #65482)
via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use BitVector. (PR #65423)
via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use BitVector. (PR #65423)
via llvm-commits
- [llvm] [AArch64] Move LDR_PXI from isStoreToStackSlot to isLoadFromStackSlot (PR #65658)
via llvm-commits
- [llvm] [AArch64] Move LDR_PXI from isStoreToStackSlot to isLoadFromStackSlot (PR #65658)
via llvm-commits
- [llvm] [AArch64] Move LDR_PXI from isStoreToStackSlot to isLoadFromStackSlot (PR #65658)
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- [llvm] [GlobalISel] Add constant folding support for G_FMA/G_FMAD in the combiner. (PR #65659)
via llvm-commits
- [llvm] [GlobalISel] Add constant folding support for G_FMA/G_FMAD in the combiner. (PR #65659)
via llvm-commits
- [llvm] [AMDGPU] Incorrect error message regarding SCC modifier (PR #65660)
via llvm-commits
- [llvm] [AMDGPU] Incorrect error message regarding SCC modifier (PR #65660)
via llvm-commits
- [llvm] [AMDGPU] Incorrect error message regarding SCC modifier (PR #65660)
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- [llvm] [AMDGPU] Incorrect error message regarding SCC modifier (PR #65660)
via llvm-commits
- [llvm] [AMDGPU] Incorrect error message regarding SCC modifier (PR #65660)
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- [llvm] [AMDGPU] Incorrect error message regarding SCC modifier (PR #65660)
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- [llvm] [RISCV][GISel] Add initial pre-legalizer combiners copying from AArch64. (PR #65663)
via llvm-commits
- [llvm] [RISCV][GISel] Add initial pre-legalizer combiners copying from AArch64. (PR #65663)
via llvm-commits
- [llvm] [Documentation] Replace recommonmark by myst-parser (PR #65664)
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- [llvm] [Documentation] Replace recommonmark by myst-parser (PR #65664)
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- [llvm] [Documentation] Replace recommonmark by myst-parser (PR #65664)
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- [llvm] [Documentation] Replace recommonmark by myst-parser (PR #65664)
via llvm-commits
- [llvm] [Documentation] Replace recommonmark by myst-parser (PR #65664)
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- [llvm] [llvm-nm] Fix heap-use-after-free while executing 'llvm-nm -n --export-symbols' (PR #65668)
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- [llvm] [llvm-nm] Fix heap-use-after-free while executing 'llvm-nm -n --export-symbols' (PR #65668)
via llvm-commits
- [llvm] [llvm-nm] Fix heap-use-after-free while executing 'llvm-nm -n --export-symbols' (PR #65668)
via llvm-commits
- [llvm] [llvm-nm] Fix heap-use-after-free while executing 'llvm-nm -n --export-symbols' (PR #65668)
via llvm-commits
- [llvm] 04224d1 - [InferAddressSpaces] Register pass. (#65639)
via llvm-commits
- [llvm] 1c567a5 - getelementptr inbounds clarifications (#65478)
via llvm-commits
- [compiler-rt] [libc++] Implement ranges::contains (PR #65148)
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- [compiler-rt] [libc++] Implement ranges::contains (PR #65148)
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- [llvm] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [llvm] [PowerPC] Turn string pooling on by default. (PR #65628)
via llvm-commits
- [llvm] 0a4a8be - [PowerPC] Turn string pooling on by default. (#65628)
via llvm-commits
- [compiler-rt] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [llvm] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [compiler-rt] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [llvm] Remove unneeded work from machine memset (PR #65672)
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- [compiler-rt] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [llvm] [libc][bazel] Fix missing dependencies for `lseek` (PR #65618)
via llvm-commits
- [llvm] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [llvm] 5044531 - [AMDGPU] Teach CalculateByteProvider about AMDGPUISD::PERM (#65547)
via llvm-commits
- [llvm] Add error note when if clause is used on teams before 5.2. (PR #65686)
via llvm-commits
- [llvm] Add error note when if clause is used on teams before 5.2. (PR #65686)
via llvm-commits
- [llvm] Add error note when if clause is used on teams before 5.2. (PR #65686)
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- [llvm] Add error note when if clause is used on teams before 5.2. (PR #65686)
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- [llvm] [clang] Add error note when if clause is used on teams before 5.2. (PR #65686)
via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use Bitset. (PR #65423)
via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use Bitset. (PR #65423)
via llvm-commits
- [llvm] b4a99f1 - [RISCV] Lower constant build_vectors with few non-sign bits via vsext (#65648)
via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use Bitset. (PR #65423)
via llvm-commits
- [compiler-rt] [tsan][go]: add atomic or/and functions (PR #65695)
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- [llvm] [NFC] Update coroutine intrinsics documentation and few remaining tests to opaque pointers (PR #65698)
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- [compiler-rt] d344030 - [Fuzzer] Update build.sh to fix build errors (#65496)
via llvm-commits
- [compiler-rt] bede46f - [Fuzzer] Optimize UpdateFeatureFrequency (#65288)
via llvm-commits
- [llvm] [clang] Add error note when if clause is used on teams before 5.2. (PR #65686)
via llvm-commits
- [llvm] [clang] Add error note when if clause is used on teams before 5.2. (PR #65686)
via llvm-commits
- [llvm] d211ad3 - [clang] Add error note when if clause is used on teams before 5.2. (#65686)
via llvm-commits
- [llvm] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [llvm] [BOLT][test] Fix patch-entries for aarch64 buildbot (PR #65690)
via llvm-commits
- [llvm] [libc++] Implement ranges::contains (PR #65148)
via llvm-commits
- [llvm] [libc++] Implement ranges::contains (PR #65148)
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- [llvm] [libc++] Implement ranges::contains (PR #65148)
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- [llvm] 99fb65f - [NFC]Add assert to avoid possibly deref nullptr (#65564)
via llvm-commits
- [llvm] [NFC]Add assert to avoid possibly deref nullptr (PR #65564)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] 2eb767c - AMDGPU: Scratch instructions are trivially disjoint from SMEM and buffer instructions (#65287)
via llvm-commits
- [lld] [AMDGPU] Remove Code Object V2 (PR #65715)
via llvm-commits
- [llvm] [AMDGPU] Remove Code Object V2 (PR #65715)
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- [llvm] [AMDGPU] Remove Code Object V2 (PR #65715)
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- [lld] [AMDGPU] Remove Code Object V2 (PR #65715)
via llvm-commits
- [lld] [AMDGPU] Remove Code Object V2 (PR #65715)
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- [llvm] [AMDGPU] Remove Code Object V2 (PR #65715)
via llvm-commits
- [lld] [AMDGPU] Remove Code Object V2 (PR #65715)
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- [llvm] [AMDGPU] Remove Code Object V2 (PR #65715)
via llvm-commits
- [llvm] [AMDGPU] Remove Code Object V2 (PR #65715)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] [X86] Do not directly fold for VINSERTPS (PR #65718)
via llvm-commits
- [llvm] [X86] Do not directly fold for VINSERTPS (PR #65718)
via llvm-commits
- [llvm] [X86] Do not directly fold for VINSERTPS (PR #65718)
via llvm-commits
- [llvm] adb01de - [llvm-exegesis] Make SubprocessMemoryTest use PIDs (#65245)
via llvm-commits
- [llvm] [Documentation] Replace recommonmark by myst-parser (PR #65664)
via llvm-commits
- [llvm] d9efcb5 - [PEI][PowerPC] Fix false alarm of stack size limit (#65559)
via llvm-commits
- [llvm] [PEI][PowerPC] Fix false alarm of stack size limit (PR #65559)
via llvm-commits
- [llvm] 9426416 - [llvm-exegesis] Add error handling for fork failures (#65186)
via llvm-commits
- [llvm] 2e44b07 - [X86] Do not directly fold for VINSERTPS (#65718)
via llvm-commits
- [llvm] [X86] Do not check alignment for VINSERTPS (PR #65721)
via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
via llvm-commits
- [llvm] 3639d81 - [ADT] Fix an empty BitVector call getData assert `idx < size()' failed (#65505)
via llvm-commits
- [llvm] 2f78081 - [TableGen] Add a field to filter out GenericTable entries (#65458)
via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
via llvm-commits
- [llvm] [RISCV] Combine trunc (sra sext (X), zext (Y)) to sra (X, smin (Y, ScalarSizeInBits(Y) - 1)) (PR #65728)
via llvm-commits
- [llvm] [RISCV] Combine trunc (sra sext (X), zext (Y)) to sra (X, smin (Y, ScalarSizeInBits(Y) - 1)) (PR #65728)
via llvm-commits
- [llvm] [RISCV] Combine trunc (sra sext (X), zext (Y)) to sra (X, smin (Y, ScalarSizeInBits(Y) - 1)) (PR #65728)
via llvm-commits
- [llvm] [RISCV] Combine trunc (sra sext (X), zext (Y)) to sra (X, smin (Y, ScalarSizeInBits(Y) - 1)) (PR #65728)
via llvm-commits
- [llvm] [RISCV] Combine trunc (sra sext (X), zext (Y)) to sra (X, smin (Y, ScalarSizeInBits(Y) - 1)) (PR #65728)
via llvm-commits
- [llvm] Clean up strange uses of getAnalysisIfAvailable (PR #65729)
via llvm-commits
- [llvm] [RISCV] Combine trunc (sra sext (X), zext (Y)) to sra (X, smin (Y, ScalarSizeInBits(Y) - 1)) (PR #65728)
via llvm-commits
- [llvm] [RISCV] Combine trunc (sra sext (X), zext (Y)) to sra (X, smin (Y, ScalarSizeInBits(Y) - 1)) (PR #65728)
via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
via llvm-commits
- [llvm] [RISCV] Combine trunc (sra sext (X), zext (Y)) to sra (X, smin (Y, ScalarSizeInBits(Y) - 1)) (PR #65728)
via llvm-commits
- [llvm] [WIP][AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already (PR #65735)
via llvm-commits
- [llvm] [RISCV] Combine trunc (sra sext (X), zext (Y)) to sra (X, smin (Y, ScalarSizeInBits(Y) - 1)) (PR #65728)
via llvm-commits
- [llvm] [RISCV] Combine trunc (sra sext (X), zext (Y)) to sra (X, smin (Y, ScalarSizeInBits(Y) - 1)) (PR #65728)
via llvm-commits
- [llvm] a06be8a - SLP/RISCV: add negative test for lrint (#55208) (#65611)
via llvm-commits
- [llvm] [RISCV] Combine trunc (sra sext (x), zext (y)) to sra (x, smin (y, scalarsizeinbits(y) - 1)) (PR #65728)
via llvm-commits
- [llvm] [JITLink][PowerPC] Port rtdyld's tests to jitlink. NFC. (PR #65739)
via llvm-commits
- [llvm] [JITLink][PowerPC] Port rtdyld's tests to jitlink. NFC. (PR #65739)
via llvm-commits
- [llvm] [JITLink][PowerPC] Port rtdyld's tests to jitlink. NFC. (PR #65739)
via llvm-commits
- [llvm] [libc] Add is_scalar (PR #65740)
via llvm-commits
- [llvm] [RISCV] Combine trunc (sra sext (x), zext (y)) to sra (x, smin (y, scalarsizeinbits(y) - 1)) (PR #65728)
via llvm-commits
- [llvm] da1eb88 - [X86] Do not check alignment for VINSERTPS (#65721)
via llvm-commits
- [llvm] [RISCV] Add tests where bin ops of splats could be scalarized. NFC (PR #65747)
via llvm-commits
- [llvm] Replace llvm.memcpy et al's i1 isVolatile with i8 VolFlags (PR #65748)
via llvm-commits
- [llvm] Replace llvm.memcpy et al's i1 isVolatile with i8 VolFlags (PR #65748)
via llvm-commits
- [llvm] Replace llvm.memcpy et al's i1 isVolatile with i8 VolFlags (PR #65748)
via llvm-commits
- [llvm] Replace llvm.memcpy et al's i1 isVolatile with i8 VolFlags (PR #65748)
via llvm-commits
- [llvm] Replace llvm.memcpy et al's i1 isVolatile with i8 VolFlags (PR #65748)
via llvm-commits
- [llvm] Replace llvm.memcpy et al's i1 isVolatile with i8 VolFlags (PR #65748)
via llvm-commits
- [llvm] Replace llvm.memcpy et al's i1 isVolatile with i8 VolFlags (PR #65748)
via llvm-commits
- [llvm] Replace llvm.memcpy et al's i1 isVolatile with i8 VolFlags (PR #65748)
via llvm-commits
- [llvm] [libc] Add is_object (PR #65749)
via llvm-commits
- [llvm] dd5af89 - [AMDGPU] Mark S_NOP as having side effects (#65745)
via llvm-commits
- [llvm] [libc] add invoke_result type traits (PR #65750)
via llvm-commits
- [llvm] [X86] Remove _REV instructions from the EVEX2VEX tables (PR #65752)
via llvm-commits
- [llvm] [X86] Remove _REV instructions from the EVEX2VEX tables (PR #65752)
via llvm-commits
- [llvm] [X86] Remove _REV instructions from the EVEX2VEX tables (PR #65752)
via llvm-commits
- [llvm] Add invoke (PR #65753)
via llvm-commits
- [llvm] [X86] Remove _REV instructions from the EVEX2VEX tables (PR #65752)
via llvm-commits
- [llvm] [X86] Remove _REV instructions from the EVEX2VEX tables (PR #65752)
via llvm-commits
- [llvm] Fix logic to detect cl::option equality. (PR #65754)
via llvm-commits
- [llvm] Fix logic to detect cl::option equality. (PR #65754)
via llvm-commits
- [llvm] [X86] Remove _REV instructions from the EVEX2VEX tables (PR #65752)
via llvm-commits
- [llvm] [RISCV] Make InitUndef handle undef operand (PR #65755)
via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use Bitset. (PR #65423)
via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use Bitset. (PR #65423)
via llvm-commits
- [llvm] ecbd523 - Support: allow building with non-C/C++ language linkers (#65634)
via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use Bitset. (PR #65423)
via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use Bitset. (PR #65423)
via llvm-commits
- [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #65759)
via llvm-commits
- [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #65759)
via llvm-commits
- [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #65759)
via llvm-commits
- [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #65759)
via llvm-commits
- [llvm] 30edf1c - [SLP]Do not early exit if the number of unique elements is non-power-of-2. (#65476)
via llvm-commits
- [llvm] [AArch64][CodeGen] Fix wrong operand order when creating vcmla intrinsic (PR #65278)
via llvm-commits
- [llvm] [AArch64][CodeGen] Fix wrong operand order when creating vcmla intrinsic (PR #65278)
via llvm-commits
- [llvm] AMDGPU: Fix handling of -0 in round lowering (PR #65761)
via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
via llvm-commits
- [llvm] [AArch64][CodeGen] Fix wrong operand order when creating vcmla intrinsic (PR #65278)
via llvm-commits
- [llvm] Add `visitGEPOfAlloc` to restore the `visitGEPOfBitcast` part of the behavior of non-opaque pointers. (PR #65764)
via llvm-commits
- [llvm] Add `visitGEPOfAlloc` to restore the `visitGEPOfBitcast` part of the behavior of non-opaque pointers. (PR #65764)
via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
via llvm-commits
- [llvm] bd6e77c - [X86] Convert X86FixupBWInsts from LivePhysRegs to LiveRegUnits. NFCI. (#65592)
via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination based on SubsetOpInterface (PR #65766)
via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination based on SubsetOpInterface (PR #65766)
via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination based on SubsetOpInterface (PR #65766)
via llvm-commits
- [llvm] [mlir][bufferization] Empty tensor elimination based on SubsetOpInterface (PR #65766)
via llvm-commits
- [llvm] [mlir][bufferization][NFC] Rename copy_tensor op to materialize_in_destination (PR #65467)
via llvm-commits
- [llvm] [llvm-libgcc][CMake] Refactor llvm-libgcc (PR #65455)
via llvm-commits
- [llvm] [AArch64]: Refactor target parser to use Bitset. (PR #65423)
via llvm-commits
- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
via llvm-commits
- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
via llvm-commits
- [llvm] [JITLink][PowerPC] Port rtdyld's tests to jitlink. NFC. (PR #65739)
via llvm-commits
- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
via llvm-commits
- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
via llvm-commits
- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
via llvm-commits
- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
via llvm-commits
- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
via llvm-commits
- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
via llvm-commits
- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
via llvm-commits
- [llvm] 8669a9f - [AMDGPU] Cope with SelectionDAG::UpdateNodeOperands returning a different SDNode (#65765)
via llvm-commits
- [llvm] 8c03239 - [AMDGPU] New intrinsic void llvm.amdgcn.s.nop(i16) (#65757)
via llvm-commits
- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
via llvm-commits
- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [llvm] [PseudoProbe] Use probe id as the base dwarf discriminator for callsites (PR #65685)
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- [llvm] [nfc][OpenMPIRBuilder] Formatting OMPIRBuilder.cpp and OMPIRBuilder.h (PR #65772)
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- [llvm] [nfc][OpenMPIRBuilder] Formatting OMPIRBuilder.cpp and OMPIRBuilder.h (PR #65772)
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- [llvm] [nfc][OpenMPIRBuilder] Formatting OMPIRBuilder.cpp and OMPIRBuilder.h (PR #65772)
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- [llvm] Scalarize binop of splats build vector/free (PR #65773)
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- [llvm] Scalarize binop of splats build vector/free (PR #65773)
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- [llvm] Scalarize binop of splats build vector/free (PR #65773)
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- [llvm] Scalarize binop of splats build vector/free (PR #65773)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [llvm] [AArch64] Move LDR_PXI from isStoreToStackSlot to isLoadFromStackSlot (PR #65658)
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- [llvm] [nfc][OpenMPIRBuilder] Formatting OMPIRBuilder.cpp and OMPIRBuilder.h (PR #65772)
via llvm-commits
- [llvm] 21c251a - [LowerMatrixIntrinsics] Drop support for typed pointers (#65605)
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- [llvm] 5ee7dc0 - [RISCV] Match gather(splat(ptr)) as zero strided load (#65769)
via llvm-commits
- [llvm] 5f16a3a - workflows: Add a simple pull request subscription workflow (#64913)
via llvm-commits
- [llvm] [PseudoProbe] Use probe id as the base dwarf discriminator for callsites (PR #65685)
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- [llvm] 6b856ab - [PseudoProbe] Use probe id as the base dwarf discriminator for callsites (#65685)
via llvm-commits
- [llvm] 8929f38 - [nfc][OpenMPIRBuilder] Formatting OMPIRBuilder.cpp and OMPIRBuilder.h (#65772)
via llvm-commits
- [llvm] [nfc][OpenMPIRBuilder] Formatting OMPIRBuilder.cpp and OMPIRBuilder.h (PR #65772)
via llvm-commits
- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [compiler-rt] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [compiler-rt] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [compiler-rt] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [compiler-rt] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [compiler-rt] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [compiler-rt] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [compiler-rt] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [compiler-rt] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65767)
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- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
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- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
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- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
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- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
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- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65785)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65785)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65785)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65785)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65785)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65785)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65785)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65785)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65785)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65785)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65785)
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- [llvm] a560d21 - [unittests] Add missing includes (#65681)
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- [llvm] [llvm-nm] Fix heap-use-after-free while executing 'llvm-nm -n --export-symbols' (PR #65668)
via llvm-commits
- [llvm] a501d06 - [Attributor] Only manifest pointer operand for `StoreInst` in `AAAddressSpace` (#65708)
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- [llvm] 1a0cbb9 - [NFC] Update coroutine intrinsics documentation and few remaining tests to opaque pointers (#65698)
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- [llvm] [libc] Add invoke (PR #65753)
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- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
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- [llvm] 6b6312b - Aligning the section about pull-request with the `gh` tools with the section using the web UI (#65795)
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- [llvm] 37b5388 - [AMDGPU] Incorrect error message regarding SCC modifier (#65660)
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- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65799)
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- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65799)
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- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)
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- [llvm] [AMDGPU] Global ISel for packed fp32 instructions (PR #65803)
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- [llvm] 0a7a926 - [NVPTX] Make i16x2 a native type and add supported vec instructions (#65799)
via llvm-commits
- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65799)
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- [llvm] [RFC] Support: hoist lld's executable name code to Path (PR #65812)
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- [llvm] [RFC] Support: hoist lld's executable name code to Path (PR #65812)
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- [llvm] 0eeca57 - [JITLink][PowerPC] Port rtdyld's tests to jitlink. NFC. (#65739)
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- [llvm] [JITLink][PowerPC] Port rtdyld's tests to jitlink. NFC. (PR #65739)
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- [compiler-rt] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65515)
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- [compiler-rt] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65515)
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- [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)
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- [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)
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- [llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65799)
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- [llvm] Update GoogleTest to v1.14.0 (PR #65823)
via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
via llvm-commits
- [llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)
via llvm-commits
- [llvm] 1029fd0 - [NFC][ValueTracking] Simplify check in llvm::isBitwiseValue() (#65817)
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- [llvm] Empty test (just a test...) (PR #65439)
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- [llvm] Empty test (just a test...) (PR #65439)
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- [llvm] Empty test (just a test...) (PR #65439)
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- [llvm] aaa0906 - [GlobPattern][Docs] End list with "." (#65397)
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- [llvm] [Attributor] Avoid AS-cast for function pointers (PR #65825)
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- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65785)
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- [llvm] [ADT] Remove any_isa (NFC) (PR #65636)
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- [llvm] [ADT] Remove any_isa (NFC) (PR #65636)
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- [llvm] Add `visitGEPOfAlloc` to restore the `visitGEPOfBitcast` part of the behavior of non-opaque pointers. (PR #65764)
via llvm-commits
- [llvm] Add `visitGEPOfAlloc` to restore the `visitGEPOfBitcast` part of the behavior of non-opaque pointers. (PR #65764)
via llvm-commits
- [llvm] Add `visitGEPOfAlloc` to restore the `visitGEPOfBitcast` part of the behavior of non-opaque pointers. (PR #65764)
via llvm-commits
- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
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- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
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- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
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- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
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- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
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- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
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- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
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- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
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- [llvm] [LAA] Improve the output remark for LoopVectorize (PR #65832)
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- [llvm] [LAA] Improve the output remark for LoopVectorize (PR #65832)
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- [llvm] [LAA] Improve the output remark for LoopVectorize (PR #65832)
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- [llvm] [LAA] Improve the output remark for LoopVectorize (PR #65832)
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- [llvm] [LAA] Improve the output remark for LoopVectorize (PR #65832)
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- [llvm] [LAA] Improve the output remark for LoopVectorize (PR #65832)
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- [llvm] [LAA] Improve the output remark for LoopVectorize (PR #65832)
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- [llvm] [LAA] Improve the output remark for LoopVectorize (PR #65832)
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- [llvm] [LAA] Improve the output remark for LoopVectorize (PR #65832)
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- [llvm] [LAA] Improve the output remark for LoopVectorize (PR #65832)
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- [llvm] [LAA] Improve the output remark for LoopVectorize (PR #65832)
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- [llvm] [LAA] Improve the output remark for LoopVectorize (PR #65832)
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- [llvm] [LAA] Improve the output remark for LoopVectorize (PR #65832)
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- [llvm] [LAA] Analyze pointers forked by a phi (PR #65834)
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- [llvm] [LAA] Analyze pointers forked by a phi (PR #65834)
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- [llvm] [LAA] Analyze pointers forked by a phi (PR #65834)
via llvm-commits
- [llvm] [LAA] Analyze pointers forked by a phi (PR #65834)
via llvm-commits
- [llvm] [LAA] Analyze pointers forked by a phi (PR #65834)
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- [llvm] [LAA] Analyze pointers forked by a phi (PR #65834)
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- [llvm] [LAA] Analyze pointers forked by a phi (PR #65834)
via llvm-commits
- [llvm] [LAA] Analyze pointers forked by a phi (PR #65834)
via llvm-commits
- [llvm] [SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #65835)
via llvm-commits
- [llvm] [SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #65835)
via llvm-commits
- [llvm] [SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #65835)
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- [llvm] [SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #65835)
via llvm-commits
- [llvm] [SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #65835)
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- [llvm] [SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #65835)
via llvm-commits
- [llvm] [LAA] Improve the output remark for LoopVectorize (PR #65832)
via llvm-commits
- [llvm] [LAA] Improve the output remark for LoopVectorize (PR #65832)
via llvm-commits
- [llvm] [LAA] Analyze pointers forked by a phi (PR #65834)
via llvm-commits
- [llvm] [OpenMPOpt] Allow indirect calls in AAKernelInfoCallSite (PR #65836)
via llvm-commits
- [llvm] [OpenMPOpt] Allow indirect calls in AAKernelInfoCallSite (PR #65836)
via llvm-commits
- [llvm] 4085cb3 - Improve the pull-request subcription notification format by adding the description and files statistics (#65828)
via llvm-commits
- [llvm] Add `visitGEPOfAlloc` to restore the `visitGEPOfBitcast` part of the behavior of non-opaque pointers. (PR #65764)
via llvm-commits
- [llvm] Add `visitGEPOfAlloc` to restore the `visitGEPOfBitcast` part of the behavior of non-opaque pointers. (PR #65764)
via llvm-commits
- [llvm] 1b622ff - [VP] IR expansion for inttoptr/ptrtoint
via llvm-commits
- [llvm] eaab324 - [GlobalISel] Add constant folding support for G_FMA/G_FMAD in the combiner. (#65659)
via llvm-commits
- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
via llvm-commits
- [llvm] 700042c - [RISCV] Remove debug location to spill/reload instructions
via llvm-commits
- [llvm] [InstCombine] Fix transforms of two select patterns (PR #65845)
via llvm-commits
- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
via llvm-commits
- [llvm] [GlobalOpt] Handle DL.getAllocaAddrSpace() != 0 (PR #65847)
via llvm-commits
- [llvm] [Clang] Allow mixed scalar type constraints for inline asm (PR #65465)
via llvm-commits
- [llvm] [Clang] Allow mixed scalar type constraints for inline asm (PR #65465)
via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
via llvm-commits
- [llvm] [InlineAsm] refactor InlineAsm class NFC (PR #65649)
via llvm-commits
- [llvm] Scalarize binop of splats build vector/free (PR #65773)
via llvm-commits
- [llvm] Scalarize binop of splats build vector/free (PR #65773)
via llvm-commits
- [llvm] Replace llvm.memcpy et al's i1 isVolatile with i8 VolFlags (PR #65748)
via llvm-commits
- [llvm] Replace llvm.memcpy et al's i1 isVolatile with i8 VolFlags (PR #65748)
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- [llvm] [Sparc] Replace some CAS instructions with InstAlias (PR #65588)
via llvm-commits
- [llvm] 0917c50 - [Sparc] Replace some CAS instructions with InstAlias (#65588)
via llvm-commits
- [llvm] [ARM][ISel] Fix crash of ISD::FMINNUM/FMAXNUM (PR #65849)
via llvm-commits
- [llvm] [ARM][ISel] Fix crash of ISD::FMINNUM/FMAXNUM (PR #65849)
via llvm-commits
- [llvm] [ARM][ISel] Fix crash of ISD::FMINNUM/FMAXNUM (PR #65849)
via llvm-commits
- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
via llvm-commits
- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
via llvm-commits
- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
via llvm-commits
- [llvm] [SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #65835)
via llvm-commits
- [llvm] [SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #65835)
via llvm-commits
- [llvm] [Sparc] Remove LEA instructions (NFCI) (PR #65850)
via llvm-commits
- [llvm] [OpenMPIRBuilder] Added `createTeams` (PR #65785)
via llvm-commits
- [llvm] [InstCombine] Simplify the pattern `a ne/eq (zext (a ne/eq c))` (PR #65852)
via llvm-commits
- [llvm] 52f6f41 - [GlobalOpt] Handle DL.getAllocaAddrSpace() != 0 (#65847)
via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
via llvm-commits
- [llvm] [github] GitHub Actions workflows changes (PR #65856)
via llvm-commits
- [llvm] AMDGPU: Support llvm.exp10 (PR #65860)
via llvm-commits
- [lld] [ELF] Respect orders of symbol assignments and DEFINED (PR #65866)
via llvm-commits
- [lld] [ELF] Respect orders of symbol assignments and DEFINED (PR #65866)
via llvm-commits
- [llvm] [lit] Are all RUN lines skipped in windows cmd? (PR #65242)
via llvm-commits
- [llvm] [lit] Are all RUN lines skipped in windows cmd? (PR #65242)
via llvm-commits
- [llvm] [EarlyCSE] Compare GEP instructions based on offset (PR #65875)
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- [llvm] [EarlyCSE] Compare GEP instructions based on offset (PR #65875)
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- [llvm] [EarlyCSE] Compare GEP instructions based on offset (PR #65875)
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- [llvm] [EarlyCSE] Compare GEP instructions based on offset (PR #65875)
via llvm-commits
- [llvm] [EarlyCSE] Compare GEP instructions based on offset (PR #65875)
via llvm-commits
- [llvm] Ensure NoTrapAfterNoreturn is false for the wasm backend (PR #65876)
via llvm-commits
- [llvm] Ensure NoTrapAfterNoreturn is false for the wasm backend (PR #65876)
via llvm-commits
- [llvm] Ensure NoTrapAfterNoreturn is false for the wasm backend (PR #65876)
via llvm-commits
- [lld] Ensure NoTrapAfterNoreturn is false for the wasm backend (PR #65876)
via llvm-commits
- [llvm] [SimplifyCFG] handle monotonic wrapped case for D150943 (PR #65882)
via llvm-commits
- [llvm] [AMDGPU] SILowerI1Copies: clear kill flags on COPY (PR #65883)
via llvm-commits
- [llvm] 710b5a1 - Fix logic to detect cl::option equality. (#65754)
via llvm-commits
- [compiler-rt] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)
via llvm-commits
- [compiler-rt] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Add lowering for constant BIT/BIF/BSP (PR #65897)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Add lowering for constant BIT/BIF/BSP (PR #65897)
via llvm-commits
- [llvm] [Github] Use our own issue labeler fork (PR #65900)
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- [llvm] [Github] Use our own issue labeler fork (PR #65900)
via llvm-commits
- [llvm] [Github] Use our own issue labeler fork (PR #65900)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Add lowering for constant BIT/BIF/BSP (PR #65897)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Add lowering for constant BIT/BIF/BSP (PR #65897)
via llvm-commits
- [llvm] [Demangle] demangle builtin type transformations (PR #65902)
via llvm-commits
- [llvm] [ConstraintElim] Add missing checks in test_overflow_in_negate_constraint (PR #65841)
via llvm-commits
- [llvm] [InstSimplify] Simplify `icmp X & C1, X & C2` when `(C1 & C2) == C1/C2` (PR #65905)
via llvm-commits
- [llvm] [InstSimplify] Simplify `icmp X & C1, X & C2` when `(C1 & C2) == C1/C2` (PR #65905)
via llvm-commits
- [llvm] 821c332 - [ConstraintElim] Add missing checks in test_overflow_in_negate_constraint (#65841)
via llvm-commits
- [llvm] [ValueTracking] Simplify uaddo pattern (PR #65910)
via llvm-commits
- [llvm] [ValueTracking] Simplify uaddo pattern (PR #65910)
via llvm-commits
- [compiler-rt] [compiler-rt] Check for and use -lunwind when linking with -nodefaultlibs (PR #65912)
via llvm-commits
- [llvm] Fix #65890: Update the bot message to use github pull requests (PR #65914)
via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
via llvm-commits
- [llvm] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
via llvm-commits
- [compiler-rt] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
via llvm-commits
- [compiler-rt] [MC][RISCV] Add assembly syntax highlighting for RISCV (PR #65853)
via llvm-commits
- [llvm] [X86] Remove _REV instructions from the EVEX2VEX tables (PR #65752)
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- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
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- [llvm] [NFC]Add assert to avoid possibly deref nullptr (PR #65564)
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- [llvm] 503e3a4 - [X86] Remove _REV instructions from the EVEX2VEX tables (#65752)
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- [llvm] [EarlyCSE] Compare GEP instructions based on offset (PR #65875)
via llvm-commits
- [llvm] d47cf2b - [OpenMPOpt] Allow indirect calls in AAKernelInfoCallSite (#65836)
via llvm-commits
- [llvm] [X86][EVEX512] Restrict attaching EVEX512 for default CPU only, NFCI (PR #65920)
via llvm-commits
- [llvm] [GIsel][AArch64] Legalize <2 x i16> for G_INSERT_VECTOR_ELT (PR #65830)
via llvm-commits
- [llvm] a0b49f4 - [VP] more functional Intrinsic to definitions
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- [llvm] 46ee3b3 - [AMDGPU] SILowerI1Copies: clear kill flags on COPY (#65883)
via llvm-commits
- [llvm] 8a58407 - [X86][EVEX512] Restrict attaching EVEX512 for default CPU only, NFCI (#65920)
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- [llvm] 1f15155 - [RISCV] Disable zcmp push/pop for variadic functions. (#65302)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Add lowering for constant BIT/BIF/BSP (PR #65897)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Add lowering for constant BIT/BIF/BSP (PR #65897)
via llvm-commits
- [llvm] [SimplifyCFG] handle monotonic wrapped case for D150943 (PR #65882)
via llvm-commits
- [llvm] [SimplifyCFG] handle monotonic wrapped case for D150943 (PR #65882)
via llvm-commits
- [llvm] [SimplifyCFG] handle monotonic wrapped case for D150943 (PR #65882)
via llvm-commits
- [llvm] [SimplifyCFG] handle monotonic wrapped case for D150943 (PR #65882)
via llvm-commits
- [llvm] [SimplifyCFG] handle monotonic wrapped case for D150943 (PR #65882)
via llvm-commits
- [llvm] 8fdf61a - [AMDGPU][NFCI] Refactor BUFInstructions.td (#65746)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Add lowering for constant BIT/BIF/BSP (PR #65897)
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Last message date:
Sun Sep 10 23:51:24 PDT 2023
Archived on: Sat Dec 30 10:15:46 PST 2023
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