[PATCH] D159265: [AArch64] Remove copy instruction between uaddlv and urshr
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 7 22:55:28 PDT 2023
dmgreen requested changes to this revision.
dmgreen added inline comments.
This revision now requires changes to proceed.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:23169
+ DAG.getConstant(0, DL, MVT::i64));
+ SDValue BITCAST = DAG.getNode(ISD::BITCAST, DL, MVT::v1i64, EXTRACT_SUBVEC);
+
----------------
I'm pretty sure this needs to be an AArch64ISD::NVCAST, not a BITCAST. The BITCAST will swap the 0th and 1st lanes into the i64, we need to keep them inorder.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D159265/new/
https://reviews.llvm.org/D159265
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