[PATCH] D159239: [AMDGPU] Incorrect error message regarding SCC modifier

Jun Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 6 14:30:28 PDT 2023


jwanggit86 added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp:4483
   if (isGFX90A() && !isGFX940() && (CPol & CPol::SCC)) {
-    SMLoc S = getImmLoc(AMDGPUOperand::ImmTyCPol, Operands);
-    StringRef CStr(S.getPointer());
-    S = SMLoc::getFromPointer(&CStr.data()[CStr.find("scc")]);
-    Error(S, "scc is not supported on this GPU");
-    return false;
+    const uint64_t HasSCCInsts = SIInstrFlags::MUBUF | SIInstrFlags::MTBUF |
+                                 SIInstrFlags::MIMG | SIInstrFlags::FLAT;
----------------
arsenm wrote:
> jwanggit86 wrote:
> > arsenm wrote:
> > > SCCInsts isn't accurate. HasScalarCacheControl?
> > I thought SCC stands for System Cache Coherence. Anyway, SCC is not spelled out in this function, or anywhere else. A more accurate name for this tmp var is probably "AllowSCC" b/c the rhs is the flags representing 4 classes of instructions that allow SCC. Your thoughts?
> SCC is also a completely unrelated register so the whole thing is confusing 
How about "AllowSCCModifier"? That should make it clear that we are referring to the modifier, not the register.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D159239/new/

https://reviews.llvm.org/D159239



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