[PATCH] D159186: [AArch64][SME] Enable TPIDR2 lazy-save for za_preserved

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:7342
         DAG.getTargetLoweringInfo().getFrameIndexTy(DAG.getDataLayout()));
     SDValue BufferPtrAddr =
         DAG.getNode(ISD::ADD, DL, TPIDR2ObjAddr.getValueType(), TPIDR2ObjAddr,
----------------
Am I reading this wrong, or should this have been named `NumZaSaveSlicesAddr` ?


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:7767-7809
+  if (RequiresLazySave && !CalleeAttrs.preservesZA()) {
     // Unconditionally resume ZA.
     Result = DAG.getNode(
         AArch64ISD::SMSTART, DL, MVT::Other, Result,
         DAG.getTargetConstant((int32_t)(AArch64SVCR::SVCRZA), DL, MVT::i32),
         DAG.getConstant(0, DL, MVT::i64), DAG.getConstant(1, DL, MVT::i64));
 
----------------
Can you write this as:

  if (RequiresLazySave) {
    if (!CalleeAttrs.preservesZA()) {
      // code to restore ZA
    }
    Result = DAG.getNode(...aarch64_sme_set_tpidr2...);
  }


================
Comment at: llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.h:38
     ZA_Preserved = 1 << 5,  // aarch64_pstate_sm_preserved
+    ZA_NoLazySave = 1 << 6, // Don't emit TPI_DR2 lazy saves
     All = ZA_Preserved - 1
----------------
nit: maybe add a comment that we use this for SME ABI routines.


================
Comment at: llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.h:84
   }
+  bool hasNoLazySave() const { return Bitmask & ZA_NoLazySave; }
   bool requiresLazySave(const SMEAttrs &Callee) const {
----------------
nit: this interface seems redundant.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D159186/new/

https://reviews.llvm.org/D159186