[llvm] [RISCV] Lower constant build_vectors with few non-sign bits via ZSEXT (PR #65648)

[Philip Reames via llvm-commits]

preames wrote:

> I'm not sure what ZSEXT in the title is supposed to mean if we only consider SEXT?

I'd meant that to be VSEXT.  As in, the instruction.  Will fix the typo.


https://github.com/llvm/llvm-project/pull/65648