[PATCH] D159082: [ELF][RISCV] Implement --emit-relocs with relaxation

Fangrui Song via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 7 20:29:06 PDT 2023


MaskRay added inline comments.


================
Comment at: lld/ELF/InputSection.cpp:355
+  if (config->relax && !config->relocatable && config->emachine == EM_RISCV) {
+    // On RISC-V, relaxation might change relocations so we cannot simply copy
+    // from the input section.
----------------
jrtc27 wrote:
> Isn’t that true of other architectures though? TLS relaxations, GOT->PCREL relaxation, …
Perhaps Cause and Effect should not be used here. I.e. remove "so", and just state what we do.


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