[llvm] e643695 - [RISCV] Split VFWREDUSUM and VFWREDOSUM SchedWrite (#65386)

[via llvm-commits]

Author: Michael Maitland
Date: 2023-09-05T13:39:44-04:00
New Revision: e6436952e3567835add61355e17366ab62bccebd

URL: https://github.com/llvm/llvm-project/commit/e6436952e3567835add61355e17366ab62bccebd
DIFF: https://github.com/llvm/llvm-project/commit/e6436952e3567835add61355e17366ab62bccebd.diff

LOG: [RISCV] Split VFWREDUSUM and VFWREDOSUM SchedWrite (#65386)

WriteVFWRedOV_From and WriteVFWRedV_From SchedWrite classes exist
already, but no pseudos were using the ordered SchedWrite. This change
makes it so that the VFWREDOSUM pseudo used the ordered VFW SchedWrite.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
index cc9948908537a2..c3f2f1035bb747 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
@@ -3518,6 +3518,18 @@ multiclass VPseudoVFWRED_VS_RM {
   }
 }
 
+multiclass VPseudoVFWREDO_VS_RM {
+  foreach m = MxListFWRed in {
+    defvar mx = m.MX;
+    foreach e = SchedSEWSet<mx, isF=1, isWidening=1>.val in {
+      defm _VS
+          : VPseudoTernaryWithTailPolicyRoundingMode<V_M1.vrclass, m.vrclass,
+                                                     V_M1.vrclass, m, e>,
+            SchedReduction<"WriteVFWRedOV_From", "ReadVFWRedV", mx, e>;
+    }
+  }
+}
+
 multiclass VPseudoConversion<VReg RetClass,
                              VReg Op1Class,
                              LMULInfo MInfo,
@@ -6601,7 +6613,7 @@ let IsRVVWideningReduction = 1,
     hasSideEffects = 0,
     mayRaiseFPException = true in {
 defm PseudoVFWREDUSUM  : VPseudoVFWRED_VS_RM;
-defm PseudoVFWREDOSUM  : VPseudoVFWRED_VS_RM;
+defm PseudoVFWREDOSUM  : VPseudoVFWREDO_VS_RM;
 }
 
 } // Predicates = [HasVInstructionsAnyF]