[llvm] 41fd143 - [AArch64][GlobalISel] Fix || / && precedence warning in assert. NFC

[David Green via llvm-commits]

Author: David Green
Date: 2023-09-10T12:48:44+01:00
New Revision: 41fd1432441d3c6be19cd2b34e4dde8e0bce7929

URL: https://github.com/llvm/llvm-project/commit/41fd1432441d3c6be19cd2b34e4dde8e0bce7929
DIFF: https://github.com/llvm/llvm-project/commit/41fd1432441d3c6be19cd2b34e4dde8e0bce7929.diff

LOG: [AArch64][GlobalISel] Fix || / && precedence warning in assert. NFC

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index 3f55adef3e05ff9..94d0dbca838dedf 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -2653,7 +2653,7 @@ bool AArch64InstructionSelector::select(MachineInstr &I) {
       }
       }
 
-      assert(DefSize == 32 || DefSize == 64 && "Unexpected const def size");
+      assert((DefSize == 32 || DefSize == 64) && "Unexpected const def size");
       // Either emit a FMOV, or emit a copy to emit a normal mov.
       const Register DefGPRReg = MRI.createVirtualRegister(
           DefSize == 32 ? &AArch64::GPR32RegClass : &AArch64::GPR64RegClass);