[PATCH] D159267: [AArch64] Remove copy instruction between uaddlv and dup
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 5 01:16:18 PDT 2023
dmgreen added inline comments.
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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:5325
+ SDValue UADDLV =
+ DAG.getNode(AArch64ISD::UADDLV, dl, MVT::v4i32, Op.getOperand(1));
+ SDValue EXTRACT_VEC_ELT =
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An MVT::v8i16 with an extract might be a more natural representation for UADDLV that produces a h register.
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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:8716
ISD::INTRINSIC_WO_CHAIN, DL, MVT::i32,
DAG.getConstant(Intrinsic::aarch64_neon_uaddlv, DL, MVT::i32), CtPop);
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Can you change this to generate a UADDLV directly?
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Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.td:331
def SDT_AArch64DupLane : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisInt<2>]>;
+def SDT_AArch64UAddlv : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>]>;
def SDT_AArch64Insr : SDTypeProfile<1, 2, [SDTCisVec<0>]>;
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I think this can be the same as SDT_AArch64uaddlp
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D159267/new/
https://reviews.llvm.org/D159267
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