[PATCH] D159265: [AArch64] Remove copy instruction between uaddlv and urshr

Thu Sep 7 02:35:41 PDT 2023

jaykang10 added a comment.

Thanks for comment.

> Do we need to be concerned at all about big-endian here?  (Actually, also for D159267 <https://reviews.llvm.org/D159267>.)  This is basically bitcasting from `<2 x i32>` to `<1 x i64>`.

I am not sure... It would be fine because compiler adds the `rev` instructions where they are needed for big-endian... but it could be wrong...
If you are concerned about something for big-endian, please let me know.

> We might want to consider teaching DAGCombine to optimize this sequence to an ISD::BITCAST instead of pattern-matching it late.  Might unblock other optimizations?  Maybe there aren't really any other optimizations we can do on a uaddlv, though.

Let me try to detect the sequence and generate BITCAST with DAGCombine.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D159265/new/

https://reviews.llvm.org/D159265