[llvm] [RISCV] Add extract_subvector tests for a statically-known VLEN. NFC (PR #65389)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 5 10:32:43 PDT 2023
https://github.com/lukel97 created https://github.com/llvm/llvm-project/pull/65389:
This is partly a precommit for an upcoming patch, and partly to remove the fixed length LMUL restriction similarly to what was done in https://reviews.llvm.org/D158270, since it's no longer that relevant.
>From 9bba3ddfe0f551ab6590c1019cef1c563a962eb3 Mon Sep 17 00:00:00 2001
From: Luke Lau <luke at igalia.com>
Date: Tue, 5 Sep 2023 14:27:15 +0100
Subject: [PATCH] [RISCV] Add extract_subvector tests for a statically-known
VLEN. NFC
This is partly a precommit for an upcoming patch, and partly to remove the
fixed length LMUL restriction similarly to what was done in
https://reviews.llvm.org/D158270, since it's no longer that relevant.
---
.../rvv/fixed-vectors-extract-subvector.ll | 513 +++++++++---------
1 file changed, 265 insertions(+), 248 deletions(-)
diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
index ed84a97c804f6d4..92b052fcaab8394 100644
--- a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=riscv64 -mattr=+m,+v -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=2 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX2
-; RUN: llc -mtriple=riscv64 -mattr=+m,+v -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX1
+; RUN: llc -mtriple=riscv64 -mattr=+m,+v -riscv-v-vector-bits-min=128 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,UNKNOWNVLEN
+; RUN: llc -mtriple=riscv64 -mattr=+m,+v -riscv-v-vector-bits-min=128 -riscv-v-vector-bits-max=128 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,KNOWNVLEN
define void @extract_v2i8_v4i8_0(ptr %x, ptr %y) {
; CHECK-LABEL: extract_v2i8_v4i8_0:
@@ -62,22 +62,46 @@ define void @extract_v2i8_v8i8_6(ptr %x, ptr %y) {
ret void
}
+define void @extract_v1i32_v8i32_4(ptr %x, ptr %y) {
+; CHECK-LABEL: extract_v1i32_v8i32_4:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
+; CHECK-NEXT: vle32.v v8, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e32, m2, ta, ma
+; CHECK-NEXT: vslidedown.vi v8, v8, 4
+; CHECK-NEXT: vsetivli zero, 1, e32, mf2, ta, ma
+; CHECK-NEXT: vse32.v v8, (a1)
+; CHECK-NEXT: ret
+ %a = load <8 x i32>, ptr %x
+ %c = call <1 x i32> @llvm.vector.extract.v1i32.v8i32(<8 x i32> %a, i64 4)
+ store <1 x i32> %c, ptr %y
+ ret void
+}
+
+define void @extract_v1i32_v8i32_5(ptr %x, ptr %y) {
+; CHECK-LABEL: extract_v1i32_v8i32_5:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
+; CHECK-NEXT: vle32.v v8, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e32, m2, ta, ma
+; CHECK-NEXT: vslidedown.vi v8, v8, 5
+; CHECK-NEXT: vsetivli zero, 1, e32, mf2, ta, ma
+; CHECK-NEXT: vse32.v v8, (a1)
+; CHECK-NEXT: ret
+ %a = load <8 x i32>, ptr %x
+ %c = call <1 x i32> @llvm.vector.extract.v1i32.v8i32(<8 x i32> %a, i64 5)
+ store <1 x i32> %c, ptr %y
+ ret void
+}
+
define void @extract_v2i32_v8i32_0(ptr %x, ptr %y) {
-; LMULMAX2-LABEL: extract_v2i32_v8i32_0:
-; LMULMAX2: # %bb.0:
-; LMULMAX2-NEXT: vsetivli zero, 8, e32, m2, ta, ma
-; LMULMAX2-NEXT: vle32.v v8, (a0)
-; LMULMAX2-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
-; LMULMAX2-NEXT: vse32.v v8, (a1)
-; LMULMAX2-NEXT: ret
-;
-; LMULMAX1-LABEL: extract_v2i32_v8i32_0:
-; LMULMAX1: # %bb.0:
-; LMULMAX1-NEXT: vsetivli zero, 4, e32, m1, ta, ma
-; LMULMAX1-NEXT: vle32.v v8, (a0)
-; LMULMAX1-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
-; LMULMAX1-NEXT: vse32.v v8, (a1)
-; LMULMAX1-NEXT: ret
+; CHECK-LABEL: extract_v2i32_v8i32_0:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
+; CHECK-NEXT: vle32.v v8, (a0)
+; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
+; CHECK-NEXT: vse32.v v8, (a1)
+; CHECK-NEXT: ret
%a = load <8 x i32>, ptr %x
%c = call <2 x i32> @llvm.vector.extract.v2i32.v8i32(<8 x i32> %a, i64 0)
store <2 x i32> %c, ptr %y
@@ -85,52 +109,47 @@ define void @extract_v2i32_v8i32_0(ptr %x, ptr %y) {
}
define void @extract_v2i32_v8i32_2(ptr %x, ptr %y) {
-; LMULMAX2-LABEL: extract_v2i32_v8i32_2:
-; LMULMAX2: # %bb.0:
-; LMULMAX2-NEXT: vsetivli zero, 8, e32, m2, ta, ma
-; LMULMAX2-NEXT: vle32.v v8, (a0)
-; LMULMAX2-NEXT: vsetivli zero, 2, e32, m2, ta, ma
-; LMULMAX2-NEXT: vslidedown.vi v8, v8, 2
-; LMULMAX2-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
-; LMULMAX2-NEXT: vse32.v v8, (a1)
-; LMULMAX2-NEXT: ret
-;
-; LMULMAX1-LABEL: extract_v2i32_v8i32_2:
-; LMULMAX1: # %bb.0:
-; LMULMAX1-NEXT: vsetivli zero, 4, e32, m1, ta, ma
-; LMULMAX1-NEXT: vle32.v v8, (a0)
-; LMULMAX1-NEXT: vsetivli zero, 2, e32, m1, ta, ma
-; LMULMAX1-NEXT: vslidedown.vi v8, v8, 2
-; LMULMAX1-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
-; LMULMAX1-NEXT: vse32.v v8, (a1)
-; LMULMAX1-NEXT: ret
+; CHECK-LABEL: extract_v2i32_v8i32_2:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
+; CHECK-NEXT: vle32.v v8, (a0)
+; CHECK-NEXT: vsetivli zero, 2, e32, m2, ta, ma
+; CHECK-NEXT: vslidedown.vi v8, v8, 2
+; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
+; CHECK-NEXT: vse32.v v8, (a1)
+; CHECK-NEXT: ret
%a = load <8 x i32>, ptr %x
%c = call <2 x i32> @llvm.vector.extract.v2i32.v8i32(<8 x i32> %a, i64 2)
store <2 x i32> %c, ptr %y
ret void
}
+define void @extract_v2i32_v8i32_4(ptr %x, ptr %y) {
+; CHECK-LABEL: extract_v2i32_v8i32_4:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
+; CHECK-NEXT: vle32.v v8, (a0)
+; CHECK-NEXT: vsetivli zero, 2, e32, m2, ta, ma
+; CHECK-NEXT: vslidedown.vi v8, v8, 4
+; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
+; CHECK-NEXT: vse32.v v8, (a1)
+; CHECK-NEXT: ret
+ %a = load <8 x i32>, ptr %x
+ %c = call <2 x i32> @llvm.vector.extract.v2i32.v8i32(<8 x i32> %a, i64 4)
+ store <2 x i32> %c, ptr %y
+ ret void
+}
+
define void @extract_v2i32_v8i32_6(ptr %x, ptr %y) {
-; LMULMAX2-LABEL: extract_v2i32_v8i32_6:
-; LMULMAX2: # %bb.0:
-; LMULMAX2-NEXT: vsetivli zero, 8, e32, m2, ta, ma
-; LMULMAX2-NEXT: vle32.v v8, (a0)
-; LMULMAX2-NEXT: vsetivli zero, 2, e32, m2, ta, ma
-; LMULMAX2-NEXT: vslidedown.vi v8, v8, 6
-; LMULMAX2-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
-; LMULMAX2-NEXT: vse32.v v8, (a1)
-; LMULMAX2-NEXT: ret
-;
-; LMULMAX1-LABEL: extract_v2i32_v8i32_6:
-; LMULMAX1: # %bb.0:
-; LMULMAX1-NEXT: addi a0, a0, 16
-; LMULMAX1-NEXT: vsetivli zero, 4, e32, m1, ta, ma
-; LMULMAX1-NEXT: vle32.v v8, (a0)
-; LMULMAX1-NEXT: vsetivli zero, 2, e32, m1, ta, ma
-; LMULMAX1-NEXT: vslidedown.vi v8, v8, 2
-; LMULMAX1-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
-; LMULMAX1-NEXT: vse32.v v8, (a1)
-; LMULMAX1-NEXT: ret
+; CHECK-LABEL: extract_v2i32_v8i32_6:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
+; CHECK-NEXT: vle32.v v8, (a0)
+; CHECK-NEXT: vsetivli zero, 2, e32, m2, ta, ma
+; CHECK-NEXT: vslidedown.vi v8, v8, 6
+; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
+; CHECK-NEXT: vse32.v v8, (a1)
+; CHECK-NEXT: ret
%a = load <8 x i32>, ptr %x
%c = call <2 x i32> @llvm.vector.extract.v2i32.v8i32(<8 x i32> %a, i64 6)
store <2 x i32> %c, ptr %y
@@ -148,6 +167,33 @@ define void @extract_v2i32_nxv16i32_0(<vscale x 16 x i32> %x, ptr %y) {
ret void
}
+
+define void @extract_v2i32_nxv16i32_2(<vscale x 16 x i32> %x, ptr %y) {
+; CHECK-LABEL: extract_v2i32_nxv16i32_2:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e32, m8, ta, ma
+; CHECK-NEXT: vslidedown.vi v8, v8, 2
+; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
+; CHECK-NEXT: vse32.v v8, (a0)
+; CHECK-NEXT: ret
+ %c = call <2 x i32> @llvm.vector.extract.v2i32.nxv16i32(<vscale x 16 x i32> %x, i64 2)
+ store <2 x i32> %c, ptr %y
+ ret void
+}
+
+define void @extract_v2i32_nxv16i32_4(<vscale x 16 x i32> %x, ptr %y) {
+; CHECK-LABEL: extract_v2i32_nxv16i32_4:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e32, m8, ta, ma
+; CHECK-NEXT: vslidedown.vi v8, v8, 4
+; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
+; CHECK-NEXT: vse32.v v8, (a0)
+; CHECK-NEXT: ret
+ %c = call <2 x i32> @llvm.vector.extract.v2i32.nxv16i32(<vscale x 16 x i32> %x, i64 4)
+ store <2 x i32> %c, ptr %y
+ ret void
+}
+
define void @extract_v2i32_nxv16i32_6(<vscale x 16 x i32> %x, ptr %y) {
; CHECK-LABEL: extract_v2i32_nxv16i32_6:
; CHECK: # %bb.0:
@@ -161,6 +207,19 @@ define void @extract_v2i32_nxv16i32_6(<vscale x 16 x i32> %x, ptr %y) {
ret void
}
+define void @extract_v2i32_nxv16i32_8(<vscale x 16 x i32> %x, ptr %y) {
+; CHECK-LABEL: extract_v2i32_nxv16i32_8:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e32, m8, ta, ma
+; CHECK-NEXT: vslidedown.vi v8, v8, 8
+; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
+; CHECK-NEXT: vse32.v v8, (a0)
+; CHECK-NEXT: ret
+ %c = call <2 x i32> @llvm.vector.extract.v2i32.nxv16i32(<vscale x 16 x i32> %x, i64 8)
+ store <2 x i32> %c, ptr %y
+ ret void
+}
+
define void @extract_v2i8_nxv2i8_0(<vscale x 2 x i8> %x, ptr %y) {
; CHECK-LABEL: extract_v2i8_nxv2i8_0:
; CHECK: # %bb.0:
@@ -185,47 +244,54 @@ define void @extract_v2i8_nxv2i8_2(<vscale x 2 x i8> %x, ptr %y) {
ret void
}
+define void @extract_v2i8_nxv2i8_4(<vscale x 2 x i8> %x, ptr %y) {
+; CHECK-LABEL: extract_v2i8_nxv2i8_4:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e8, mf4, ta, ma
+; CHECK-NEXT: vslidedown.vi v8, v8, 4
+; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
+; CHECK-NEXT: vse8.v v8, (a0)
+; CHECK-NEXT: ret
+ %c = call <2 x i8> @llvm.vector.extract.v2i8.nxv2i8(<vscale x 2 x i8> %x, i64 4)
+ store <2 x i8> %c, ptr %y
+ ret void
+}
+
+define void @extract_v2i8_nxv2i8_6(<vscale x 2 x i8> %x, ptr %y) {
+; CHECK-LABEL: extract_v2i8_nxv2i8_6:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e8, mf4, ta, ma
+; CHECK-NEXT: vslidedown.vi v8, v8, 6
+; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
+; CHECK-NEXT: vse8.v v8, (a0)
+; CHECK-NEXT: ret
+ %c = call <2 x i8> @llvm.vector.extract.v2i8.nxv2i8(<vscale x 2 x i8> %x, i64 6)
+ store <2 x i8> %c, ptr %y
+ ret void
+}
+
define void @extract_v8i32_nxv16i32_8(<vscale x 16 x i32> %x, ptr %y) {
-; LMULMAX2-LABEL: extract_v8i32_nxv16i32_8:
-; LMULMAX2: # %bb.0:
-; LMULMAX2-NEXT: vsetivli zero, 8, e32, m8, ta, ma
-; LMULMAX2-NEXT: vslidedown.vi v8, v8, 8
-; LMULMAX2-NEXT: vsetivli zero, 8, e32, m2, ta, ma
-; LMULMAX2-NEXT: vse32.v v8, (a0)
-; LMULMAX2-NEXT: ret
-;
-; LMULMAX1-LABEL: extract_v8i32_nxv16i32_8:
-; LMULMAX1: # %bb.0:
-; LMULMAX1-NEXT: vsetivli zero, 4, e32, m8, ta, ma
-; LMULMAX1-NEXT: vslidedown.vi v16, v8, 8
-; LMULMAX1-NEXT: vslidedown.vi v8, v8, 12
-; LMULMAX1-NEXT: addi a1, a0, 16
-; LMULMAX1-NEXT: vsetivli zero, 4, e32, m1, ta, ma
-; LMULMAX1-NEXT: vse32.v v8, (a1)
-; LMULMAX1-NEXT: vse32.v v16, (a0)
-; LMULMAX1-NEXT: ret
+; CHECK-LABEL: extract_v8i32_nxv16i32_8:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e32, m8, ta, ma
+; CHECK-NEXT: vslidedown.vi v8, v8, 8
+; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
+; CHECK-NEXT: vse32.v v8, (a0)
+; CHECK-NEXT: ret
%c = call <8 x i32> @llvm.vector.extract.v8i32.nxv16i32(<vscale x 16 x i32> %x, i64 8)
store <8 x i32> %c, ptr %y
ret void
}
define void @extract_v8i1_v64i1_0(ptr %x, ptr %y) {
-; LMULMAX2-LABEL: extract_v8i1_v64i1_0:
-; LMULMAX2: # %bb.0:
-; LMULMAX2-NEXT: li a2, 32
-; LMULMAX2-NEXT: vsetvli zero, a2, e8, m2, ta, ma
-; LMULMAX2-NEXT: vlm.v v8, (a0)
-; LMULMAX2-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-; LMULMAX2-NEXT: vsm.v v8, (a1)
-; LMULMAX2-NEXT: ret
-;
-; LMULMAX1-LABEL: extract_v8i1_v64i1_0:
-; LMULMAX1: # %bb.0:
-; LMULMAX1-NEXT: vsetivli zero, 16, e8, m1, ta, ma
-; LMULMAX1-NEXT: vlm.v v8, (a0)
-; LMULMAX1-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-; LMULMAX1-NEXT: vsm.v v8, (a1)
-; LMULMAX1-NEXT: ret
+; CHECK-LABEL: extract_v8i1_v64i1_0:
+; CHECK: # %bb.0:
+; CHECK-NEXT: li a2, 64
+; CHECK-NEXT: vsetvli zero, a2, e8, m4, ta, ma
+; CHECK-NEXT: vlm.v v8, (a0)
+; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
+; CHECK-NEXT: vsm.v v8, (a1)
+; CHECK-NEXT: ret
%a = load <64 x i1>, ptr %x
%c = call <8 x i1> @llvm.vector.extract.v8i1.v64i1(<64 x i1> %a, i64 0)
store <8 x i1> %c, ptr %y
@@ -233,26 +299,16 @@ define void @extract_v8i1_v64i1_0(ptr %x, ptr %y) {
}
define void @extract_v8i1_v64i1_8(ptr %x, ptr %y) {
-; LMULMAX2-LABEL: extract_v8i1_v64i1_8:
-; LMULMAX2: # %bb.0:
-; LMULMAX2-NEXT: li a2, 32
-; LMULMAX2-NEXT: vsetvli zero, a2, e8, m2, ta, ma
-; LMULMAX2-NEXT: vlm.v v8, (a0)
-; LMULMAX2-NEXT: vsetivli zero, 1, e8, mf4, ta, ma
-; LMULMAX2-NEXT: vslidedown.vi v8, v8, 1
-; LMULMAX2-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-; LMULMAX2-NEXT: vsm.v v8, (a1)
-; LMULMAX2-NEXT: ret
-;
-; LMULMAX1-LABEL: extract_v8i1_v64i1_8:
-; LMULMAX1: # %bb.0:
-; LMULMAX1-NEXT: vsetivli zero, 16, e8, m1, ta, ma
-; LMULMAX1-NEXT: vlm.v v8, (a0)
-; LMULMAX1-NEXT: vsetivli zero, 1, e8, mf8, ta, ma
-; LMULMAX1-NEXT: vslidedown.vi v8, v8, 1
-; LMULMAX1-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-; LMULMAX1-NEXT: vsm.v v8, (a1)
-; LMULMAX1-NEXT: ret
+; CHECK-LABEL: extract_v8i1_v64i1_8:
+; CHECK: # %bb.0:
+; CHECK-NEXT: li a2, 64
+; CHECK-NEXT: vsetvli zero, a2, e8, m4, ta, ma
+; CHECK-NEXT: vlm.v v8, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, mf2, ta, ma
+; CHECK-NEXT: vslidedown.vi v8, v8, 1
+; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
+; CHECK-NEXT: vsm.v v8, (a1)
+; CHECK-NEXT: ret
%a = load <64 x i1>, ptr %x
%c = call <8 x i1> @llvm.vector.extract.v8i1.v64i1(<64 x i1> %a, i64 8)
store <8 x i1> %c, ptr %y
@@ -260,26 +316,16 @@ define void @extract_v8i1_v64i1_8(ptr %x, ptr %y) {
}
define void @extract_v8i1_v64i1_48(ptr %x, ptr %y) {
-; LMULMAX2-LABEL: extract_v8i1_v64i1_48:
-; LMULMAX2: # %bb.0:
-; LMULMAX2-NEXT: addi a0, a0, 4
-; LMULMAX2-NEXT: li a2, 32
-; LMULMAX2-NEXT: vsetvli zero, a2, e8, m2, ta, ma
-; LMULMAX2-NEXT: vlm.v v8, (a0)
-; LMULMAX2-NEXT: vsetivli zero, 1, e8, mf4, ta, ma
-; LMULMAX2-NEXT: vslidedown.vi v8, v8, 2
-; LMULMAX2-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-; LMULMAX2-NEXT: vsm.v v8, (a1)
-; LMULMAX2-NEXT: ret
-;
-; LMULMAX1-LABEL: extract_v8i1_v64i1_48:
-; LMULMAX1: # %bb.0:
-; LMULMAX1-NEXT: addi a0, a0, 6
-; LMULMAX1-NEXT: vsetivli zero, 16, e8, m1, ta, ma
-; LMULMAX1-NEXT: vlm.v v8, (a0)
-; LMULMAX1-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-; LMULMAX1-NEXT: vsm.v v8, (a1)
-; LMULMAX1-NEXT: ret
+; CHECK-LABEL: extract_v8i1_v64i1_48:
+; CHECK: # %bb.0:
+; CHECK-NEXT: li a2, 64
+; CHECK-NEXT: vsetvli zero, a2, e8, m4, ta, ma
+; CHECK-NEXT: vlm.v v8, (a0)
+; CHECK-NEXT: vsetivli zero, 1, e8, mf2, ta, ma
+; CHECK-NEXT: vslidedown.vi v8, v8, 6
+; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
+; CHECK-NEXT: vsm.v v8, (a1)
+; CHECK-NEXT: ret
%a = load <64 x i1>, ptr %x
%c = call <8 x i1> @llvm.vector.extract.v8i1.v64i1(<64 x i1> %a, i64 48)
store <8 x i1> %c, ptr %y
@@ -334,40 +380,49 @@ define void @extract_v8i1_nxv64i1_48(<vscale x 64 x i1> %x, ptr %y) {
ret void
}
+define void @extract_v8i1_nxv64i1_128(<vscale x 64 x i1> %x, ptr %y) {
+; CHECK-LABEL: extract_v8i1_nxv64i1_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vslidedown.vi v8, v0, 16
+; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
+; CHECK-NEXT: vsm.v v8, (a0)
+; CHECK-NEXT: ret
+ %c = call <8 x i1> @llvm.vector.extract.v8i1.nxv64i1(<vscale x 64 x i1> %x, i64 128)
+ store <8 x i1> %c, ptr %y
+ ret void
+}
+
+define void @extract_v8i1_nxv64i1_192(<vscale x 64 x i1> %x, ptr %y) {
+; CHECK-LABEL: extract_v8i1_nxv64i1_192:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
+; CHECK-NEXT: vslidedown.vi v8, v0, 24
+; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
+; CHECK-NEXT: vsm.v v8, (a0)
+; CHECK-NEXT: ret
+ %c = call <8 x i1> @llvm.vector.extract.v8i1.nxv64i1(<vscale x 64 x i1> %x, i64 192)
+ store <8 x i1> %c, ptr %y
+ ret void
+}
define void @extract_v2i1_v64i1_0(ptr %x, ptr %y) {
-; LMULMAX2-LABEL: extract_v2i1_v64i1_0:
-; LMULMAX2: # %bb.0:
-; LMULMAX2-NEXT: li a2, 32
-; LMULMAX2-NEXT: vsetvli zero, a2, e8, m2, ta, ma
-; LMULMAX2-NEXT: vlm.v v0, (a0)
-; LMULMAX2-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
-; LMULMAX2-NEXT: vmv.v.i v8, 0
-; LMULMAX2-NEXT: vmerge.vim v8, v8, 1, v0
-; LMULMAX2-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-; LMULMAX2-NEXT: vmv.v.i v9, 0
-; LMULMAX2-NEXT: vsetivli zero, 2, e8, mf2, tu, ma
-; LMULMAX2-NEXT: vmv.v.v v9, v8
-; LMULMAX2-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-; LMULMAX2-NEXT: vmsne.vi v8, v9, 0
-; LMULMAX2-NEXT: vsm.v v8, (a1)
-; LMULMAX2-NEXT: ret
-;
-; LMULMAX1-LABEL: extract_v2i1_v64i1_0:
-; LMULMAX1: # %bb.0:
-; LMULMAX1-NEXT: vsetivli zero, 16, e8, m1, ta, ma
-; LMULMAX1-NEXT: vlm.v v0, (a0)
-; LMULMAX1-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
-; LMULMAX1-NEXT: vmv.v.i v8, 0
-; LMULMAX1-NEXT: vmerge.vim v8, v8, 1, v0
-; LMULMAX1-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-; LMULMAX1-NEXT: vmv.v.i v9, 0
-; LMULMAX1-NEXT: vsetivli zero, 2, e8, mf2, tu, ma
-; LMULMAX1-NEXT: vmv.v.v v9, v8
-; LMULMAX1-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-; LMULMAX1-NEXT: vmsne.vi v8, v9, 0
-; LMULMAX1-NEXT: vsm.v v8, (a1)
-; LMULMAX1-NEXT: ret
+; CHECK-LABEL: extract_v2i1_v64i1_0:
+; CHECK: # %bb.0:
+; CHECK-NEXT: li a2, 64
+; CHECK-NEXT: vsetvli zero, a2, e8, m4, ta, ma
+; CHECK-NEXT: vlm.v v0, (a0)
+; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
+; CHECK-NEXT: vmv.v.i v8, 0
+; CHECK-NEXT: vmerge.vim v8, v8, 1, v0
+; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
+; CHECK-NEXT: vmv.v.i v9, 0
+; CHECK-NEXT: vsetivli zero, 2, e8, mf2, tu, ma
+; CHECK-NEXT: vmv.v.v v9, v8
+; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
+; CHECK-NEXT: vmsne.vi v8, v9, 0
+; CHECK-NEXT: vsm.v v8, (a1)
+; CHECK-NEXT: ret
%a = load <64 x i1>, ptr %x
%c = call <2 x i1> @llvm.vector.extract.v2i1.v64i1(<64 x i1> %a, i64 0)
store <2 x i1> %c, ptr %y
@@ -375,48 +430,27 @@ define void @extract_v2i1_v64i1_0(ptr %x, ptr %y) {
}
define void @extract_v2i1_v64i1_2(ptr %x, ptr %y) {
-; LMULMAX2-LABEL: extract_v2i1_v64i1_2:
-; LMULMAX2: # %bb.0:
-; LMULMAX2-NEXT: li a2, 32
-; LMULMAX2-NEXT: vsetvli zero, a2, e8, m2, ta, ma
-; LMULMAX2-NEXT: vlm.v v0, (a0)
-; LMULMAX2-NEXT: vmv.v.i v8, 0
-; LMULMAX2-NEXT: vmerge.vim v8, v8, 1, v0
-; LMULMAX2-NEXT: vsetivli zero, 2, e8, m2, ta, ma
-; LMULMAX2-NEXT: vslidedown.vi v8, v8, 2
-; LMULMAX2-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
-; LMULMAX2-NEXT: vmsne.vi v0, v8, 0
-; LMULMAX2-NEXT: vmv.v.i v8, 0
-; LMULMAX2-NEXT: vmerge.vim v8, v8, 1, v0
-; LMULMAX2-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-; LMULMAX2-NEXT: vmv.v.i v9, 0
-; LMULMAX2-NEXT: vsetivli zero, 2, e8, mf2, tu, ma
-; LMULMAX2-NEXT: vmv.v.v v9, v8
-; LMULMAX2-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-; LMULMAX2-NEXT: vmsne.vi v8, v9, 0
-; LMULMAX2-NEXT: vsm.v v8, (a1)
-; LMULMAX2-NEXT: ret
-;
-; LMULMAX1-LABEL: extract_v2i1_v64i1_2:
-; LMULMAX1: # %bb.0:
-; LMULMAX1-NEXT: vsetivli zero, 16, e8, m1, ta, ma
-; LMULMAX1-NEXT: vlm.v v0, (a0)
-; LMULMAX1-NEXT: vmv.v.i v8, 0
-; LMULMAX1-NEXT: vmerge.vim v8, v8, 1, v0
-; LMULMAX1-NEXT: vsetivli zero, 2, e8, m1, ta, ma
-; LMULMAX1-NEXT: vslidedown.vi v8, v8, 2
-; LMULMAX1-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
-; LMULMAX1-NEXT: vmsne.vi v0, v8, 0
-; LMULMAX1-NEXT: vmv.v.i v8, 0
-; LMULMAX1-NEXT: vmerge.vim v8, v8, 1, v0
-; LMULMAX1-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-; LMULMAX1-NEXT: vmv.v.i v9, 0
-; LMULMAX1-NEXT: vsetivli zero, 2, e8, mf2, tu, ma
-; LMULMAX1-NEXT: vmv.v.v v9, v8
-; LMULMAX1-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-; LMULMAX1-NEXT: vmsne.vi v8, v9, 0
-; LMULMAX1-NEXT: vsm.v v8, (a1)
-; LMULMAX1-NEXT: ret
+; CHECK-LABEL: extract_v2i1_v64i1_2:
+; CHECK: # %bb.0:
+; CHECK-NEXT: li a2, 64
+; CHECK-NEXT: vsetvli zero, a2, e8, m4, ta, ma
+; CHECK-NEXT: vlm.v v0, (a0)
+; CHECK-NEXT: vmv.v.i v8, 0
+; CHECK-NEXT: vmerge.vim v8, v8, 1, v0
+; CHECK-NEXT: vsetivli zero, 2, e8, m4, ta, ma
+; CHECK-NEXT: vslidedown.vi v8, v8, 2
+; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
+; CHECK-NEXT: vmsne.vi v0, v8, 0
+; CHECK-NEXT: vmv.v.i v8, 0
+; CHECK-NEXT: vmerge.vim v8, v8, 1, v0
+; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
+; CHECK-NEXT: vmv.v.i v9, 0
+; CHECK-NEXT: vsetivli zero, 2, e8, mf2, tu, ma
+; CHECK-NEXT: vmv.v.v v9, v8
+; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
+; CHECK-NEXT: vmsne.vi v8, v9, 0
+; CHECK-NEXT: vsm.v v8, (a1)
+; CHECK-NEXT: ret
%a = load <64 x i1>, ptr %x
%c = call <2 x i1> @llvm.vector.extract.v2i1.v64i1(<64 x i1> %a, i64 2)
store <2 x i1> %c, ptr %y
@@ -424,50 +458,28 @@ define void @extract_v2i1_v64i1_2(ptr %x, ptr %y) {
}
define void @extract_v2i1_v64i1_42(ptr %x, ptr %y) {
-; LMULMAX2-LABEL: extract_v2i1_v64i1_42:
-; LMULMAX2: # %bb.0:
-; LMULMAX2-NEXT: addi a0, a0, 4
-; LMULMAX2-NEXT: li a2, 32
-; LMULMAX2-NEXT: vsetvli zero, a2, e8, m2, ta, ma
-; LMULMAX2-NEXT: vlm.v v0, (a0)
-; LMULMAX2-NEXT: vmv.v.i v8, 0
-; LMULMAX2-NEXT: vmerge.vim v8, v8, 1, v0
-; LMULMAX2-NEXT: vsetivli zero, 2, e8, m2, ta, ma
-; LMULMAX2-NEXT: vslidedown.vi v8, v8, 10
-; LMULMAX2-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
-; LMULMAX2-NEXT: vmsne.vi v0, v8, 0
-; LMULMAX2-NEXT: vmv.v.i v8, 0
-; LMULMAX2-NEXT: vmerge.vim v8, v8, 1, v0
-; LMULMAX2-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-; LMULMAX2-NEXT: vmv.v.i v9, 0
-; LMULMAX2-NEXT: vsetivli zero, 2, e8, mf2, tu, ma
-; LMULMAX2-NEXT: vmv.v.v v9, v8
-; LMULMAX2-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-; LMULMAX2-NEXT: vmsne.vi v8, v9, 0
-; LMULMAX2-NEXT: vsm.v v8, (a1)
-; LMULMAX2-NEXT: ret
-;
-; LMULMAX1-LABEL: extract_v2i1_v64i1_42:
-; LMULMAX1: # %bb.0:
-; LMULMAX1-NEXT: addi a0, a0, 4
-; LMULMAX1-NEXT: vsetivli zero, 16, e8, m1, ta, ma
-; LMULMAX1-NEXT: vlm.v v0, (a0)
-; LMULMAX1-NEXT: vmv.v.i v8, 0
-; LMULMAX1-NEXT: vmerge.vim v8, v8, 1, v0
-; LMULMAX1-NEXT: vsetivli zero, 2, e8, m1, ta, ma
-; LMULMAX1-NEXT: vslidedown.vi v8, v8, 10
-; LMULMAX1-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
-; LMULMAX1-NEXT: vmsne.vi v0, v8, 0
-; LMULMAX1-NEXT: vmv.v.i v8, 0
-; LMULMAX1-NEXT: vmerge.vim v8, v8, 1, v0
-; LMULMAX1-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-; LMULMAX1-NEXT: vmv.v.i v9, 0
-; LMULMAX1-NEXT: vsetivli zero, 2, e8, mf2, tu, ma
-; LMULMAX1-NEXT: vmv.v.v v9, v8
-; LMULMAX1-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-; LMULMAX1-NEXT: vmsne.vi v8, v9, 0
-; LMULMAX1-NEXT: vsm.v v8, (a1)
-; LMULMAX1-NEXT: ret
+; CHECK-LABEL: extract_v2i1_v64i1_42:
+; CHECK: # %bb.0:
+; CHECK-NEXT: li a2, 64
+; CHECK-NEXT: vsetvli zero, a2, e8, m4, ta, ma
+; CHECK-NEXT: vlm.v v0, (a0)
+; CHECK-NEXT: vmv.v.i v8, 0
+; CHECK-NEXT: vmerge.vim v8, v8, 1, v0
+; CHECK-NEXT: li a0, 42
+; CHECK-NEXT: vsetivli zero, 2, e8, m4, ta, ma
+; CHECK-NEXT: vslidedown.vx v8, v8, a0
+; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
+; CHECK-NEXT: vmsne.vi v0, v8, 0
+; CHECK-NEXT: vmv.v.i v8, 0
+; CHECK-NEXT: vmerge.vim v8, v8, 1, v0
+; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
+; CHECK-NEXT: vmv.v.i v9, 0
+; CHECK-NEXT: vsetivli zero, 2, e8, mf2, tu, ma
+; CHECK-NEXT: vmv.v.v v9, v8
+; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
+; CHECK-NEXT: vmsne.vi v8, v9, 0
+; CHECK-NEXT: vsm.v v8, (a1)
+; CHECK-NEXT: ret
%a = load <64 x i1>, ptr %x
%c = call <2 x i1> @llvm.vector.extract.v2i1.v64i1(<64 x i1> %a, i64 42)
store <2 x i1> %c, ptr %y
@@ -640,9 +652,14 @@ declare <8 x i1> @llvm.vector.extract.v8i1.nxv64i1(<vscale x 64 x i1> %vec, i64
declare <2 x i8> @llvm.vector.extract.v2i8.v4i8(<4 x i8> %vec, i64 %idx)
declare <2 x i8> @llvm.vector.extract.v2i8.v8i8(<8 x i8> %vec, i64 %idx)
+
+declare <1 x i32> @llvm.vector.extract.v1i32.v8i32(<8 x i32> %vec, i64 %idx)
declare <2 x i32> @llvm.vector.extract.v2i32.v8i32(<8 x i32> %vec, i64 %idx)
declare <2 x i8> @llvm.vector.extract.v2i8.nxv2i8(<vscale x 2 x i8> %vec, i64 %idx)
declare <2 x i32> @llvm.vector.extract.v2i32.nxv16i32(<vscale x 16 x i32> %vec, i64 %idx)
declare <8 x i32> @llvm.vector.extract.v8i32.nxv16i32(<vscale x 16 x i32> %vec, i64 %idx)
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; KNOWNVLEN: {{.*}}
+; UNKNOWNVLEN: {{.*}}
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