[llvm] 8a58407 - [X86][EVEX512] Restrict attaching EVEX512 for default CPU only, NFCI (#65920)

[via llvm-commits]

Author: Phoebe Wang
Date: 2023-09-11T12:49:35+08:00
New Revision: 8a584079de31497e0126179052cf5427b189bf60

URL: https://github.com/llvm/llvm-project/commit/8a584079de31497e0126179052cf5427b189bf60
DIFF: https://github.com/llvm/llvm-project/commit/8a584079de31497e0126179052cf5427b189bf60.diff

LOG: [X86][EVEX512] Restrict attaching EVEX512 for default CPU only, NFCI (#65920)

Attaching EVEX512 is used to provide backward compatibility for legacy
LLVM IR files, which didn't set EVEX512 feature explicitly.

AVX512 and AVX10 targets have set or unset EVEX512 properly through
X86.td.

However, it's not feasible to list all AVX512 and AVX10 targets or their
complementary set here to skip/restrict such code.

Instead, we can restrict it for default CPU only. "generic" is used when
"target-cpu" is not specified in IR, while "pentium4" and "x86-64" is
the default CPU if "-march" is not specified in Clang for 32-bit and
64-bit targets respectively.

This patch is no functional change intended, though it might affect
scenarios like "-march=broadwell -mavx512bw", which looks like a misuse
of "-march" and can be solved by changing to "-mtune=broadwell
-mavx512bw".

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86Subtarget.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86Subtarget.cpp b/llvm/lib/Target/X86/X86Subtarget.cpp
index 88e9c3a705191b..e16e39b2a7666e 100644
--- a/llvm/lib/Target/X86/X86Subtarget.cpp
+++ b/llvm/lib/Target/X86/X86Subtarget.cpp
@@ -268,18 +268,23 @@ void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef TuneCPU,
   if (!FS.empty())
     FullFS = (Twine(FullFS) + "," + FS).str();
 
-  // Attach EVEX512 feature when we have AVX512 features and EVEX512 is not set.
-  size_t posNoEVEX512 = FS.rfind("-evex512");
-  // Make sure we won't be cheated by "-avx512fp16".
-  size_t posNoAVX512F = FS.endswith("-avx512f") ? FS.size() - 8
-                                                : FS.rfind("-avx512f,");
-  size_t posEVEX512 = FS.rfind("+evex512");
-  size_t posAVX512F = FS.rfind("+avx512"); // Any AVX512XXX will enable AVX512F.
-
-  if (posAVX512F != StringRef::npos &&
-      (posNoAVX512F == StringRef::npos || posNoAVX512F < posAVX512F))
-    if (posEVEX512 == StringRef::npos && posNoEVEX512 == StringRef::npos)
-      FullFS += ",+evex512";
+  // Attach EVEX512 feature when we have AVX512 features with a default CPU.
+  // "pentium4" is default CPU for 32-bit targets.
+  // "x86-64" is default CPU for 64-bit targets.
+  if (CPU == "generic" || CPU == "pentium4" || CPU == "x86-64") {
+    size_t posNoEVEX512 = FS.rfind("-evex512");
+    // Make sure we won't be cheated by "-avx512fp16".
+    size_t posNoAVX512F = FS.endswith("-avx512f") ? FS.size() - 8
+                                                  : FS.rfind("-avx512f,");
+    size_t posEVEX512 = FS.rfind("+evex512");
+    // Any AVX512XXX will enable AVX512F.
+    size_t posAVX512F = FS.rfind("+avx512");
+
+    if (posAVX512F != StringRef::npos &&
+        (posNoAVX512F == StringRef::npos || posNoAVX512F < posAVX512F))
+      if (posEVEX512 == StringRef::npos && posNoEVEX512 == StringRef::npos)
+        FullFS += ",+evex512";
+  }
 
   // Parse features string and set the CPU.
   ParseSubtargetFeatures(CPU, TuneCPU, FullFS);