[llvm] [RISCV] Extract subregister if VLEN is known when lowering extract_subvector (PR #65392)

[Philip Reames via llvm-commits]

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@@ -152,6 +152,11 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo {
     unsigned VLen = getMaxRVVVectorSizeInBits();
     return VLen == 0 ? 65536 : VLen;
   }
+  std::optional<unsigned> getRealKnownVLen() const {
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preames wrote:

I'd suggest: getExactVLen().  

https://github.com/llvm/llvm-project/pull/65392