[llvm] [InstCombine][RISCV] Convert VPIntrinsics with splat operands to splats (PR #65706)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 7 21:24:11 PDT 2023


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@@ -0,0 +1,896 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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topperc wrote:

It's generally encouraged to run both like that. There are definitely some CodeGen tests that do it, but not many.

Do you have a particular concern?

Scalarizing i64 vectors on rv32 will require 2 scalar instructions, possibly more depending on the operation.

i8/i16 shifts, div, and rem will be more instructions to sign extend or zero extend the inputs.

I think we can have f16 vector without having scalar f16 arithmetic so that would generate more code to convert to f32 and back. Maybe the backend should use VL=1 vectors in that case?

https://github.com/llvm/llvm-project/pull/65706


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