[PATCH] D159203: [InstCombine] Fold (A/-B)==(A/B) to (A/B)==0
Marc Auberer via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 8 15:10:21 PDT 2023
marcauberer updated this revision to Diff 556307.
marcauberer added a comment.
Use computeKnownBits instead of isKnownNonEqual
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D159203/new/
https://reviews.llvm.org/D159203
Files:
llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
llvm/test/Transforms/InstCombine/icmp-sdiv-sdiv.ll
Index: llvm/test/Transforms/InstCombine/icmp-sdiv-sdiv.ll
===================================================================
--- llvm/test/Transforms/InstCombine/icmp-sdiv-sdiv.ll
+++ llvm/test/Transforms/InstCombine/icmp-sdiv-sdiv.ll
@@ -9,10 +9,8 @@
; CHECK-LABEL: @icmp_sdiv_sdiv_normal_i8(
; CHECK-NEXT: [[PRECOND:%.*]] = icmp eq i8 [[C:%.*]], 12
; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
-; CHECK-NEXT: [[NEGC:%.*]] = sub nsw i8 0, [[C]]
-; CHECK-NEXT: [[D1:%.*]] = sdiv i8 [[X:%.*]], [[NEGC]]
-; CHECK-NEXT: [[D2:%.*]] = sdiv i8 [[X]], [[C]]
-; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[D1]], [[D2]]
+; CHECK-NEXT: [[D2:%.*]] = sdiv i8 [[X:%.*]], [[C]]
+; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[D2]], 0
; CHECK-NEXT: ret i1 [[C]]
;
%precond = icmp eq i8 %C, 12
@@ -28,10 +26,8 @@
; CHECK-LABEL: @icmp_sdiv_sdiv_normal_i64(
; CHECK-NEXT: [[PRECOND:%.*]] = icmp eq i64 [[C:%.*]], -9223372036854775807
; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
-; CHECK-NEXT: [[NEGC:%.*]] = sub nsw i64 0, [[C]]
-; CHECK-NEXT: [[D1:%.*]] = sdiv i64 [[X:%.*]], [[NEGC]]
-; CHECK-NEXT: [[D2:%.*]] = sdiv i64 [[X]], [[C]]
-; CHECK-NEXT: [[C:%.*]] = icmp eq i64 [[D1]], [[D2]]
+; CHECK-NEXT: [[D2:%.*]] = sdiv i64 [[X:%.*]], [[C]]
+; CHECK-NEXT: [[C:%.*]] = icmp eq i64 [[D2]], 0
; CHECK-NEXT: ret i1 [[C]]
;
%precond = icmp eq i64 %C, -9223372036854775807 ; off by one
@@ -47,10 +43,8 @@
; CHECK-LABEL: @icmp_sdiv_sdiv_normal_ne(
; CHECK-NEXT: [[PRECOND:%.*]] = icmp eq i6 [[C:%.*]], 4
; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
-; CHECK-NEXT: [[NEGC:%.*]] = sub nsw i6 0, [[C]]
-; CHECK-NEXT: [[D1:%.*]] = sdiv i6 [[X:%.*]], [[NEGC]]
-; CHECK-NEXT: [[D2:%.*]] = sdiv i6 [[X]], [[C]]
-; CHECK-NEXT: [[C:%.*]] = icmp ne i6 [[D1]], [[D2]]
+; CHECK-NEXT: [[D2:%.*]] = sdiv i6 [[X:%.*]], [[C]]
+; CHECK-NEXT: [[C:%.*]] = icmp ne i6 [[D2]], 0
; CHECK-NEXT: ret i1 [[C]]
;
%precond = icmp eq i6 %C, 4
Index: llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
===================================================================
--- llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -5160,6 +5160,20 @@
return new ICmpInst(Pred, OtherVal, Constant::getNullValue(A->getType()));
}
+ // ((A / -B) == (A / B)) -> ((A / B) == 0)
+ // if known A != INT_MIN or B != INT_MIN
+ {
+ if (match(Op0, m_OneUse(m_SDiv(m_Value(A), m_OneUse(m_Neg(m_Value(B)))))) &&
+ match(Op1, m_SDiv(m_Specific(A), m_Specific(B)))) {
+ // Check if A is known to be != INT_MIN
+ if (!computeKnownBits(A, 0, &I).getSignedMinValue().isMinSignedValue())
+ return new ICmpInst(Pred, Op1, Constant::getNullValue(A->getType()));
+ // Check if B is known to be != INT_MIN
+ if (!computeKnownBits(B, 0, &I).getSignedMinValue().isMinSignedValue())
+ return new ICmpInst(Pred, Op1, Constant::getNullValue(A->getType()));
+ }
+ }
+
// (X&Z) == (Y&Z) -> (X^Y) & Z == 0
if (match(Op0, m_OneUse(m_And(m_Value(A), m_Value(B)))) &&
match(Op1, m_OneUse(m_And(m_Value(C), m_Value(D))))) {
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