[llvm] [AMDGPU] Improve selection into lshl_or (PR #65794)

[Matt Arsenault via llvm-commits]

arsenm wrote:

You definitely can't just state registers are 16 bit, they are 32-bit and just support 16 bit operations. It's sort of true on gfx11 only 

https://github.com/llvm/llvm-project/pull/65794