[llvm] [RISCV] Extract subregister if VLEN is known when lowering extract_subvector (PR #65392)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 5 12:54:48 PDT 2023
================
@@ -8653,36 +8656,68 @@ SDValue RISCVTargetLowering::lowerEXTRACT_SUBVECTOR(SDValue Op,
return DAG.getBitcast(Op.getValueType(), Slidedown);
}
+ if (VecVT.isFixedLengthVector()) {
+ VecVT = getContainerForFixedLengthVector(VecVT);
+ Vec = convertToScalableVector(VecVT, Vec, DAG, Subtarget);
+ }
+
+ // The semantics of extract_subvector are that if the extracted subvector is
+ // scalable, then the index is scaled by vscale. So if we have a fixed length
+ // subvector, we need to factor that in before we decompose it to
+ // subregisters...
+ MVT ContainerSubVecVT = SubVecVT;
+ unsigned EffectiveIdx = OrigIdx;
+ unsigned Vscale = *KnownVLen / RISCV::RVVBitsPerBlock;
+ if (SubVecVT.isFixedLengthVector()) {
+ assert(KnownVLen);
----------------
topperc wrote:
This assert isn't needed. `KnownVLen` was already accessed on line 8670.
https://github.com/llvm/llvm-project/pull/65392
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