[PATCH] D158396: [RISCV] Add missed fcsr spill and restore in interrupt
Alex Bradbury via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 5 03:58:55 PDT 2023
asb added a comment.
Relevant context would be this clarification to the riscv-c-api-doc <https://github.com/riscv-non-isa/riscv-c-api-doc/pull/42>. It doesn't look like anyone has given much thought to vectors so far.
I need to take a look at the patch with the alternate approach, but so I don't forget it: this patch needs to be extended to handle the zfinx case as well (with appropriate test too of course).
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D158396/new/
https://reviews.llvm.org/D158396
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