[PATCH] D159239: [AMDGPU] Incorrect error message regarding SCC modifier

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp:4483
   if (isGFX90A() && !isGFX940() && (CPol & CPol::SCC)) {
-    SMLoc S = getImmLoc(AMDGPUOperand::ImmTyCPol, Operands);
-    StringRef CStr(S.getPointer());
-    S = SMLoc::getFromPointer(&CStr.data()[CStr.find("scc")]);
-    Error(S, "scc is not supported on this GPU");
-    return false;
+    const uint64_t HasSCCInsts = SIInstrFlags::MUBUF | SIInstrFlags::MTBUF |
+                                 SIInstrFlags::MIMG | SIInstrFlags::FLAT;
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jwanggit86 wrote:
> arsenm wrote:
> > SCCInsts isn't accurate. HasScalarCacheControl?
> I thought SCC stands for System Cache Coherence. Anyway, SCC is not spelled out in this function, or anywhere else. A more accurate name for this tmp var is probably "AllowSCC" b/c the rhs is the flags representing 4 classes of instructions that allow SCC. Your thoughts?
SCC is also a completely unrelated register so the whole thing is confusing 


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D159239/new/

https://reviews.llvm.org/D159239