[llvm] [NVPTX] Make i16x2 a native type and add supported vec instructions (PR #65432)

[Artem Belevich via llvm-commits]

Artem-B wrote:

Another theory is that the bitcast in the tests didn't actually make it to the lowering and we only had to deal with loads/stores. 
https://godbolt.org/z/81e31jj8a
nvptx-isel appears to convert IR straight into
```
# *** IR Dump After NVPTX DAG->DAG Pattern Instruction Selection (nvptx-isel) ***:
# Machine code for function test_bitcast_2xhalf_to_2xi16: IsSSA, TracksLiveness

bb.0 (%ir-block.0):
  %0:int32regs = LD_i32_avar 0, 4, 1, 0, 32, &test_bitcast_2xhalf_to_2xi16_param_0 :: (dereferenceable invariant load (s32) from `ptr addrspace(101) null`, addrspace 101)
  StoreRetvalI32 killed %0:int32regs, 0 :: (store (s32), align 1)
  Return
```

We may need something more elaborate, like manually constructing v2i16 from an input i16.

https://github.com/llvm/llvm-project/pull/65432