[llvm] 59cbee4 - [GlobalISel] Fix an incorrect ptradd reassoc test. NFC.

[Amara Emerson via llvm-commits]

Author: Amara Emerson
Date: 2023-09-04T00:28:56-07:00
New Revision: 59cbee45995ef5d93778867e3ccd7598cb6cccb7

URL: https://github.com/llvm/llvm-project/commit/59cbee45995ef5d93778867e3ccd7598cb6cccb7
DIFF: https://github.com/llvm/llvm-project/commit/59cbee45995ef5d93778867e3ccd7598cb6cccb7.diff

LOG: [GlobalISel] Fix an incorrect ptradd reassoc test. NFC.

The lookthrough int<->ptr cast tests and code were both wrongly checking the wrong
register uses. This change is fixing and precommiting the test to prepare for
the code fix.

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/GlobalISel/combine-ptradd-reassociation.mir

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/combine-ptradd-reassociation.mir b/llvm/test/CodeGen/AArch64/GlobalISel/combine-ptradd-reassociation.mir
index 3b167f321ac356..6d8baecd967448 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/combine-ptradd-reassociation.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/combine-ptradd-reassociation.mir
@@ -1,5 +1,7 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s
+# RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown --aarch64prelegalizercombiner-only-enable-rule="reassoc_ptradd" %s -o - | FileCheck %s
+# REQUIRES: asserts
+
 ---
 name:            test1_noreassoc_legal_already_new_is_illegal
 alignment:       4
@@ -175,9 +177,10 @@ body:             |
     ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 6
     ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
     ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
-    ; CHECK-NEXT: %ptr_to_int:_(s64) = G_PTRTOINT [[PTR_ADD]](p0)
     ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C1]](s64)
-    ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p0) :: (load (s32))
+    ; CHECK-NEXT: %ptr_to_int:_(s64) = G_PTRTOINT [[PTR_ADD1]](p0)
+    ; CHECK-NEXT: %int_to_ptr:_(p0) = G_INTTOPTR %ptr_to_int(s64)
+    ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD %int_to_ptr(p0) :: (load (s32))
     ; CHECK-NEXT: G_STORE [[C2]](s32), [[PTR_ADD]](p0) :: (store (s32))
     ; CHECK-NEXT: G_STORE %ptr_to_int(s64), [[PTR_ADD]](p0) :: (store (s64))
     ; CHECK-NEXT: $w0 = COPY [[LOAD]](s32)
@@ -187,9 +190,10 @@ body:             |
     %4:_(s64) = G_CONSTANT i64 6
     %9:_(s32) = G_CONSTANT i32 0
     %10:_(p0) = G_PTR_ADD %0, %2(s64)
-    %ptr_to_int:_(s64) = G_PTRTOINT %10
     %11:_(p0) = G_PTR_ADD %10, %4(s64)
-    %7:_(s32) = G_LOAD %11(p0) :: (load 4)
+    %ptr_to_int:_(s64) = G_PTRTOINT %11
+    %int_to_ptr:_(p0) = G_INTTOPTR %ptr_to_int
+    %7:_(s32) = G_LOAD %int_to_ptr(p0) :: (load 4)
     G_STORE %9(s32), %10(p0) :: (store 4) ; other use of %10
     G_STORE %ptr_to_int(s64), %10(p0) :: (store 8)
     $w0 = COPY %7(s32)