[llvm] 0a4a8be - [PowerPC] Turn string pooling on by default. (#65628)
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Thu Sep 7 13:49:36 PDT 2023
Author: stefanp-ibm
Date: 2023-09-07T16:49:31-04:00
New Revision: 0a4a8bec34e970a45d61775329293a2f562f521f
URL: https://github.com/llvm/llvm-project/commit/0a4a8bec34e970a45d61775329293a2f562f521f
DIFF: https://github.com/llvm/llvm-project/commit/0a4a8bec34e970a45d61775329293a2f562f521f.diff
LOG: [PowerPC] Turn string pooling on by default. (#65628)
This patch turns the string pooling pass on by default. Some tests are
updated as required.
Added:
Modified:
llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
llvm/test/CodeGen/PowerPC/O3-pipeline.ll
llvm/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
llvm/test/CodeGen/PowerPC/licm-remat.ll
llvm/test/CodeGen/PowerPC/mergeable-string-pool-large.ll
llvm/test/CodeGen/PowerPC/mergeable-string-pool.ll
llvm/test/CodeGen/PowerPC/toc-load-sched-bug.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
index 52bbfeaad1b5289..eaef4bf467c0587 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -103,7 +103,7 @@ static cl::opt<bool>
static cl::opt<bool> MergeStringPool(
"ppc-merge-string-pool",
cl::desc("Merge all of the strings in a module into one pool"),
- cl::init(false), cl::Hidden);
+ cl::init(true), cl::Hidden);
static cl::opt<bool> EnablePPCGenScalarMASSEntries(
"enable-ppc-gen-scalar-mass", cl::init(false),
diff --git a/llvm/test/CodeGen/PowerPC/O3-pipeline.ll b/llvm/test/CodeGen/PowerPC/O3-pipeline.ll
index f329f1a69128bec..16cb7596cd6057d 100644
--- a/llvm/test/CodeGen/PowerPC/O3-pipeline.ll
+++ b/llvm/test/CodeGen/PowerPC/O3-pipeline.ll
@@ -71,6 +71,9 @@
; CHECK-NEXT: CodeGen Prepare
; CHECK-NEXT: Dominator Tree Construction
; CHECK-NEXT: Exception handling preparation
+; CHECK-NEXT: PPC Merge String Pool
+; CHECK-NEXT: FunctionPass Manager
+; CHECK-NEXT: Dominator Tree Construction
; CHECK-NEXT: Natural Loop Information
; CHECK-NEXT: Scalar Evolution Analysis
; CHECK-NEXT: Prepare loop for ppc preferred instruction forms
diff --git a/llvm/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll b/llvm/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
index 649aaf404b8c365..924a2dec8b6996c 100644
--- a/llvm/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
+++ b/llvm/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
@@ -39,19 +39,21 @@ define signext i32 @main() nounwind {
; CHECK-NEXT: cmplwi 3, 234
; CHECK-NEXT: bne 0, .LBB0_7
; CHECK-NEXT: # %bb.5: # %L.B0001
-; CHECK-NEXT: addis 3, 2, .Lstr.2 at toc@ha
-; CHECK-NEXT: addi 3, 3, .Lstr.2 at toc@l
+; CHECK-NEXT: addis 3, 2, .L__ModuleStringPool at toc@ha
+; CHECK-NEXT: addi 3, 3, .L__ModuleStringPool at toc@l
; CHECK-NEXT: bl puts
; CHECK-NEXT: nop
; CHECK-NEXT: li 3, 0
; CHECK-NEXT: b .LBB0_9
; CHECK-NEXT: .LBB0_6: # %L.B0003
-; CHECK-NEXT: addis 3, 2, .Lstr at toc@ha
-; CHECK-NEXT: addi 3, 3, .Lstr at toc@l
+; CHECK-NEXT: addis 3, 2, .L__ModuleStringPool at toc@ha
+; CHECK-NEXT: addi 3, 3, .L__ModuleStringPool at toc@l
+; CHECK-NEXT: addi 3, 3, 7
; CHECK-NEXT: b .LBB0_8
; CHECK-NEXT: .LBB0_7: # %L.B0005
-; CHECK-NEXT: addis 3, 2, .Lstr.1 at toc@ha
-; CHECK-NEXT: addi 3, 3, .Lstr.1 at toc@l
+; CHECK-NEXT: addis 3, 2, .L__ModuleStringPool at toc@ha
+; CHECK-NEXT: addi 3, 3, .L__ModuleStringPool at toc@l
+; CHECK-NEXT: addi 3, 3, 53
; CHECK-NEXT: .LBB0_8: # %L.B0003
; CHECK-NEXT: bl puts
; CHECK-NEXT: nop
@@ -105,19 +107,21 @@ define signext i32 @main() nounwind {
; CHECK-P7-NEXT: cmplwi 3, 234
; CHECK-P7-NEXT: bne 0, .LBB0_7
; CHECK-P7-NEXT: # %bb.5: # %L.B0001
-; CHECK-P7-NEXT: addis 3, 2, .Lstr.2 at toc@ha
-; CHECK-P7-NEXT: addi 3, 3, .Lstr.2 at toc@l
+; CHECK-P7-NEXT: addis 3, 2, .L__ModuleStringPool at toc@ha
+; CHECK-P7-NEXT: addi 3, 3, .L__ModuleStringPool at toc@l
; CHECK-P7-NEXT: bl puts
; CHECK-P7-NEXT: nop
; CHECK-P7-NEXT: li 3, 0
; CHECK-P7-NEXT: b .LBB0_9
; CHECK-P7-NEXT: .LBB0_6: # %L.B0003
-; CHECK-P7-NEXT: addis 3, 2, .Lstr at toc@ha
-; CHECK-P7-NEXT: addi 3, 3, .Lstr at toc@l
+; CHECK-P7-NEXT: addis 3, 2, .L__ModuleStringPool at toc@ha
+; CHECK-P7-NEXT: addi 3, 3, .L__ModuleStringPool at toc@l
+; CHECK-P7-NEXT: addi 3, 3, 7
; CHECK-P7-NEXT: b .LBB0_8
; CHECK-P7-NEXT: .LBB0_7: # %L.B0005
-; CHECK-P7-NEXT: addis 3, 2, .Lstr.1 at toc@ha
-; CHECK-P7-NEXT: addi 3, 3, .Lstr.1 at toc@l
+; CHECK-P7-NEXT: addis 3, 2, .L__ModuleStringPool at toc@ha
+; CHECK-P7-NEXT: addi 3, 3, .L__ModuleStringPool at toc@l
+; CHECK-P7-NEXT: addi 3, 3, 53
; CHECK-P7-NEXT: .LBB0_8: # %L.B0003
; CHECK-P7-NEXT: bl puts
; CHECK-P7-NEXT: nop
diff --git a/llvm/test/CodeGen/PowerPC/licm-remat.ll b/llvm/test/CodeGen/PowerPC/licm-remat.ll
index 5ece3560aa246e5..b1944a7107c1bff 100644
--- a/llvm/test/CodeGen/PowerPC/licm-remat.ll
+++ b/llvm/test/CodeGen/PowerPC/licm-remat.ll
@@ -20,13 +20,10 @@ declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture reado
define linkonce_odr void @ZN6snappyDecompressor_(ptr %this, ptr %writer) {
; CHECK-LABEL: ZN6snappyDecompressor_:
; CHECK: # %bb.0: # %entry
-; CHECK: addis 3, 2, _ZN6snappy8internalL8wordmaskE at toc@ha
-; CHECK-DAG: addi 25, 3, _ZN6snappy8internalL8wordmaskE at toc@l
-; CHECK-DAG: addis 5, 2, _ZN6snappy8internalL10char_tableE at toc@ha
-; CHECK-DAG: addi 24, 5, _ZN6snappy8internalL10char_tableE at toc@l
+; CHECK: addis 3, 2, .L__ModuleStringPool at toc@ha
+; CHECK: addi 25, 3, .L__ModuleStringPool at toc@l
; CHECK: .LBB0_2: # %for.cond
-; CHECK-NOT: addis {{[0-9]+}}, 2, _ZN6snappy8internalL8wordmaskE at toc@ha
-; CHECK-NOT: addis {{[0-9]+}}, 2, _ZN6snappy8internalL10char_tableE at toc@ha
+; CHECK-NOT: addis {{[0-9]+}}, 2, .L__ModuleStringPool at toc@ha
; CHECK: bctrl
entry:
%ip_limit_ = getelementptr inbounds %"class.snappy::SnappyDecompressor", ptr %this, i64 0, i32 2
diff --git a/llvm/test/CodeGen/PowerPC/mergeable-string-pool-large.ll b/llvm/test/CodeGen/PowerPC/mergeable-string-pool-large.ll
index b450475e8a66efb..1d42d27f37f6ed2 100644
--- a/llvm/test/CodeGen/PowerPC/mergeable-string-pool-large.ll
+++ b/llvm/test/CodeGen/PowerPC/mergeable-string-pool-large.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr8 \
-; RUN: -ppc-merge-string-pool=true -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=AIX32
+; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=AIX32
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr8 \
-; RUN: -ppc-merge-string-pool=true -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=AIX64
+; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=AIX64
; RUN: llc -verify-machineinstrs -mtriple powerpc64-unknown-linux -mcpu=pwr8 \
-; RUN: -ppc-merge-string-pool=true -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=LINUX64BE
+; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=LINUX64BE
; RUN: llc -verify-machineinstrs -mtriple powerpc64le-unknown-linux -mcpu=pwr8 \
-; RUN: -ppc-merge-string-pool=true -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=LINUX64LE
+; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=LINUX64LE
@.str.1 = private unnamed_addr constant [12 x i8] c"str1_STRING\00", align 1
@__const.IntArray0 = private unnamed_addr constant [7 x i32] [i32 5, i32 7, i32 9, i32 11, i32 17, i32 1235, i32 32], align 4
diff --git a/llvm/test/CodeGen/PowerPC/mergeable-string-pool.ll b/llvm/test/CodeGen/PowerPC/mergeable-string-pool.ll
index 8e327d527574f66..441ec41e0d054d8 100644
--- a/llvm/test/CodeGen/PowerPC/mergeable-string-pool.ll
+++ b/llvm/test/CodeGen/PowerPC/mergeable-string-pool.ll
@@ -1,11 +1,11 @@
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr8 \
-; RUN: -ppc-merge-string-pool=true -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=AIX32,AIXDATA
+; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=AIX32,AIXDATA
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr8 \
-; RUN: -ppc-merge-string-pool=true -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=AIX64,AIXDATA
+; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=AIX64,AIXDATA
; RUN: llc -verify-machineinstrs -mtriple powerpc64-unknown-linux -mcpu=pwr8 \
-; RUN: -ppc-merge-string-pool=true -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=LINUX64BE,LINUXDATA
+; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=LINUX64BE,LINUXDATA
; RUN: llc -verify-machineinstrs -mtriple powerpc64le-unknown-linux -mcpu=pwr8 \
-; RUN: -ppc-merge-string-pool=true -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=LINUX64LE,LINUXDATA
+; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=LINUX64LE,LINUXDATA
;; This @GLOBALSTRING is a user of @.str which causes @.str to not get pooled.
diff --git a/llvm/test/CodeGen/PowerPC/toc-load-sched-bug.ll b/llvm/test/CodeGen/PowerPC/toc-load-sched-bug.ll
index f017d216d546cfa..61e0a86340cc8ae 100644
--- a/llvm/test/CodeGen/PowerPC/toc-load-sched-bug.ll
+++ b/llvm/test/CodeGen/PowerPC/toc-load-sched-bug.ll
@@ -164,8 +164,8 @@ entry:
; CHECK: .globl _ZN4llvm11ParseIRFileERKSsRNS_12SMDiagnosticERNS_11LLVMContextE
; CHECK: bctrl
; CHECK: ld 2, 24(1)
-; CHECK: addis [[REG:[0-9]+]], 2, .L.str at toc@ha
-; CHECK: addi {{[0-9]+}}, [[REG]], .L.str at toc@l
+; CHECK: addis [[REG:[0-9]+]], 2, .L__ModuleStringPool at toc@ha
+; CHECK: addi {{[0-9]+}}, [[REG]], .L__ModuleStringPool at toc@l
; CHECK: bl _ZNSs6insertEmPKcm
%.atomicdst.i.i.i.i.i46 = alloca i32, align 4
%ref.tmp.i.i47 = alloca %"class.std::allocator", align 1
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