[llvm] fa31ce5 - [RISCV][GISel] Add gisel-commandline-option.ll similar to AArch64. (#65299)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 5 09:01:54 PDT 2023
Author: Craig Topper
Date: 2023-09-05T09:01:50-07:00
New Revision: fa31ce5320c57922a90636de4043389b4cc58c17
URL: https://github.com/llvm/llvm-project/commit/fa31ce5320c57922a90636de4043389b4cc58c17
DIFF: https://github.com/llvm/llvm-project/commit/fa31ce5320c57922a90636de4043389b4cc58c17.diff
LOG: [RISCV][GISel] Add gisel-commandline-option.ll similar to AArch64. (#65299)
This allows us to see the pass pipeline for GlobalISel.
Added:
llvm/test/CodeGen/RISCV/GlobalISel/gisel-commandline-option.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/gisel-commandline-option.ll b/llvm/test/CodeGen/RISCV/GlobalISel/gisel-commandline-option.ll
new file mode 100644
index 00000000000000..7dec60d368b464
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/gisel-commandline-option.ll
@@ -0,0 +1,37 @@
+; RUN: llc -mtriple=riscv64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN: -O0 -global-isel \
+; RUN: | FileCheck %s --check-prefix ENABLED --check-prefix NOFALLBACK
+
+; RUN: llc -mtriple=riscv64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN: -global-isel \
+; RUN: | FileCheck %s --check-prefix ENABLED --check-prefix NOFALLBACK --check-prefix ENABLED-O1
+
+; RUN: llc -mtriple=riscv64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN: -global-isel -global-isel-abort=2 \
+; RUN: | FileCheck %s --check-prefix ENABLED --check-prefix FALLBACK --check-prefix ENABLED-O1
+
+; RUN: llc -mtriple=riscv64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN: | FileCheck %s --check-prefix DISABLED
+
+; ENABLED: IRTranslator
+; ENABLED-NEXT: Analysis containing CSE Info
+; ENABLED-NEXT: Analysis for ComputingKnownBits
+; ENABLED-NEXT: Legalizer
+; ENABLED-NEXT: RegBankSelect
+; ENABLED-NEXT: Analysis for ComputingKnownBits
+; ENABLED-O1-NEXT: Lazy Branch Probability Analysis
+; ENABLED-O1-NEXT: Lazy Block Frequency Analysis
+; ENABLED-NEXT: InstructionSelect
+; ENABLED-NEXT: ResetMachineFunction
+
+; FALLBACK: RISC-V DAG->DAG Pattern Instruction Selection
+; NOFALLBACK-NOT: RISC-V DAG->DAG Pattern Instruction Selection
+
+; DISABLED-NOT: IRTranslator
+
+; DISABLED: RISC-V DAG->DAG Pattern Instruction Selection
+; DISABLED: Finalize ISel and expand pseudo-instructions
+
+define void @empty() {
+ ret void
+}
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