[llvm] [GlobalISel] Fix G_PTR_ADD immediate chain combine using the wrong im… (PR #65271)

[Amara Emerson via llvm-commits]

https://github.com/aemerson created https://github.com/llvm/llvm-project/pull/65271:

…mediate for heuristics.

The legal-addressing-mode heuristics in the combine checks that for a pattern: %ptr1 = G_PTR_ADD %_, C_outer
%ptr2 = G_PTR_ADD %ptr1, C_inner

...whether a base_reg + C_outer addressing mode is legal as the *original* address. However, the original pointer being analyzed is %ptr2, so it should be C_inner.

This provides a 0.1% geomean improvement on CTMark -Os for AArch64.

>From 829b473bbdafbabcd6d42329913c0be9ff9d4b29 Mon Sep 17 00:00:00 2001
From: Amara Emerson <amara at apple.com>
Date: Mon, 4 Sep 2023 08:29:02 -0700
Subject: [PATCH] [GlobalISel] Fix G_PTR_ADD immediate chain combine using the
 wrong immediate for heuristics.

The legal-addressing-mode heuristics in the combine checks that for a pattern:
%ptr1 = G_PTR_ADD %_, C_outer
%ptr2 = G_PTR_ADD %ptr1, C_inner

...whether a base_reg + C_outer addressing mode is legal as the *original* address.
However, the original pointer being analyzed is %ptr2, so it should be C_inner.

This provides a 0.1% geomean improvement on CTMark -Os for AArch64.
---
 llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp                | 2 +-
 .../AArch64/GlobalISel/prelegalizercombiner-ptradd-chain.mir  | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index efc819c96b9bc3..1604de13b49403 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -1394,7 +1394,7 @@ bool CombinerHelper::matchPtrAddImmedChain(MachineInstr &MI,
   if (AccessTy) {
     AMNew.HasBaseReg = true;
     TargetLoweringBase::AddrMode AMOld;
-    AMOld.BaseOffs = MaybeImm2Val->Value.getSExtValue();
+    AMOld.BaseOffs = MaybeImmVal->Value.getSExtValue();
     AMOld.HasBaseReg = true;
     unsigned AS = MRI.getType(Add2).getAddressSpace();
     const auto &TLI = *MF.getSubtarget().getTargetLowering();
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-ptradd-chain.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-ptradd-chain.mir
index 4a9ff7059c06d4..a66fd4faec8004 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-ptradd-chain.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-ptradd-chain.mir
@@ -117,9 +117,9 @@ body:             |
     ; CHECK-NEXT: {{  $}}
     ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
     ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1600136
+    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
     ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
-    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1600144
-    ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C1]](s64)
+    ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C1]](s64)
     ; CHECK-NEXT: %ld:_(s64) = G_LOAD [[PTR_ADD1]](p0) :: (load (s64))
     ; CHECK-NEXT: %ld_other:_(s64) = G_LOAD [[PTR_ADD]](p0) :: (load (s64))
     ; CHECK-NEXT: $x0 = COPY %ld(s64)