[PATCH] D159368: [RISCV] Remove SEW operand for load/store and SEW-aware pseudos
Kito Cheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 5 08:19:22 PDT 2023
kito-cheng added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:51-57
+static unsigned getLog2SEW(const MachineInstr &MI) {
+ uint64_t TSFlags = MI.getDesc().TSFlags;
+ assert(RISCVII::hasSEW(TSFlags) && "The instruction doesn't have SEW value!");
+ if (RISCVII::hasSEWOp(TSFlags))
+ return MI.getOperand(RISCVII::getSEWOpNum(MI.getDesc())).getImm();
+
+ return 3 + RISCVII::getVSEW(TSFlags);
----------------
This seems could be a separated NFC refactor patch?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D159368/new/
https://reviews.llvm.org/D159368
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