The Week Of Monday 21 April 2025 Archives by date

• Messages sorted by: [ thread ] [ subject ] [ author ]
• More info on this list...

Starting: Mon Apr 21 00:01:49 PDT 2025
Ending: Sun Apr 27 23:55:31 PDT 2025
Messages: 5847

• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Hristo Hristov via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Hristo Hristov via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Hristo Hristov via llvm-commits
• [llvm] b6820c3 - [MachinePipeliner] Remove UB from tests (NFC) (#123169)   via llvm-commits
• [llvm] [MachinePipeliner] Remove UB from tests (NFC) (PR #123169)   Ryotaro Kasuga via llvm-commits
• [llvm] Stop abusing Twine in DiagnosticInfo (PR #136371)   Justin Bogner via llvm-commits
• [llvm] Stop abusing Twine in DiagnosticInfo (PR #136371)   Justin Bogner via llvm-commits
• [llvm] Stop abusing Twine in DiagnosticInfo (PR #136371)   via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   A. Jiang via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   A. Jiang via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   A. Jiang via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   A. Jiang via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   via llvm-commits
• [llvm] [COFF] Preserve UniqueID used to create MCSectionCOFF (PR #123869)   Haohai Wen via llvm-commits
• [llvm] [PseudoProbe] Add PseudoProbeDescUpdatePass (PR #99839)   Haohai Wen via llvm-commits
• [clang] [llvm] [clang][AVR] Improve compatibility of inline assembly with avr-gcc (PR #136534)   Ben Shi via llvm-commits
• [llvm] [COFF] Preserve UniqueID used to create MCSectionCOFF (PR #123869)   Haohai Wen via llvm-commits
• [clang] [llvm] [clang][AVR] Improve compatibility of inline assembly with avr-gcc (PR #136534)   Ben Shi via llvm-commits
• [clang] [llvm] [clang][AVR] Improve compatibility of inline assembly with avr-gcc (PR #136534)   Ben Shi via llvm-commits
• [clang] [llvm] DO NOT MERGE: Identify places that need reserve. (PR #136543)   Kazu Hirata via llvm-commits
• [clang] [llvm] [clang][AVR] Improve compatibility of inline assembly with avr-gcc (PR #136534)   Sergei Barannikov via llvm-commits
• [llvm] Stop abusing Twine in DiagnosticInfo (PR #136371)   Justin Bogner via llvm-commits
• [llvm] Stop abusing Twine in DiagnosticInfo (PR #136371)   Justin Bogner via llvm-commits
• [llvm] Stop abusing Twine in DiagnosticInfo (PR #136371)   Justin Bogner via llvm-commits
• [llvm] [LoongArch] Pre-commit for widen shuffle mask (PR #136544)   via llvm-commits
• [llvm] [LoongArch] Pre-commit for widen shuffle mask (PR #136544)   via llvm-commits
• [llvm] [MIPS]Remove unnecessary SLL instructions on MIPS64el (PR #109386)   via llvm-commits
• [clang] [llvm] DO NOT MERGE: Identify places that need reserve. (PR #136543)   Kazu Hirata via llvm-commits
• [llvm] [LoongArch] Pre-commit for widen shuffle mask (PR #136544)   via llvm-commits
• [llvm] [MIPS]Remove unnecessary SLL instructions on MIPS64el (PR #109386)   via llvm-commits
• [llvm] 4853bf0 - [LoongArch] Lower build_vector to broadcast load if possible (#135896)   via llvm-commits
• [llvm] [LoongArch] Lower build_vector to broadcast load if possible (PR #135896)   via llvm-commits
• [llvm] 053451c - [RISCV] Handle scalarized reductions in getArithmeticReductionCost   Luke Lau via llvm-commits
• [llvm] [RISCV] Cost ordered bf16/f16 w/ zvfhmin reductions as invalid (PR #114250)   Luke Lau via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Abinaya Saravanan via llvm-commits
• [llvm] [LoongArch] Lower build_vector to broadcast load if possible (PR #135896)   LLVM Continuous Integration via llvm-commits
• [llvm] [IRCE] Fix '"Instruction does not dominate all uses!" after IRCE pass #63984' (PR #136505)   Nikita Popov via llvm-commits
• [llvm] [MIPS]Remove unnecessary SLL instructions on MIPS64el (PR #109386)   via llvm-commits
• [llvm] [Hexagon] Handle Call Operand vxi1 in Hexagon without HVX Enabled (PR #136546)   via llvm-commits
• [llvm] [Hexagon] Handle Call Operand vxi1 in Hexagon without HVX Enabled (PR #136546)   via llvm-commits
• [llvm] [Hexagon] Handle Call Operand vxi1 in Hexagon without HVX Enabled (PR #136546)   via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Hristo Hristov via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Check for AMXTile (PR #136507)   Simon Pilgrim via llvm-commits
• [llvm] 47ca7f1 - [X86] Remove unused BitVector TILERegs (NFC) (#136508)   via llvm-commits
• [llvm] [X86] Remove unused BitVector TILERegs (NFC) (PR #136508)   Simon Pilgrim via llvm-commits
• [llvm] [IRCE] Fix '"Instruction does not dominate all uses!" after IRCE pass #63984' (PR #136505)   via llvm-commits
• [llvm] [llvm-mca][FeatureRequest] Itimeline graph, note source of delay for each instruction (PR #136423)   Matt Arsenault via llvm-commits
• [llvm] [llvm-mca][FeatureRequest] Itimeline graph, note source of delay for each instruction (PR #136423)   Matt Arsenault via llvm-commits
• [llvm] [CostModel] Remove optional from InstructionCost::getValue() (PR #135596)   Simon Pilgrim via llvm-commits
• [llvm] [LoopVectorizer] Prune VFs based on plan register pressure (PR #132190)   Luke Lau via llvm-commits
• [llvm] [CostModel] Remove optional from InstructionCost::getValue() (PR #135596)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Use llvm::SmallVector::pop_back_val (NFC) (PR #136533)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Add ISel patterns for Xqcia instructions (PR #136548)   via llvm-commits
• [llvm] [X86] Remove unused BitVector TILERegs (NFC) (PR #136508)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Add ISel patterns for Xqcia instructions (PR #136548)   via llvm-commits
• [llvm] [RISCV] Add ISel patterns for Xqcia instructions (PR #136548)   via llvm-commits
• [llvm] [RISCV] Add ISel patterns for Xqcia instructions (PR #136548)   via llvm-commits
• [llvm] [IRCE] Fix '"Instruction does not dominate all uses!" after IRCE pass #63984' (PR #136505)   via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   Matt Arsenault via llvm-commits
• [llvm] [IRCE] Fix '"Instruction does not dominate all uses!" after IRCE pass #63984' (PR #136505)   via llvm-commits
• [llvm] [RISCV] Add ISel patterns for Xqcia instructions (PR #136548)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add ISel patterns for Xqcia instructions (PR #136548)   Sam Elliott via llvm-commits
• [llvm] [X86][Combine] Ensure single use chain in extract-load combine (PR #136520)   Simon Pilgrim via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Sink vp.splat operands of VP intrinsic. (PR #133245)   Luke Lau via llvm-commits
• [llvm] [RISCV] Sink vp.splat operands of VP intrinsic. (PR #133245)   Luke Lau via llvm-commits
• [llvm] [X86][SelectionDAG] Fix the Gather's base and index by modifying the Scale value (PR #134979)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU][NewPM] Make the pass flow consistent with the legacy pipeline. (PR #136551)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU][NewPM] Make the pass flow consistent with the legacy pipeline. (PR #136551)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU][NewPM] Make the pass flow consistent with the legacy pipeline. (PR #136551)   Christudasan Devadasan via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU][NewPM] Make the pass flow consistent with the legacy pipeline. (PR #136551)   via llvm-commits
• [llvm] [RISCV][NFC] Delete RISCVAsmParser::parsePseudoQCJumpSymbol (PR #136552)   Liao Chunyu via llvm-commits
• [llvm] [RISCV][NFC] Delete RISCVAsmParser::parsePseudoQCJumpSymbol (PR #136552)   via llvm-commits
• [llvm] [AMDGPU][NewPM] Make the pass flow consistent with the legacy pipeline. (PR #136551)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][NFC] Delete RISCVAsmParser::parsePseudoQCJumpSymbol (PR #136552)   Sudharsan Veeravalli via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Luke Lau via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Fold tan(x) * cos(x) => sin(x) (PR #136319)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold tan(x) * cos(x) => sin(x) (PR #136319)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold tan(x) * cos(x) => sin(x) (PR #136319)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold tan(x) * cos(x) => sin(x) (PR #136319)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Jim Lin via llvm-commits
• [llvm] [AMDGPU] add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [llvm] [AMDGPU] add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [llvm] insert readfirstlane in the function returns in sgpr (PR #135326)   Matt Arsenault via llvm-commits
• [llvm] insert readfirstlane in the function returns in sgpr (PR #135326)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Make Select-with-Identity-Fold More Flexible; NFC (PR #136554)   Marius Kamp via llvm-commits
• [llvm] [X86] Distribute Certain Bitwise Operations over SELECT (PR #136555)   Marius Kamp via llvm-commits
• [llvm] [X86] Distribute Certain Bitwise Operations over SELECT (PR #136555)   Marius Kamp via llvm-commits
• [llvm] [SDAG] Make Select-with-Identity-Fold More Flexible; NFC (PR #136554)   via llvm-commits
• [llvm] InstCombine: Fold samesign ult to slt with added constant when the range is known (PR #134556)   Rajagopalan Gangadharan via llvm-commits
• [llvm] [RISCV][NFC] Delete RISCVAsmParser::parsePseudoQCJumpSymbol (PR #136552)   Sam Elliott via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Matt Arsenault via llvm-commits
• [llvm] c347ad2 - [RISCV][NFC] Delete RISCVAsmParser::parsePseudoQCJumpSymbol (#136552)   via llvm-commits
• [llvm] [RISCV][NFC] Delete RISCVAsmParser::parsePseudoQCJumpSymbol (PR #136552)   Liao Chunyu via llvm-commits
• [clang] [llvm] Add smcntrpmf extension (PR #136556)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Widen i1 AnyOf reductions (PR #134898)   Luke Lau via llvm-commits
• [llvm] [RISCV] Widen i1 AnyOf reductions (PR #134898)   Luke Lau via llvm-commits
• [clang] [llvm] Add smcntrpmf extension (PR #136556)   via llvm-commits
• [llvm] [SDAG] Make Select-with-Identity-Fold More Flexible; NFC (PR #136554)   Matt Arsenault via llvm-commits
• [clang] [llvm] [RISCV] Add smcntrpmf extension (PR #136556)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Add range metadata for atomic load of boolean type. (PR #136502)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Widen i1 AnyOf reductions (PR #134898)   Luke Lau via llvm-commits
• [llvm] [RISCV] Widen i1 AnyOf reductions (PR #134898)   Luke Lau via llvm-commits
• [llvm] [SDAG] Make Select-with-Identity-Fold More Flexible; NFC (PR #136554)   Marius Kamp via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Christudasan Devadasan via llvm-commits
• [llvm] [RISCV] Widen i1 AnyOf reductions (PR #134898)   Luke Lau via llvm-commits
• [llvm] [AMDGPU][NewPM] Make the pass flow consistent with the legacy pipeline. (PR #136551)   Christudasan Devadasan via llvm-commits
• [clang] [llvm] [RISCV] Add smcntrpmf extension (PR #136556)   Sam Elliott via llvm-commits
• [clang] [llvm] [RISCV] Add smcntrpmf extension (PR #136556)   Sam Elliott via llvm-commits
• [clang] [llvm] [RISCV] Add smcntrpmf extension (PR #136556)   Sam Elliott via llvm-commits
• [llvm] 940108b - [AMDGPU][NewPM] Make the pass flow consistent with the legacy pipeline. (#136551)   via llvm-commits
• [llvm] [AMDGPU][NewPM] Make the pass flow consistent with the legacy pipeline. (PR #136551)   Christudasan Devadasan via llvm-commits
• [llvm] [llvm-extract] support unnamed bbs. (PR #135140)   Benjamin Maxwell via llvm-commits
• [llvm] [RISCV] Widen i1 AnyOf reductions (PR #134898)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Widen i1 AnyOf reductions (PR #134898)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Widen i1 AnyOf reductions (PR #134898)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Widen i1 AnyOf reductions (PR #134898)   Pengcheng Wang via llvm-commits
• [llvm] Added APInt::clearBits() method #136550 (PR #136557)   via llvm-commits
• [llvm] [RISCV] Widen i1 AnyOf reductions (PR #134898)   Luke Lau via llvm-commits
• [llvm] Added APInt::clearBits() method #136550 (PR #136557)   via llvm-commits
• [llvm] Added APInt::clearBits() method #136550 (PR #136557)   via llvm-commits
• [llvm] Added APInt::clearBits() method #136550 (PR #136557)   via llvm-commits
• [llvm] [ConstraintElim] Add facts about non-poison intrinsics on demand (PR #136558)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU][NewPM] Make the pass flow consistent with the legacy pipeline. (PR #136551)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Remove `AND` mask generated by `( zext ( atomic_load ) )` by replacing the load with `zextload` for orderings not stronger then monotonic. (PR #136502)   Jan Górski via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Jim Lin via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Make Select-with-Identity-Fold More Flexible; NFC (PR #136554)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   YunQiang Su via llvm-commits
• [llvm] [AMDGPU][NewPM] Make the pass flow consistent with the legacy pipeline. (PR #136551)   LLVM Continuous Integration via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Jim Lin via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Jim Lin via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement vop3p complex pattern optmization for gisel (PR #130234)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement vop3p complex pattern optmization for gisel (PR #130234)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement vop3p complex pattern optmization for gisel (PR #130234)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Pankaj Dwivedi via llvm-commits
• [llvm] [GlobalISel] Introduce `G_POISON` (PR #127825)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Introduce `G_POISON` (PR #127825)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Introduce `G_POISON` (PR #127825)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Introduce `G_POISON` (PR #127825)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Introduce `G_POISON` (PR #127825)   Matt Arsenault via llvm-commits
• [llvm] [InstSimplify] Fold `getelementptr inbounds null, idx -> null` (PR #130742)   Madhur Amilkanthwar via llvm-commits
• [llvm] [ConstraintElim] Add facts about non-poison intrinsics on demand (PR #136558)   Yingwei Zheng via llvm-commits
• [llvm] [GlobalISel] Add `combine` action for C++ combine rules (PR #135941)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Matt Arsenault via llvm-commits
• [llvm] [LangRef][IR] Fix default AS documentation for allocas without explicit AS (PR #135942)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Pankaj Dwivedi via llvm-commits
• [llvm] AMDGPU: Fix the double rounding issue in v2f64 -> v2f16 conversion (PR #135659)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix the double rounding issue in v2f64 -> v2f16 conversion (PR #135659)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Simon Pilgrim via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   Simon Pilgrim via llvm-commits
• [llvm] [CodeGenPrepare] Unfold slow ctpop when used in power-of-two test (PR #102731)   Matt Arsenault via llvm-commits
• [llvm] [CodeGenPrepare] Unfold slow ctpop when used in power-of-two test (PR #102731)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Pankaj Dwivedi via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Matt Arsenault via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][NFC] Delete RISCVAsmParser::parsePseudoQCJumpSymbol (PR #136552)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGenPrepare] Unfold slow ctpop when used in power-of-two test (PR #102731)   Sergei Barannikov via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Pankaj Dwivedi via llvm-commits
• [llvm] [LLVM][ISel][AArch64 Remove AArch64ISD::FCM##z nodes. (PR #135817)   Paul Walker via llvm-commits
• [llvm] [InstSimplify] Fold `getelementptr inbounds null, idx -> null` (PR #130742)   Luke Lau via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Matt Arsenault via llvm-commits
• [llvm] [CodeGenPrepare] Unfold slow ctpop when used in power-of-two test (PR #102731)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Adopt some Ld* patterns to reduce codegen regressions (PR #135492)   Matt Arsenault via llvm-commits
• [libcxxabi] [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [llvm] [RISCV] Widen i1 AnyOf reductions (PR #134898)   Luke Lau via llvm-commits
• [llvm] [llvm-mca][FeatureRequest] Itimeline graph, note source of delay for each instruction (PR #136423)   via llvm-commits
• [llvm] [DAGCombiner] Option --combiner-select-seq (PR #134813)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] Option --combiner-select-seq (PR #134813)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] Option --combiner-select-seq (PR #134813)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] Option --combiner-select-seq (PR #134813)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] Option --combiner-select-seq (PR #134813)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] Option --combiner-select-seq (PR #134813)   Matt Arsenault via llvm-commits
• [llvm] [MachinePipeliner] Add validation for missed dependencies (PR #135148)   Ryotaro Kasuga via llvm-commits
• [llvm] [llvm-mca][FeatureRequest] Itimeline graph, note source of delay for each instruction (PR #136423)   via llvm-commits
• [llvm] [VPlan] Add VPInstruction::StepVector and use it in VPWidenIntOrFpInductionRecipe (PR #129508)   Luke Lau via llvm-commits
• [llvm] [MachinePipeliner] Add validation for missed dependencies (PR #135148)   Ryotaro Kasuga via llvm-commits
• [llvm] Expanding the Histogram Intrinsic (PR #127399)   via llvm-commits
• [llvm] [VPlan] Add VPInstruction::StepVector and use it in VPWidenIntOrFpInductionRecipe (PR #129508)   Luke Lau via llvm-commits
• [llvm] Expanding the Histogram Intrinsic (PR #127399)   via llvm-commits
• [llvm] [lldb][LoongArch] Fix expression function call failure (PR #136563)   via llvm-commits
• [llvm] [llvm-mca][FeatureRequest] Itimeline graph, note source of delay for each instruction (PR #136423)   via llvm-commits
• [llvm] Expanding the Histogram Intrinsic (PR #127399)   via llvm-commits
• [llvm] [CodeGenPrepare] Unfold slow ctpop when used in power-of-two test (PR #102731)   Sergei Barannikov via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   YunQiang Su via llvm-commits
• [llvm] [CodeGenPrepare] Unfold slow ctpop when used in power-of-two test (PR #102731)   Sergei Barannikov via llvm-commits
• [llvm] [RISCV] Cost ordered bf16/f16 w/ zvfhmin reductions as invalid (PR #114250)   Harald van Dijk via llvm-commits
• [llvm] [MachinePipeliner] Add validation for missed dependencies (PR #135148)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Add validation for missed dependencies (PR #135148)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Add validation for missed dependencies (PR #135148)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Add validation for missed dependencies (PR #135148)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Add validation for missed dependencies (PR #135148)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Add validation for missed dependencies (PR #135148)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Add validation for missed dependencies (PR #135148)   via llvm-commits
• [llvm] [ConstraintElim] Add facts about non-poison intrinsics on demand (PR #136558)   Yingwei Zheng via llvm-commits
• [llvm] [BOLT][NFCI] Emit uniform diagnostics in DataAggregator (PR #136530)   Amir Ayupov via llvm-commits
• [llvm] Stop abusing Twine in DiagnosticInfo (PR #136371)   Matt Arsenault via llvm-commits
• [llvm] [BOLT][NFCI] Emit uniform diagnostics in DataAggregator (PR #136530)   via llvm-commits
• [llvm] [ConstraintElim] Add facts about non-poison intrinsics on demand (PR #136558)   Yingwei Zheng via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   Matt Arsenault via llvm-commits
• [llvm] [MachinePipeliner] Add validation for missed dependencies (PR #135148)   Ryotaro Kasuga via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] optimize codegen for mad-mix in true16 (PR #124995)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] optimize codegen for mad-mix in true16 (PR #124995)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] optimize codegen for mad-mix in true16 (PR #124995)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   YunQiang Su via llvm-commits
• [llvm] [ConstraintElim] Add facts about non-poison intrinsics on demand (PR #136558)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU] Implement IR expansion for frem instruction (PR #130988)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement IR expansion for frem instruction (PR #130988)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement IR expansion for frem instruction (PR #130988)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement IR expansion for frem instruction (PR #130988)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement IR expansion for frem instruction (PR #130988)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement IR expansion for frem instruction (PR #130988)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement IR expansion for frem instruction (PR #130988)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][NPM] Update BranchFolderLegacy make tail merge configurable via flag (PR #135277)   Mikhail R. Gadelha via llvm-commits
• [llvm] [CodeGen][NPM] Update BranchFolderLegacy make tail merge configurable via flag (PR #135277)   Mikhail R. Gadelha via llvm-commits
• [llvm] [CodeGen][NPM] Update BranchFolderLegacy make tail merge configurable via flag (PR #135277)   via llvm-commits
• [llvm] [CodeGen][NPM] Update BranchFolderLegacy make tail merge configurable via flag (PR #135277)   Mikhail R. Gadelha via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Matt Arsenault via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Matt Arsenault via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Matt Arsenault via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Matt Arsenault via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Matt Arsenault via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Matt Arsenault via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Matt Arsenault via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Matt Arsenault via llvm-commits
• [llvm] 788b50a - [X86] Add test coverage for #136368   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   via llvm-commits
• [llvm] InstCombine: Avoid counting uses of constants (PR #136566)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Avoid counting uses of constants (PR #136566)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Avoid counting uses of constants (PR #136566)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Avoid counting uses of constants (PR #136566)   via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   YunQiang Su via llvm-commits
• [llvm] [AArch64][GlobalISel] Perfect Shuffles (PR #106446)   David Green via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Jim Lin via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Jim Lin via llvm-commits
• [clang] [llvm] [SROA] Vector promote some memsets (PR #133301)   via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   Matt Arsenault via llvm-commits
• [llvm] [TTI] Constify BasicTTIImplBase::thisT() (PR #136567)   Sergei Barannikov via llvm-commits
• [llvm] [TTI] Constify BasicTTIImplBase::thisT() (PR #136567)   Sergei Barannikov via llvm-commits
• [llvm] [ConstraintElim] Add facts about non-poison intrinsics on demand (PR #136558)   Yingwei Zheng via llvm-commits
• [llvm] [TTI] Constify BasicTTIImplBase::thisT() (PR #136567)   via llvm-commits
• [llvm] [TTI] Constify BasicTTIImplBase::thisT() (PR #136567)   via llvm-commits
• [llvm] [TTI] Constify BasicTTIImplBase::thisT() (PR #136567)   via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP][AMDGPU] Improve the handling of `inreg` arguments (PR #133614)   Shilei Tian via llvm-commits
• [llvm] [TTI] Constify BasicTTIImplBase::thisT() (PR #136567)   Sergei Barannikov via llvm-commits
• [llvm] [TTI] Constify BasicTTIImplBase::thisT() (PR #136567)   Sergei Barannikov via llvm-commits
• [llvm] [llvm] Use llvm::SmallVector::pop_back_val (NFC) (PR #136533)   Jakub Kuderski via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [llvm] [ConstraintElim] Add facts about non-poison intrinsics on demand (PR #136558)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Pankaj Dwivedi via llvm-commits
• [llvm] [Analysis] Add DebugInfoCache analysis (PR #118629)   Artem Pianykh via llvm-commits
• [llvm] [Analysis] Add DebugInfoCache analysis (PR #118629)   Artem Pianykh via llvm-commits
• [llvm] f12078e - [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (#122741)   via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   zhijian lin via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Avoid counting uses of constants (PR #136566)   Yingwei Zheng via llvm-commits
• [clang] [llvm] [RISCV] Add Andes XAndesperf (Andes Performance) extension. (PR #135110)   Jim Lin via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Pankaj Dwivedi via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Pankaj Dwivedi via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [RISCV] Add Andes XAndesperf (Andes Performance) extension. (PR #135110)   Jim Lin via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Pankaj Dwivedi via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [Coro] Amortize debug info processing cost in CoroSplit (PR #109032)   Artem Pianykh via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Pankaj Dwivedi via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [BOLT][AArch64] Support for pointer authentication (v2) (PR #120064)   Anatoly Trosinenko via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [clang][OpenMP][SPIR-V] Fix addrspace of global constants (PR #134399)   Nick Sarnie via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [clang] [llvm] [DirectX] add Function name to DiagnosticInfoUnsupported Msg in DXILOpLowering (PR #136234)   Chris B via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [Coro] Amortize debug info processing cost in CoroSplit (PR #109032)   Artem Pianykh via llvm-commits
• [llvm] [Coro] Amortize debug info processing cost in CoroSplit (PR #109032)   Artem Pianykh via llvm-commits
• [llvm] 111af76 - [DirectX] add Function name to DiagnosticInfoUnsupported Msg in DXILOpLowering (#136234)   via llvm-commits
• [clang] [llvm] [DirectX] add Function name to DiagnosticInfoUnsupported Msg in DXILOpLowering (PR #136234)   Farzon Lotfi via llvm-commits
• [llvm] [AMDGPU] Skip handling of non-byte types in promote alloca. (PR #128769)   Sumanth Gundapaneni via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Skip handling of non-byte types in promote alloca. (PR #128769)   Sumanth Gundapaneni via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [llvm] [LiveVariables] Mark use as implicit-def if defined at instr (PR #119446)   Sumanth Gundapaneni via llvm-commits
• [llvm] [Offload] Implement the remaining initial Offload API (PR #122106)   Callum Fare via llvm-commits
• [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)   Rainer Orth via llvm-commits
• [llvm] [DirectX] legalize memset (PR #136244)   Chris B via llvm-commits
• [llvm] [DirectX] legalize memset (PR #136244)   Chris B via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] e18a77c - Revert "[SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (#122741)"   Nico Weber via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   Nico Weber via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   via llvm-commits
• [llvm] [Offload] Implement the remaining initial Offload API (PR #122106)   Callum Fare via llvm-commits
• [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)   Sergei Barannikov via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   via llvm-commits
• [llvm] [Offload] Implement the remaining initial Offload API (PR #122106)   Joseph Huber via llvm-commits
• [llvm] [Offload] Implement the remaining initial Offload API (PR #122106)   Callum Fare via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Brox Chen via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Brox Chen via llvm-commits
• [llvm] [VPlan] Also duplicated scalar-steps when it enables sinking scalars. (PR #136021)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Also duplicated scalar-steps when it enables sinking scalars. (PR #136021)   Florian Hahn via llvm-commits
• [llvm] [DirectX] legalize memset (PR #136244)   Farzon Lotfi via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Support for DLL export (PR #136014)   Andrew Rogers via llvm-commits
• [llvm] [ctxprof] Scale up everything under a root by its `TotalRootEntryCount` (PR #136015)   Mircea Trofin via llvm-commits
• [llvm] [ctxprof] Scale up everything under a root by its `TotalRootEntryCount` (PR #136015)   Mircea Trofin via llvm-commits
• [llvm] cfc2b0d - [llvm] Use llvm::SmallVector::pop_back_val (NFC) (#136533)   via llvm-commits
• [llvm] [llvm] Use llvm::SmallVector::pop_back_val (NFC) (PR #136533)   Kazu Hirata via llvm-commits
• [llvm] e1bb7f6 - [LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter (#136456)   via llvm-commits
• [llvm] [LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter (PR #136456)   Rahul Joshi via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   Matt Arsenault via llvm-commits
• [llvm] [InstrRef] Preserve debug instr num in aarch64-ldst-opt. (PR #136009)   Jeremy Morse via llvm-commits
• [llvm] [InstrRef] Preserve debug instr num in aarch64-ldst-opt. (PR #136009)   Jeremy Morse via llvm-commits
• [llvm] [InstrRef] Preserve debug instr num in aarch64-ldst-opt. (PR #136009)   Jeremy Morse via llvm-commits
• [llvm] [InstrRef] Preserve debug instr num in aarch64-ldst-opt. (PR #136009)   Jeremy Morse via llvm-commits
• [llvm] [JITLink][AArch32] Add explicit visibility macros to functions needed by unittests (PR #116557)   Andrew Rogers via llvm-commits
• [llvm] [DirectX] legalize memset (PR #136244)   Farzon Lotfi via llvm-commits
• [llvm] [ctxprof] Scale up everything under a root by its `TotalRootEntryCount` (PR #136015)   Mircea Trofin via llvm-commits
• [llvm] [LLVM] Pass correct target to LLVM_RUNTIMES_TARGET for runtimes (PR #136572)   Joseph Huber via llvm-commits
• [llvm] [AArch64] Replace 64-bit MADD with [SU]MADDL when possible (PR #135926)   Yuri Gribov via llvm-commits
• [llvm] 93b74f7 - [ctxprof] Scale up everything under a root by its `TotalRootEntryCount` (#136015)   via llvm-commits
• [llvm] [ctxprof] Scale up everything under a root by its `TotalRootEntryCount` (PR #136015)   Mircea Trofin via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [NFC][LLVM][TableGen] Eliminate inheritance from std::vector (PR #136573)   Rahul Joshi via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [OpenMP] Remove dependency on LLVM include directory from DeviceRTL (PR #136359)   Shilei Tian via llvm-commits
• [llvm] [LLVM] Cleanup pass initialization for Analysis passes (PR #135858)   Rahul Joshi via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [OpenMP] Remove dependency on LLVM include directory from DeviceRTL (PR #136359)   Joseph Huber via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   LLVM Continuous Integration via llvm-commits
• [llvm] [PowerPC] Intrinsics and tests for dmr insert/extract (PR #135653)   Maryam Moghadas via llvm-commits
• [llvm] [PowerPC] Intrinsics and tests for dmr insert/extract (PR #135653)   Maryam Moghadas via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Shilei Tian via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Shilei Tian via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Shilei Tian via llvm-commits
• [clang] [llvm] [RISCV] Add Andes XAndesperf (Andes Performance) extension. (PR #135110)   Craig Topper via llvm-commits
• [llvm] [OpenMP] Remove dependency on LLVM include directory from DeviceRTL (PR #136359)   Shilei Tian via llvm-commits
• [llvm] [TTI] Constify BasicTTIImplBase::thisT() (PR #136575)   Sergei Barannikov via llvm-commits
• [llvm] [OpenMP] Remove dependency on LLVM include directory from DeviceRTL (PR #136359)   Joseph Huber via llvm-commits
• [llvm] [BOLT] Do not return Def-ed registers from MCPlusBuilder::getUsedRegs (PR #129890)   Anatoly Trosinenko via llvm-commits
• [llvm] [llvm-mca][FeatureRequest] Itimeline graph, note source of delay for each instruction (PR #136423)   Min-Yih Hsu via llvm-commits
• [llvm] [llvm-mca][FeatureRequest] Itimeline graph, note source of delay for each instruction (PR #136423)   Min-Yih Hsu via llvm-commits
• [llvm] [llvm-mca][FeatureRequest] Itimeline graph, note source of delay for each instruction (PR #136423)   Min-Yih Hsu via llvm-commits
• [llvm] [llvm-mca][FeatureRequest] Itimeline graph, note source of delay for each instruction (PR #136423)   Min-Yih Hsu via llvm-commits
• [llvm] [llvm-mca][FeatureRequest] Itimeline graph, note source of delay for each instruction (PR #136423)   Min-Yih Hsu via llvm-commits
• [llvm] [OpenMP] Remove dependency on LLVM include directory from DeviceRTL (PR #136359)   Shilei Tian via llvm-commits
• [llvm] [LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter (PR #136456)   LLVM Continuous Integration via llvm-commits
• [llvm] [OpenMP] Remove dependency on LLVM include directory from DeviceRTL (PR #136359)   Joseph Huber via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   Qinkun Bao via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Simon Pilgrim via llvm-commits
• [llvm] [BOLT] Do not return Def-ed registers from MCPlusBuilder::getUsedRegs (PR #129890)   Anatoly Trosinenko via llvm-commits
• [llvm] [OpenMP] Remove dependency on LLVM include directory from DeviceRTL (PR #136359)   Shilei Tian via llvm-commits
• [llvm] [OpenMP] Remove dependency on LLVM include directory from DeviceRTL (PR #136359)   Joseph Huber via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] 76ced7f - [AMDGPU] Insert readfirstlane in the function returns in sgpr. (#135326)   via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Pankaj Dwivedi via llvm-commits
• [llvm] [RISCV] Report error if Zilsd is used on RV32. (PR #136577)   Craig Topper via llvm-commits
• [llvm] [RISCV] Report error if Zilsd is used on RV32. (PR #136577)   via llvm-commits
• [llvm] [AMDGPU] Add SchedGroupBarrier::PACK for packed math (PR #132432)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Add SchedGroupBarrier::PACK for packed math (PR #132432)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Matt Arsenault via llvm-commits
• [llvm] [NFC][LLVM][TableGen] Eliminate inheritance from std::vector (PR #136573)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM][TableGen] Eliminate inheritance from std::vector (PR #136573)   via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] [llvm-mca][FeatureRequest] Itimeline graph, note source of delay for each instruction (PR #136423)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Report error if Zilsd is used on RV32. (PR #136577)   Alexander Richardson via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   LLVM Continuous Integration via llvm-commits
• [llvm] [PAC][InstCombine] Replace auth+sign with resign (PR #130807)   Anatoly Trosinenko via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   LLVM Continuous Integration via llvm-commits
• [llvm] [PAC][InstCombine] Replace auth+sign with resign (PR #130807)   Anatoly Trosinenko via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Pankaj Dwivedi via llvm-commits
• [llvm] Stop abusing Twine in DiagnosticInfo (PR #136371)   Justin Bogner via llvm-commits
• [llvm] [AMDGPU] Fix register class constraints for si-fold-operands pass when folding immediate into copies (PR #131387)   via llvm-commits
• [clang] [llvm] [RISCV] Add smcntrpmf extension (PR #136556)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Add smcntrpmf extension (PR #136556)   Craig Topper via llvm-commits
• [llvm] Stop abusing Twine in DiagnosticInfo (PR #136371)   Justin Bogner via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Min-Yih Hsu via llvm-commits
• [clang] [llvm] [RISCV] Add smcntrpmf extension (PR #136556)   Craig Topper via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Florian Mayer via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Florian Mayer via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Florian Mayer via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Florian Mayer via llvm-commits
• [llvm] [TTI] Constify BasicTTIImplBase::thisT() (PR #136575)   Sergei Barannikov via llvm-commits
• [llvm] [TTI] Constify BasicTTIImplBase::thisT() (PR #136575)   via llvm-commits
• [llvm] [TTI] Constify BasicTTIImplBase::thisT() (NFCI) (PR #136575)   Sergei Barannikov via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Jan Patrick Lehr via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Min-Yih Hsu via llvm-commits
• [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)   Rainer Orth via llvm-commits
• [llvm] [RISCV] Report error if Zilsd is used on RV32. (PR #136577)   Sam Elliott via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] optimize codegen for mad-mix in true16 (PR #124995)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] optimize codegen for mad-mix in true16 (PR #124995)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] optimize codegen for mad-mix in true16 (PR #124995)   Brox Chen via llvm-commits
• [clang] [llvm] [HLSL] Implement the `faceforward` intrinsic (PR #135878)   Farzon Lotfi via llvm-commits
• [llvm] [RISCV] Report error if Zilsd is used on RV64. (PR #136577)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Add Andes XAndesperf (Andes Performance) extension. (PR #135110)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add Andes XAndesperf (Andes Performance) extension. (PR #135110)   Jim Lin via llvm-commits
• [llvm] [OpenMP] Remove dependency on LLVM include directory from DeviceRTL (PR #136359)   Krzysztof Parzyszek via llvm-commits
• [llvm] b95ec24 - [SDAG] Handle insert_subvector in isKnownNeverNaN (#131989)   via llvm-commits
• [llvm] [SDAG] Handle insert_subvector in isKnownNeverNaN (PR #131989)   Jim Lin via llvm-commits
• [llvm] [libc][bazel] Add a helper library with all deps of generated headers. (PR #136582)   Alexey Samsonov via llvm-commits
• [llvm] [libc][bazel] Add a helper library with all deps of generated headers. (PR #136582)   via llvm-commits
• [llvm] AMDGPU: Fix the double rounding issue in v2f64 -> v2f16 conversion (PR #135659)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] optimize codegen for mad-mix in true16 (PR #124995)   Brox Chen via llvm-commits
• [llvm] AMDGPU: Fix the double rounding issue in v2f64 -> v2f16 conversion (PR #135659)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] optimize codegen for mad-mix in true16 (PR #124995)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] optimize codegen for mad-mix in true16 (PR #124995)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] optimize codegen for mad-mix in true16 (PR #124995)   Brox Chen via llvm-commits
• [llvm] [RISCV] Add ISel patterns for Xqcia instructions (PR #136548)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add ISel patterns for Xqcia instructions (PR #136548)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add ISel patterns for Xqcia instructions (PR #136548)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Min-Yih Hsu via llvm-commits
• [llvm] 5739a22 - [VPlan] Also duplicated scalar-steps when it enables sinking scalars. (#136021)   via llvm-commits
• [llvm] [VPlan] Also duplicated scalar-steps when it enables sinking scalars. (PR #136021)   Florian Hahn via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Min-Yih Hsu via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update GFX11Plus codegen test with true16 flag (PR #135078)   Brox Chen via llvm-commits
• [llvm] [Hexagon] Handle Call Operand vxi1 in Hexagon without HVX Enabled (PR #136546)   Ikhlas Ajbar via llvm-commits
• [llvm] [RISCV] Use ri.vzip2{a, b} for interleave2 if available (PR #136364)   Philip Reames via llvm-commits
• [llvm] [RISCV] Allow spilling to unused Zcmp Stack (PR #125959)   Craig Topper via llvm-commits
• [llvm] [RISCV] Lower SEW<=32 vector_deinterleave(2) via vunzip2{a, b} (PR #136463)   Philip Reames via llvm-commits
• [llvm] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] [RISCV] Lower SEW<=32 vector_deinterleave(2) via vunzip2{a, b} (PR #136463)   Philip Reames via llvm-commits
• [llvm] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] [RISCV] Lower SEW<=32 vector_deinterleave(2) via vunzip2{a, b} (PR #136463)   Philip Reames via llvm-commits
• [llvm] [RISCV] Lower SEW<=32 vector_deinterleave(2) via vunzip2{a, b} (PR #136463)   Philip Reames via llvm-commits
• [llvm] [VPlan] Add VPInstruction::StepVector and use it in VPWidenIntOrFpInductionRecipe (PR #129508)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPInstruction::StepVector and use it in VPWidenIntOrFpInductionRecipe (PR #129508)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPInstruction::StepVector and use it in VPWidenIntOrFpInductionRecipe (PR #129508)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPInstruction::StepVector and use it in VPWidenIntOrFpInductionRecipe (PR #129508)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPInstruction::StepVector and use it in VPWidenIntOrFpInductionRecipe (PR #129508)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPInstruction::StepVector and use it in VPWidenIntOrFpInductionRecipe (PR #129508)   Florian Hahn via llvm-commits
• [llvm] [DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks (PR #136205)   David Blaikie via llvm-commits
• [llvm] [RISCV] Allow spilling to unused Zcmp Stack (PR #125959)   Sam Elliott via llvm-commits
• [llvm] 3e5a9d9 - [VPlan] Rename setFlags -> applyFlags (NFC).   Florian Hahn via llvm-commits
• [clang] [llvm] [clang][OpenMP][SPIR-V] Fix addrspace of global constants (PR #134399)   Nick Sarnie via llvm-commits
• [llvm] [DirectX] legalize memset (PR #136244)   Farzon Lotfi via llvm-commits
• [llvm] [TTI] Constify BasicTTIImplBase::thisT() (NFCI) (PR #136575)   Matt Arsenault via llvm-commits
• [llvm] [DirectX] legalize memset (PR #136244)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] legalize memset (PR #136244)   Farzon Lotfi via llvm-commits
• [llvm] [RISCV] Allow spilling to unused Zcmp Stack (PR #125959)   Craig Topper via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [SLP]Model single unique value insert + shuffle as splat + select, where profitable (PR #136590)   Alexey Bataev via llvm-commits
• [llvm] [LLVM] Update handling of default runtime targets (PR #136591)   Joseph Huber via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   Florian Hahn via llvm-commits
• [llvm] [SLP]Model single unique value insert + shuffle as splat + select, where profitable (PR #136590)   via llvm-commits
• [llvm] [llvm] Construct SmallVector with iterator ranges (NFC) (PR #136460)   David Blaikie via llvm-commits
• [llvm] [SLP]Model single unique value insert + shuffle as splat + select, where profitable (PR #136590)   via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136024)   Florian Hahn via llvm-commits
• [llvm] [msan][NFCI] Add avx512fp16-{arith-intrinsics, arith-vl-intrinsics, intrinsics} tests (PR #136260)   Florian Mayer via llvm-commits
• [llvm] [SLP]Model single unique value insert + shuffle as splat + select, where profitable (PR #136590)   Alexey Bataev via llvm-commits
• [clang] [llvm] [clang][OpenMP][SPIR-V] Fix AS of globals and set the default AS to 4 (PR #135251)   Nick Sarnie via llvm-commits
• [clang] [llvm] [clang][OpenMP][SPIR-V] Fix AS of globals and set the default AS to 4 (PR #135251)   Nick Sarnie via llvm-commits
• [llvm] [RISCV] Allow spilling to unused Zcmp Stack (PR #125959)   Sam Elliott via llvm-commits
• [llvm] msm2 (PR #136593)   Prabhu Rajasekaran via llvm-commits
• [llvm] msm2 (PR #136593)   via llvm-commits
• [llvm] [SLP]Model single unique value insert + shuffle as splat + select, where profitable (PR #136590)   Philip Reames via llvm-commits
• [llvm] msm2 (PR #136593)   Prabhu Rajasekaran via llvm-commits
• [llvm] [NFC][llvm] Remove duplicate isUEFI check (PR #136593)   Prabhu Rajasekaran via llvm-commits
• [llvm] [NFC][llvm] Remove duplicate isUEFI check (PR #136593)   Prabhu Rajasekaran via llvm-commits
• [llvm] [TTI] Constify BasicTTIImplBase::thisT() (NFCI) (PR #136575)   Sergei Barannikov via llvm-commits
• [llvm] [SLP]Model single unique value insert + shuffle as splat + select, where profitable (PR #136590)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Model single unique value insert + shuffle as splat + select, where profitable (PR #136590)   Alexey Bataev via llvm-commits
• [llvm] 4c0ea47 - [RISCV] Report error if Zilsd is used on RV64. (#136577)   via llvm-commits
• [llvm] [RISCV] Report error if Zilsd is used on RV64. (PR #136577)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   via llvm-commits
• [llvm] [SLP]Model single unique value insert + shuffle as splat + select, where profitable (PR #136590)   Philip Reames via llvm-commits
• [llvm] [SLP]Model single unique value insert + shuffle as splat + select, where profitable (PR #136590)   Philip Reames via llvm-commits
• [llvm] [SLP]Model single unique value insert + shuffle as splat + select, where profitable (PR #136590)   Philip Reames via llvm-commits
• [llvm] [OpenMP] Remove dependency on LLVM include directory from DeviceRTL (PR #136359)   Joseph Huber via llvm-commits
• [llvm] [OpenMP] Remove dependency on LLVM include directory from DeviceRTL (PR #136359)   Joseph Huber via llvm-commits
• [llvm] 9968ba8 - Revert "[AMDGPU] Insert readfirstlane in the function returns in sgpr. (#135326)"   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Shilei Tian via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Hristo Hristov via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   LLVM Continuous Integration via llvm-commits
• [llvm] [TTI] Constify BasicTTIImplBase::thisT() (NFCI) (PR #136575)   Sergei Barannikov via llvm-commits
• [llvm] e0c1e23 - [TTI] Constify BasicTTIImplBase::thisT() (NFCI) (#136575)   via llvm-commits
• [llvm] [TTI] Constify BasicTTIImplBase::thisT() (NFCI) (PR #136575)   Sergei Barannikov via llvm-commits
• [llvm] [SLP]Model single unique value insert + shuffle as splat + select, where profitable (PR #136590)   Alexey Bataev via llvm-commits
• [llvm] [llvm] add LLVM_FRIEND_ABI macro to annotate friend function decls (PR #136595)   Andrew Rogers via llvm-commits
• [llvm] [SLP]Model single unique value insert + shuffle as splat + select, where profitable (PR #136590)   Alexey Bataev via llvm-commits
• [llvm] [LLVM] Update handling of default runtime targets (PR #136591)   Joseph Huber via llvm-commits
• [llvm] [MemProf] Merge callee clones as needed before assigning functions (PR #135702)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Merge callee clones as needed before assigning functions (PR #135702)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Merge callee clones as needed before assigning functions (PR #135702)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Merge callee clones as needed before assigning functions (PR #135702)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Merge callee clones as needed before assigning functions (PR #135702)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Merge callee clones as needed before assigning functions (PR #135702)   Snehasish Kumar via llvm-commits
• [llvm] [AArch64][GlobalISel] Perfect Shuffles (PR #106446)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Perfect Shuffles (PR #106446)   Matt Arsenault via llvm-commits
• [llvm] [InstSimplify] Fold `getelementptr inbounds null, idx -> null` (PR #130742)   Eli Friedman via llvm-commits
• [llvm] [OpenMP] Remove dependency on LLVM include directory from DeviceRTL (PR #136359)   Shilei Tian via llvm-commits
• [libc] [llvm] [libc] Fix passing the full runtime target for multilibs (PR #136208)   Joseph Huber via llvm-commits
• [libcxxabi] [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [llvm] [SLP]Model single unique value insert + shuffle as splat + select, where profitable (PR #136590)   Philip Reames via llvm-commits
• [libc] [llvm] [LLVM] Replace use of `LLVM_RUNTIMES_TARGET` with `LLVM_DEFAULT_TARGET_TRIPLE` (PR #136208)   Joseph Huber via llvm-commits
• [libc] [llvm] [LLVM] Replace use of `LLVM_RUNTIMES_TARGET` with `LLVM_DEFAULT_TARGET_TRIPLE` (PR #136208)   Joseph Huber via llvm-commits
• [libc] [llvm] [LLVM] Replace use of `LLVM_RUNTIMES_TARGET` with `LLVM_DEFAULT_TARGET_TRIPLE` (PR #136208)   Joseph Huber via llvm-commits
• [llvm] [TTI] Make all interface methods const (PR #136598)   Sergei Barannikov via llvm-commits
• [llvm] [OpenMP] Remove dependency on LLVM include directory from DeviceRTL (PR #136359)   Krzysztof Parzyszek via llvm-commits
• [libc] [llvm] [LLVM] Replace use of `LLVM_RUNTIMES_TARGET` with `LLVM_DEFAULT_TARGET_TRIPLE` (PR #136208)   Joseph Huber via llvm-commits
• [llvm] [TTI] Make all interface methods const (PR #136598)   Sergei Barannikov via llvm-commits
• [llvm] [RISCV] Simplify fixup kinds that force relocations (PR #136088)   Mariusz Borsa via llvm-commits
• [llvm] [TTI] Make all interface methods const (PR #136598)   Sergei Barannikov via llvm-commits
• [llvm] [TTI] Make all interface methods const (PR #136598)   via llvm-commits
• [llvm] [TTI] Make all interface methods const (PR #136598)   via llvm-commits
• [llvm] [TTI] Make all interface methods const (PR #136598)   via llvm-commits
• [llvm] [TTI] Make all interface methods const (PR #136598)   via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   via llvm-commits
• [llvm] [SLP]Prefer segmented/deinterleaved loads to strided and fix codegen (PR #135058)   Alexey Bataev via llvm-commits
• [libcxxabi] [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [llvm] [SelectionDAG] Prefer to use ATOMIC_LOAD extension type over getExtendForAtomicOps() in computeKnownBits/ComputeNumSignBits. (PR #136600)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Prefer to use ATOMIC_LOAD extension type over getExtendForAtomicOps() in computeKnownBits/ComputeNumSignBits. (PR #136600)   via llvm-commits
• [llvm] [TTI] Make all interface methods const (PR #136598)   Matt Arsenault via llvm-commits
• [llvm] 99e4b39 - [LLVM] Cleanup pass initialization for Analysis passes (#135858)   via llvm-commits
• [llvm] [LLVM] Cleanup pass initialization for Analysis passes (PR #135858)   Rahul Joshi via llvm-commits
• [llvm] [SelectionDAG] Prefer to use ATOMIC_LOAD extension type over getExtendForAtomicOps() in computeKnownBits/ComputeNumSignBits. (PR #136600)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16][MC] add fake16 error and promote test (PR #135984)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] add fake16 error and promote test (PR #135984)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] add fake16 error and promote test (PR #135984)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] add fake16 error and promote test (PR #135984)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] update mc test of a few vop1 t16 inst (PR #135588)   Brox Chen via llvm-commits
• [llvm] 1b4919d - [gn] port e1bb7f6ddec375   Nico Weber via llvm-commits
• [llvm] [WebAssembly] Enable a limited amount of stackification for debug code (PR #136510)   via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [llvm] [RISCV] Allow spilling to unused Zcmp Stack (PR #125959)   Craig Topper via llvm-commits
• [llvm] 8c83355 - [VPlan] Handle VPIRPhi in VPRecipeBase::isPhi (NFC).   Florian Hahn via llvm-commits
• [llvm] [LLVM] Cleanup pass initialization for Analysis passes (PR #135858)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Allow spilling to unused Zcmp Stack (PR #125959)   Craig Topper via llvm-commits
• [llvm] [WebAssembly] Enable a limited amount of stackification for debug code (PR #136510)   via llvm-commits
• [llvm] [llvm] Use llvm::less_first and llvm::less_second (NFC) (PR #136272)   Vladimir Vereschaka via llvm-commits
• [llvm] [WebAssembly] Enable a limited amount of stackification for debug code (PR #136510)   via llvm-commits
• [llvm] [WebAssembly] Enable a limited amount of stackification for debug code (PR #136510)   via llvm-commits
• [llvm] c1049e4 - [AMDGPU] Correct VOP3P encoding. NFC. (#136005)   via llvm-commits
• [llvm] [AMDGPU] Correct VOP3P encoding. NFC. (PR #136005)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [Hexagon] Handle Call Operand vxi1 in Hexagon without HVX Enabled (PR #136546)   via llvm-commits
• [llvm] [Hexagon] Handle Call Operand vxi1 in Hexagon without HVX Enabled (PR #136546)   via llvm-commits
• [llvm] [Hexagon] Handle Call Operand vxi1 in Hexagon without HVX Enabled (PR #136546)   via llvm-commits
• [llvm] [Hexagon] Handle Call Operand vxi1 in Hexagon without HVX Enabled (PR #136546)   via llvm-commits
• [llvm] [Hexagon] Handle Call Operand vxi1 in Hexagon without HVX Enabled (PR #136546)   via llvm-commits
• [llvm] [libc][bazel] Add a helper library with all deps of generated headers. (PR #136582)   Michael Jones via llvm-commits
• [llvm] [OpenMP] Remove dependency on LLVM include directory from DeviceRTL (PR #136359)   Joseph Huber via llvm-commits
• [llvm] [OpenMP] Remove dependency on LLVM include directory from DeviceRTL (PR #136359)   Joseph Huber via llvm-commits
• [llvm] [OpenMP] Remove dependency on LLVM include directory from DeviceRTL (PR #136359)   Joseph Huber via llvm-commits
• [llvm] [llvm] add LLVM_FRIEND_ABI macro to annotate friend function decls (PR #136595)   Andrew Rogers via llvm-commits
• [clang] [llvm] [SROA] Vector promote some memsets (PR #133301)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   Florian Hahn via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Support for DLL export (PR #136014)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Support for DLL export (PR #136014)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Support for DLL export (PR #136014)   Andrew Rogers via llvm-commits
• [llvm] [RISCV] Simplify fixup kinds that force relocations (PR #136088)   Mariusz Borsa via llvm-commits
• [llvm] [AMDGPU] Correct VOP3P encoding. NFC. (PR #136005)   LLVM Continuous Integration via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [llvm] [libc][bazel] Add a helper library with all deps of generated headers. (PR #136582)   Alexey Samsonov via llvm-commits
• [llvm] [libc][bazel] Add a helper library with all deps of generated headers. (PR #136582)   Michael Jones via llvm-commits
• [llvm] [libc][bazel] Add a helper library with all deps of generated headers. (PR #136582)   Alexey Samsonov via llvm-commits
• [llvm] AMDGPU: Add global-isel checks and rename fptrunc.v2f16.fpmath.ll (PR #136609)   Changpeng Fang via llvm-commits
• [flang] [llvm] [flang][openacc] Make async clause behavior homogenous (PR #136610)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] AMDGPU: Add global-isel checks and rename fptrunc.v2f16.fpmath.ll (PR #136609)   via llvm-commits
• [llvm] 704fc65 - [SelectionDAG] Prefer to use ATOMIC_LOAD extension type over getExtendForAtomicOps() in computeKnownBits/ComputeNumSignBits. (#136600)   via llvm-commits
• [llvm] [SelectionDAG] Prefer to use ATOMIC_LOAD extension type over getExtendForAtomicOps() in computeKnownBits/ComputeNumSignBits. (PR #136600)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Prefer to use ATOMIC_LOAD extension type over getExtendForAtomicOps() in computeKnownBits/ComputeNumSignBits. (PR #136600)   Craig Topper via llvm-commits
• [flang] [llvm] [flang][openacc] Make async clause behavior homogenous (PR #136610)   via llvm-commits
• [flang] [llvm] [flang][openacc] Make async clause behavior homogenous (PR #136610)   via llvm-commits
• [llvm] [PowerPC] Intrinsics and tests for dmr insert/extract (PR #135653)   via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   Eli Friedman via llvm-commits
• [llvm] [MemProf] Merge callee clones as needed before assigning functions (PR #135702)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Merge callee clones as needed before assigning functions (PR #135702)   Teresa Johnson via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Sumanth Gundapaneni via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Sumanth Gundapaneni via llvm-commits
• [llvm] [MemProf] Merge callee clones as needed before assigning functions (PR #135702)   Teresa Johnson via llvm-commits
• [llvm] [llvm] Use llvm::less_first and llvm::less_second (NFC) (PR #136272)   Kazu Hirata via llvm-commits
• [llvm] [DirectX] Implement the ForwardHandleAccesses pass (PR #135378)   Chris B via llvm-commits
• [llvm] aa5cdc0 - [msan][NFCI] Add avx512fp16-{arith-intrinsics, arith-vl-intrinsics, intrinsics} tests (#136260)   via llvm-commits
• [llvm] [msan][NFCI] Add avx512fp16-{arith-intrinsics, arith-vl-intrinsics, intrinsics} tests (PR #136260)   Thurston Dang via llvm-commits
• [llvm] [MemProf] Merge callee clones as needed before assigning functions (PR #135702)   Teresa Johnson via llvm-commits
• [llvm] [AMDGPU] Partially revert my llvm::less_second patch (PR #136615)   Kazu Hirata via llvm-commits
• [llvm] [AMDGPU] Partially revert my llvm::less_second patch (PR #136615)   via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space. (PR #135444)   Artem Belevich via llvm-commits
• [llvm] [llvm] Use llvm::less_first and llvm::less_second (NFC) (PR #136272)   Kazu Hirata via llvm-commits
• [llvm] [mlir][SMT] update Bazel configuration to match 697aa99 (PR #136616)   via llvm-commits
• [llvm] [mlir][SMT] update Bazel configuration to match 697aa99 (PR #136616)   via llvm-commits
• [flang] [llvm] [flang][openacc] Make async clause behavior homogenous (PR #136610)   Erich Keane via llvm-commits
• [llvm] [NVPTX] add test case for vector reduction intrinsics (PR #136381)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] add test case for vector reduction intrinsics (PR #136381)   Artem Belevich via llvm-commits
• [llvm] [mlir][SMT] update Bazel configuration to match 697aa99 (PR #136616)   Pranav Kant via llvm-commits
• [llvm] [llvm] Construct SmallVector with iterator ranges (NFC) (PR #136460)   Kazu Hirata via llvm-commits
• [clang] [llvm] [Clang][C++23] Core language changes from P1467R9 extended floating-point types and standard names. (PR #78503)   Shafik Yaghmour via llvm-commits
• [llvm] [msan][NFCI] Add avx512fp16-{arith-intrinsics, arith-vl-intrinsics, intrinsics} tests (PR #136260)   LLVM Continuous Integration via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Sumanth Gundapaneni via llvm-commits
• [llvm] [AMDGPU] Partially revert my llvm::less_second patch (PR #136615)   Jakub Kuderski via llvm-commits
• [llvm] [llvm] add LLVM_FRIEND_ABI macro for friend function decls (PR #136595)   Andrew Rogers via llvm-commits
• [llvm] [AMDGPU] Partially revert my llvm::less_second patch (PR #136615)   Kazu Hirata via llvm-commits
• [llvm] [mlir][SMT] update Bazel configuration to match 697aa99 (PR #136616)   Pranav Kant via llvm-commits
• [llvm] [mlir][SMT] update Bazel configuration to match 697aa99 (PR #136616)   via llvm-commits
• [llvm] [SystemZ] Handle f16 load positive/negative/complement without libcalls. (PR #136286)   Trevor Gross via llvm-commits
• [llvm] [PowerPC] Intrinsics and tests for dmr insert/extract (PR #135653)   Maryam Moghadas via llvm-commits
• [llvm] [X86] SimplifyDemandedBitsForTargetNode - add handling for X86ISD::FAND/FOR (PR #136618)   Simon Pilgrim via llvm-commits
• [llvm] [X86] SimplifyDemandedBitsForTargetNode - add handling for X86ISD::FAND/FOR (PR #136618)   via llvm-commits
• [llvm] a945f59 - AMDGPU: Add global-isel checks and rename fptrunc.v2f16.fpmath.ll (#136609)   via llvm-commits
• [llvm] AMDGPU: Add global-isel checks and rename fptrunc.v2f16.fpmath.ll (PR #136609)   Changpeng Fang via llvm-commits
• [llvm] [msan] Handle x86.avx512fp16.{add, sub.mul, div, min, max}.ph.512 (PR #136619)   Thurston Dang via llvm-commits
• [llvm] [msan] Handle x86.avx512fp16.{add, sub.mul, div, min, max}.ph.512 (PR #136619)   via llvm-commits
• [llvm] [msan] Handle x86.avx512fp16.{add, sub.mul, div, min, max}.ph.512 (PR #136619)   via llvm-commits
• [llvm] [PowerPC] Add dense math bfloat16 floating-point outer-product accumulate to DMR instructions (PR #133109)   Maryam Moghadas via llvm-commits
• [llvm] [LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter (PR #136456)   Alan Phipps via llvm-commits
• [llvm] [PowerPC] Add dense math bfloat16 floating-point outer-product accumulate to DMR instructions (PR #133109)   Maryam Moghadas via llvm-commits
• [llvm] [LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter (PR #136456)   Craig Topper via llvm-commits
• [llvm] 3ceb3d9 - [flang][openacc] Make async clause behavior homogenous (#136610)   via llvm-commits
• [flang] [llvm] [flang][openacc] Make async clause behavior homogenous (PR #136610)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [mlir] Emitc.convert (PR #136621)   Mircea Trofin via llvm-commits
• [llvm] [MemProf] Merge callee clones as needed before assigning functions (PR #135702)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Merge callee clones as needed before assigning functions (PR #135702)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Merge callee clones as needed before assigning functions (PR #135702)   Teresa Johnson via llvm-commits
• [llvm] [mlir] Emitc.convert (PR #136621)   via llvm-commits
• [llvm] [mlir] Emitc.convert (PR #136621)   via llvm-commits
• [llvm] [AMDGPU] Partially revert my llvm::less_second patch (PR #136615)   Jakub Kuderski via llvm-commits
• [llvm] [AMDGPU] Partially revert my llvm::less_second patch (PR #136615)   Jakub Kuderski via llvm-commits
• [llvm] [AMDGPU] Partially revert my llvm::less_second patch (PR #136615)   Kazu Hirata via llvm-commits
• [llvm] 515564a - [AMDGPU] Partially revert my llvm::less_second patch (#136615)   via llvm-commits
• [llvm] [AMDGPU] Partially revert my llvm::less_second patch (PR #136615)   Kazu Hirata via llvm-commits
• [llvm] [DirectX] Allow llvm lifetime intrinsics to pass on to the DirectX backend (PR #136622)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Allow llvm lifetime intrinsics to pass on to the DirectX backend (PR #136622)   via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Andrew Rogers via llvm-commits
• [llvm] [llvm] add LLVM_FRIEND_ABI macro for friend function decls (PR #136595)   Andrew Rogers via llvm-commits
• [llvm] [MemProf] Merge callee clones as needed before assigning functions (PR #135702)   Snehasish Kumar via llvm-commits
• [llvm] [llvm] add LLVM_FRIEND_ABI macro for friend function decls (PR #136595)   via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space. (PR #135444)   via llvm-commits
• [llvm] [llvm] add LLVM_FRIEND_ABI macro for friend function decls (PR #136595)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Andrew Rogers via llvm-commits
• [llvm] [llvm] revisions to export annotation macros to avoid compiler warnings (PR #135995)   Andrew Rogers via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space. (PR #135444)   via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Artem Belevich via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Artem Belevich via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Artem Belevich via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space. (PR #135444)   via llvm-commits
• [lld] 8389d6f - [lld] Merge equivalent symbols found during ICF (#134342)   via llvm-commits
• [lld] [lld] Merge equivalent symbols found during ICF (PR #134342)   Pranav Kant via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space. (PR #135444)   via llvm-commits
• [llvm] [NVPTX] Improve kernel byval parameter lowering (PR #136008)   Artem Belevich via llvm-commits
• [llvm] 92c0b42 - [NVPTX] add test case for vector reduction intrinsics (#136381)   via llvm-commits
• [llvm] [NVPTX] add test case for vector reduction intrinsics (PR #136381)   Princeton Ferro via llvm-commits
• [lld] [lld] NFC. Rename function to better reflect their implementation (PR #136625)   Pranav Kant via llvm-commits
• [lld] [lld] NFC. Rename function to better reflect their implementation (PR #136625)   via llvm-commits
• [lld] [lld] NFC. Rename function to better reflect their implementation (PR #136625)   via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space. (PR #135444)   via llvm-commits
• [lld] [lld] NFC. Rename function to better reflect their implementation (PR #136625)   via llvm-commits
• [lld] [lld] NFC. Rename function to better reflect their implementation (PR #136625)   Pranav Kant via llvm-commits
• [lld] [lld] NFC. Rename function to better reflect its implementation (PR #136625)   Pranav Kant via llvm-commits
• [lld] [lld] Merge equivalent symbols found during ICF (PR #134342)   Pranav Kant via llvm-commits
• [llvm] [DirectX] Allow llvm lifetime intrinsics to pass on to the DirectX backend (PR #136622)   Chris B via llvm-commits
• [llvm] [DirectX] legalize memset (PR #136244)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Allow llvm lifetime intrinsics to pass on to the DirectX backend (PR #136622)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Allow llvm lifetime intrinsics to pass on to the DirectX backend (PR #136622)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] legalize memset (PR #136244)   Farzon Lotfi via llvm-commits
• [llvm] c40d3a4 - [PowerPC] Add dense math bfloat16 floating-point outer-product accumulate to DMR instructions (#133109)   via llvm-commits
• [llvm] [PowerPC] Add dense math bfloat16 floating-point outer-product accumulate to DMR instructions (PR #133109)   Maryam Moghadas via llvm-commits
• [llvm] [PowerPC] Add dense math half-precision floating-point outer-product accumulate to DMR instructions (PR #133272)   Maryam Moghadas via llvm-commits
• [llvm] [DirectX] legalize memset (PR #136244)   Farzon Lotfi via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Alex MacLean via llvm-commits
• [llvm] [DirectX] legalize memset (PR #136244)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] legalize memset (PR #136244)   Farzon Lotfi via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/ADT for DLL export (PR #136629)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/ADT for DLL export (PR #136629)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/ADT for DLL export (PR #136629)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Andrew Rogers via llvm-commits
• [llvm] [llvm] Ensure propagated constants in the vtable are aligned (PR #136630)   via llvm-commits
• [llvm] [llvm] Ensure propagated constants in the vtable are aligned (PR #136630)   via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/ADT for DLL export (PR #136629)   via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/ADT for DLL export (PR #136629)   Andrew Rogers via llvm-commits
• [llvm] [NVPTX] Improve kernel byval parameter lowering (PR #136008)   Alex MacLean via llvm-commits
• [llvm] 56910a8 - [NVPTX] Improve kernel byval parameter lowering (#136008)   via llvm-commits
• [llvm] [NVPTX] Improve kernel byval parameter lowering (PR #136008)   Alex MacLean via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space. (PR #135444)   via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Durgadoss R via llvm-commits
• [llvm] [llvm] Ensure propagated constants in the vtable are aligned (PR #136630)   via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   via llvm-commits
• [llvm] [AMDGPU] Added hot-block-rematerialize pass (PR #136631)   Adam Yang via llvm-commits
• [llvm] [LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter (PR #136456)   Rahul Joshi via llvm-commits
• [llvm] [AMDGPU] Added hot-block-rematerialize pass (PR #136631)   via llvm-commits
• [llvm] [AMDGPU] Added hot-block-rematerialize pass (PR #136631)   via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   Eli Friedman via llvm-commits
• [llvm] [llvm] Ensure propagated constants in the vtable are aligned (PR #136630)   Peter Collingbourne via llvm-commits
• [llvm] [llvm] Ensure propagated constants in the vtable are aligned (PR #136630)   Peter Collingbourne via llvm-commits
• [llvm] [llvm] add LLVM_FRIEND_ABI macro for friend function decls (PR #136595)   Saleem Abdulrasool via llvm-commits
• [llvm] [LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter (PR #136456)   LLVM Continuous Integration via llvm-commits
• [llvm] [LLVM][TableGen] Fix VarlenDecoder.td to not used fixed opcode values (PR #136632)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter (PR #136456)   Rahul Joshi via llvm-commits
• [llvm] [AMDGPU] Added hot-block-rematerialize pass (PR #136631)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Added hot-block-rematerialize pass (PR #136631)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Added hot-block-rematerialize pass (PR #136631)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Added hot-block-rematerialize pass (PR #136631)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Added hot-block-rematerialize pass (PR #136631)   Shilei Tian via llvm-commits
• [llvm] [llvm] Ensure propagated constants in the vtable are aligned (PR #136630)   via llvm-commits
• [llvm] [AA] Move Target Specific AA before BasicAA (PR #125965)   via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [llvm] add LLVM_FRIEND_ABI macro for friend function decls (PR #136595)   Andrew Rogers via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [msan] Handle x86.avx512fp16.{add, sub.mul, div, min, max}.ph.512 (PR #136619)   Florian Mayer via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space. (PR #135444)   via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [LV]Enable non-power-of-2 store-load forwarding distance in predicated DataWithEVL vectorization mode (PR #100755)   Alexey Bataev via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space. (PR #135444)   via llvm-commits
• [compiler-rt] 53e62c6 - [compiler-rt][profile][tests][NFC] Avoid using a.out from PATH (#136465)   via llvm-commits
• [compiler-rt] [compiler-rt][profile][tests][NFC] Avoid using a.out from PATH (PR #136465)   Hubert Tong via llvm-commits
• [llvm] d2fedd6 - [NVPTX] mark unused variable introduced by 56910a8b1b302ebf37e9d30bd200091fd23dc232 [NFC]   Augie Fackler via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] d1f4f52 - [msan] Handle x86.avx512fp16.{add,sub.mul,div,min,max}.ph.512 (#136619)   via llvm-commits
• [llvm] [msan] Handle x86.avx512fp16.{add, sub.mul, div, min, max}.ph.512 (PR #136619)   Thurston Dang via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   via llvm-commits
• [llvm] a1db2c6 - [RISCV] Remove duplicate call to MFI.getStackID(FI). NFC   Craig Topper via llvm-commits
• [libc] [llvm] [LLVM] Replace use of `LLVM_RUNTIMES_TARGET` with `LLVM_DEFAULT_TARGET_TRIPLE` (PR #136208)   Joseph Huber via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Artem Belevich via llvm-commits
• [llvm] 2cdf474 - [MemProf] Merge callee clones as needed before assigning functions (#135702)   via llvm-commits
• [llvm] [MemProf] Merge callee clones as needed before assigning functions (PR #135702)   Teresa Johnson via llvm-commits
• [llvm] [llvm] add LLVM_FRIEND_ABI macro for friend function decls (PR #136595)   Andrew Rogers via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Jeffrey Byrnes via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   Mateusz Mikuła via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   via llvm-commits
• [llvm] [LLVM][TableGen] Fix VarlenDecoder.td to not used fixed opcode values (PR #136632)   Min-Yih Hsu via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   YunQiang Su via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Florian Mayer via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Florian Mayer via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Florian Mayer via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   YunQiang Su via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Jeffrey Byrnes via llvm-commits
• [llvm] LowerTypeTests: Switch to emitting one inline asm call per jump table entry. (PR #136265)   Florian Mayer via llvm-commits
• [llvm] LowerTypeTests: Switch to emitting one inline asm call per jump table entry. (PR #136265)   Florian Mayer via llvm-commits
• [llvm] [NFC] Fixed test case fail caused by the patch [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode #122741 (PR #136636)   zhijian lin via llvm-commits
• [llvm] [NFC] Fixed test case fail caused by the patch [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode #122741 (PR #136636)   via llvm-commits
• [llvm] LowerTypeTests: Switch to emitting one inline asm call per jump table entry. (PR #136265)   Peter Collingbourne via llvm-commits
• [llvm] [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #122741)   zhijian lin via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   YunQiang Su via llvm-commits
• [llvm] [LLVM][TableGen] Fix VarlenDecoder.td to not used fixed opcode values (PR #136632)   Rahul Joshi via llvm-commits
• [llvm] 2b44eb9 - [LLVM][TableGen] Fix VarlenDecoder.td to not used fixed opcode values (#136632)   via llvm-commits
• [llvm] [LLVM][TableGen] Fix VarlenDecoder.td to not used fixed opcode values (PR #136632)   Rahul Joshi via llvm-commits
• [llvm] SelectionDAG: Fix isKnownNeverNaN for Min and Max (PR #135742)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Fix isKnownNeverNaN for Min and Max (PR #135742)   YunQiang Su via llvm-commits
• [llvm] c7ea01b - LowerTypeTests: Switch to emitting one inline asm call per jump table entry.   via llvm-commits
• [llvm] LowerTypeTests: Switch to emitting one inline asm call per jump table entry. (PR #136265)   Peter Collingbourne via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [clang] [llvm] [WIP] Correct lowering of `fp128` intrinsics (PR #76558)   Trevor Gross via llvm-commits
• [llvm] RISC-V: Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)   YunQiang Su via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space. (PR #135444)   Alex MacLean via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [llvm] LowerTypeTests: Switch to emitting one inline asm call per jump table entry. (PR #136265)   Vitaly Buka via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   Shilei Tian via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   Shilei Tian via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   Shilei Tian via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   Shilei Tian via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   Shilei Tian via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   Shilei Tian via llvm-commits
• [llvm] RISC-V: Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)   YunQiang Su via llvm-commits
• [llvm] 698cd48 - [RISCV] Fix Lsb > Msb case in (sra (sext_inreg X, _), C) for th.ext (#136287)   via llvm-commits
• [llvm] [RISCV] Fix Lsb > Msb case in (sra (sext_inreg X, _), C) for th.ext (PR #136287)   Jim Lin via llvm-commits
• [llvm] [NVPTX] Add support for PTX ISA v8.8 (PR #136639)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] Add support for PTX ISA v8.8 (PR #136639)   via llvm-commits
• [llvm] ddb8870 - [RISCV] Remove the FIXME for using sraiw+and. NFC.   Jim Lin via llvm-commits
• [llvm] Reapply "[SPARC] Use umulxhi to do extending 64x64->128 multiply when we have VIS3" (#135897) (PR #136475)   via llvm-commits
• [lld] [lld][ICF] Prevent merging two sections when they point to non-globals (PR #136641)   Pranav Kant via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   Alex MacLean via llvm-commits
• [lld] [lld][ICF] Prevent merging two sections when they point to non-globals (PR #136641)   via llvm-commits
• [lld] [lld][ICF] Prevent merging two sections when they point to non-globals (PR #136641)   via llvm-commits
• [lld] [lld][ICF] Prevent merging two sections when they point to non-globals (PR #136641)   Pranav Kant via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [clang] [llvm] [RISCV] Add smcntrpmf extension (PR #136556)   Jim Lin via llvm-commits
• [lld] WIP --- [lld][ICF] Prevent merging two sections when they point to non-globals (PR #136641)   Pranav Kant via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [llvm] [ConstraintElim] Add facts about non-poison intrinsics on demand (PR #136558)   Yingwei Zheng via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] SelectionDAG: Fix isKnownNeverNaN for Min and Max (PR #135742)   YunQiang Su via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [lldb][LoongArch] Fix expression function call failure (PR #136563)   Lu Weining via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)   via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [lld] WIP --- [lld][ICF] Prevent merging two sections when they point to non-globals (PR #136641)   Pranav Kant via llvm-commits
• [lld] [lld][ICF] Prevent merging two sections when they point to non-globals (PR #136641)   Pranav Kant via llvm-commits
• [lld] [lld][ICF] Prevent merging two sections when they point to non-globals (PR #136641)   Pranav Kant via llvm-commits
• [lld] [lld] Merge equivalent symbols found during ICF (PR #134342)   Pranav Kant via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Ikhlas Ajbar via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Ikhlas Ajbar via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [llvm] Ws lend (PR #136643)   via llvm-commits
• [llvm] Ws lend (PR #136643)   via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [TTI] Make all interface methods const (PR #136598)   Sergei Barannikov via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle separate loops (PR #128782)   Alireza Torabian via llvm-commits
• [llvm] [TTI] Make all interface methods const (NFCI) (PR #136598)   Sergei Barannikov via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle separate loops (PR #128782)   Alireza Torabian via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle separate loops (PR #128782)   Alireza Torabian via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle separate loops (PR #128782)   Alireza Torabian via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle separate loops (PR #128782)   Alireza Torabian via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle separate loops (PR #128782)   Alireza Torabian via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle separate loops (PR #128782)   Alireza Torabian via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle separate loops (PR #128782)   Alireza Torabian via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle separate loops (PR #128782)   Alireza Torabian via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] [lldb][LoongArch] Fix expression function call failure (PR #136563)   via llvm-commits
• [llvm] Reapply "[SPARC] Use umulxhi to do extending 64x64->128 multiply when we have VIS3" (#135897) (PR #136475)   Sergei Barannikov via llvm-commits
• [llvm] [lldb][LoongArch] Fix expression function call failure (PR #136563)   via llvm-commits
• [llvm] [InstCombine] Preserve signbit semantics of NaN with fold to fabs (PR #136648)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Preserve signbit semantics of NaN with fold to fabs (PR #136648)   via llvm-commits
• [llvm] 0014b49 - [TTI] Make all interface methods const (NFCI) (#136598)   via llvm-commits
• [llvm] [TTI] Make all interface methods const (NFCI) (PR #136598)   Sergei Barannikov via llvm-commits
• [clang] [llvm] [RISCV] Add smcntrpmf extension (PR #136556)   Liao Chunyu via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Shilei Tian via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Shilei Tian via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Shilei Tian via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Shilei Tian via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Shilei Tian via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   via llvm-commits
• [llvm] [LLVM] Pass correct target to LLVM_RUNTIMES_TARGET for runtimes (PR #136572)   Joseph Huber via llvm-commits
• [libc] [llvm] [LLVM] Replace use of `LLVM_RUNTIMES_TARGET` with `LLVM_DEFAULT_TARGET_TRIPLE` (PR #136208)   Joseph Huber via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Shilei Tian via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Shilei Tian via llvm-commits
• [llvm] [SLP]Prefer segmented/deinterleaved loads to strided and fix codegen (PR #135058)   via llvm-commits
• [llvm] [SDAG] Make Select-with-Identity-Fold More Flexible; NFC (PR #136554)   Marius Kamp via llvm-commits
• [llvm] [X86] Distribute Certain Bitwise Operations over SELECT (PR #136555)   Marius Kamp via llvm-commits
• [llvm] [SDAG] Make Select-with-Identity-Fold More Flexible; NFC (PR #136554)   Marius Kamp via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [SDAG] Make Select-with-Identity-Fold More Flexible; NFC (PR #136554)   Marius Kamp via llvm-commits
• [llvm] [InstCombine] Preserve signbit semantics of NaN with fold to fabs (PR #136648)   Yingwei Zheng via llvm-commits
• [llvm] [SelectionDAG] Make the FoldingSet profile in getAtomic match AddNodeIDCustom. (PR #136651)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Make the FoldingSet profile in getAtomic match AddNodeIDCustom. (PR #136651)   via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [clang] [llvm] [RISCV] Add smcntrpmf extension (PR #136556)   Craig Topper via llvm-commits
• [llvm] 9e26c79 - [RISCV] Add smcntrpmf extension (#136556)   via llvm-commits
• [clang] [llvm] [RISCV] Add smcntrpmf extension (PR #136556)   Liao Chunyu via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] [SelectionDAG] Make the FoldingSet profile in getAtomic match AddNodeIDCustom. (PR #136651)   Sergei Barannikov via llvm-commits
• [llvm] [X86][SelectionDAG] Fix the Gather's base and index by modifying the Scale value (PR #134979)   Rohit Aggarwal via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   via llvm-commits
• [libc] [llvm] [LLVM] Replace use of `LLVM_RUNTIMES_TARGET` with `LLVM_DEFAULT_TARGET_TRIPLE` (PR #136208)   Petr Hosek via llvm-commits
• [libc] [llvm] [LLVM] Replace use of `LLVM_RUNTIMES_TARGET` with `LLVM_DEFAULT_TARGET_TRIPLE` (PR #136208)   Petr Hosek via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   via llvm-commits
• [llvm] [NVPTX] Add support for PTX ISA v8.8 (PR #136639)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] Add support for PTX ISA v8.8 (PR #136639)   Princeton Ferro via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [lldb][LoongArch] Fix expression function call failure (PR #136563)   Lu Weining via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Christudasan Devadasan via llvm-commits
• [llvm] [NVPTX] Add support for PTX ISA v8.8 (PR #136639)   Durgadoss R via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] Add support for PTX ISA v8.8 (PR #136639)   Durgadoss R via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] 497382e - [SelectionDAG] Make the FoldingSet profile in getAtomic match AddNodeIDCustom. (#136651)   via llvm-commits
• [llvm] [SelectionDAG] Make the FoldingSet profile in getAtomic match AddNodeIDCustom. (PR #136651)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Pass LoadExtType when ATOMIC_LOAD is created. (PR #136653)   Craig Topper via llvm-commits
• [llvm] [CodeGen][NPM] Do not add required passes to pipeline (PR #135752)   Akshat Oke via llvm-commits
• [llvm] [SelectionDAG] Pass LoadExtType when ATOMIC_LOAD is created. (PR #136653)   via llvm-commits
• [llvm] [SelectionDAG] Pass LoadExtType when ATOMIC_LOAD is created. (PR #136653)   via llvm-commits
• [llvm] [SelectionDAG] Pass LoadExtType when ATOMIC_LOAD is created. (PR #136653)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [llvm] [CodeGen][NPM] Do not add required passes to pipeline (PR #135752)   Akshat Oke via llvm-commits
• [llvm] [CodeGen][NPM] Do not add required passes to pipeline (PR #135752)   via llvm-commits
• [llvm] [SelectionDAG] Pass LoadExtType when ATOMIC_LOAD is created. (PR #136653)   Craig Topper via llvm-commits
• [llvm] [InstCombine] fold u <= (u <= (unsigned)b) into (u <= (unsigned)b). (PR #136654)   via llvm-commits
• [llvm] [InstCombine] fold u <= (u <= (unsigned)b) into (u <= (unsigned)b). (PR #136654)   via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [CodeGen][NPM] Support generic regalloc-npm option (PR #135149)   Akshat Oke via llvm-commits
• [llvm] [CodeGen][NPM] Support generic regalloc-npm option (PR #135149)   Akshat Oke via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space. (PR #135444)   via llvm-commits
• [llvm] [CodeGen][NPM] Support generic regalloc-npm option (PR #135149)   Akshat Oke via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] [SelectionDAG] Pass LoadExtType when ATOMIC_LOAD is created. (PR #136653)   Sergei Barannikov via llvm-commits
• [llvm] [TTI] Fix discrepancies between interface and implementations (NFCI) (PR #136655)   Sergei Barannikov via llvm-commits
• [llvm] [AMDGPU] Do not fold COPY with implicit operands (PR #136003)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] SIInstrInfo: Fix resultDependsOnExec for VOPC instructions (PR #134629)   Frederik Harwath via llvm-commits
• [llvm] [SelectionDAG] Make the FoldingSet profile in getAtomic match AddNodeIDCustom. (PR #136651)   LLVM Continuous Integration via llvm-commits
• [llvm] [TTI] Fix discrepancies between interface and implementations (NFCI) (PR #136655)   Sergei Barannikov via llvm-commits
• [llvm] [TTI] Fix discrepancies in prototypes between interface and implementations (NFCI) (PR #136655)   Sergei Barannikov via llvm-commits
• [llvm] [TTI] Fix discrepancies in prototypes between interface and implementations (NFCI) (PR #136655)   Sergei Barannikov via llvm-commits
• [llvm] [TTI] Fix discrepancies in prototypes between interface and implementations (NFCI) (PR #136655)   via llvm-commits
• [llvm] [CodeGen][NPM] Support generic regalloc-npm option (PR #135149)   Akshat Oke via llvm-commits
• [llvm] [NVPTX] Add mix precision arith intrinsics (PR #136657)   Rajat Bajpai via llvm-commits
• [llvm] [CodeGen][NPM] Support generic regalloc-npm option (PR #135149)   Akshat Oke via llvm-commits
• [llvm] [NVPTX] Add mix precision arith intrinsics (PR #136657)   via llvm-commits
• [llvm] [NVPTX] Add mix precision arith intrinsics (PR #136657)   Rajat Bajpai via llvm-commits
• [llvm] [NFC] Fixed test case fail caused by the patch [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode #122741 (PR #136636)   Phoebe Wang via llvm-commits
• [llvm] [NFC] Fixed test case fail caused by the patch [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode #122741 (PR #136636)   Matt Arsenault via llvm-commits
• [llvm] [NFC] Fixed test case fail caused by the patch [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode #122741 (PR #136636)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Add ISel patterns for Xqcia instructions (PR #136548)   via llvm-commits
• [llvm] [RISCV] Add ISel patterns for Xqcia instructions (PR #136548)   via llvm-commits
• [llvm] [NFC] Fixed test case fail caused by the patch [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode #122741 (PR #136636)   Phoebe Wang via llvm-commits
• [llvm] 784dc16 - [LangRef][IR] Fix default AS documentation for allocas without explicit AS (#135942)   via llvm-commits
• [llvm] [LangRef][IR] Fix default AS documentation for allocas without explicit AS (PR #135942)   Fabian Ritter via llvm-commits
• [llvm] [RISCV] Add ISel patterns for Xqcia instructions (PR #136548)   Sudharsan Veeravalli via llvm-commits
• [llvm] [X86] SimplifyDemandedBitsForTargetNode - add handling for X86ISD::FAND/FOR (PR #136618)   Phoebe Wang via llvm-commits
• [llvm] [CodeGen][NPM] Do not add required passes to pipeline (PR #135752)   Akshat Oke via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Hristo Hristov via llvm-commits
• [llvm] [SelectionDAG] Pass LoadExtType when ATOMIC_LOAD is created. (PR #136653)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Added hot-block-rematerialize pass (PR #136631)   Stanislav Mekhanoshin via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Feng Zou via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   via llvm-commits
• [llvm] [X86] SimplifyDemandedBitsForTargetNode - add handling for X86ISD::FAND/FOR (PR #136618)   Phoebe Wang via llvm-commits
• [llvm] [NVPTX] Add fma mix precision intrinsics (PR #136661)   Rajat Bajpai via llvm-commits
• [llvm] [NVPTX] Add fma mix precision intrinsics (PR #136661)   Rajat Bajpai via llvm-commits
• [llvm] [NVPTX] Add fma mix precision intrinsics (PR #136661)   via llvm-commits
• [llvm] [AMDGPU] Added hot-block-rematerialize pass (PR #136631)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [RISCV] Sink vp.splat operands of VP intrinsic. (PR #133245)   via llvm-commits
• [llvm] [RISCV] Sink vp.splat operands of VP intrinsic. (PR #133245)   via llvm-commits
• [llvm] [LoopUtils] Cache VFs in addDiffRuntimeChecks (NFC) (PR #130157)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Use requested calling convention for vector math routines (PR #136122)   David Sherwood via llvm-commits
• [llvm] [RISCV] Sink vp.splat operands of VP intrinsic. (PR #133245)   via llvm-commits
• [llvm] [LV] Use requested calling convention for vector math routines (PR #136122)   David Sherwood via llvm-commits
• [llvm] [InstCombine] Fix ninf propagation for fcmp+sel -> minmax (PR #136433)   Yingwei Zheng via llvm-commits
• [clang] [llvm] [Clang] [OpenMP] Support NOWAIT with optional argument (PR #135030)   via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Fabian Ritter via llvm-commits
• [clang] [llvm] [Clang] [OpenMP] Support NOWAIT with optional argument (PR #128742)   via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Pankaj Dwivedi via llvm-commits
• [llvm] [VPlan] Add VPInstruction::StepVector and use it in VPWidenIntOrFpInductionRecipe (PR #129508)   Luke Lau via llvm-commits
• [llvm] [GlobalISel] Add `combine` action for C++ combine rules (PR #135941)   Pierre van Houtryve via llvm-commits
• [llvm] [VPlan] Add VPInstruction::StepVector and use it in VPWidenIntOrFpInductionRecipe (PR #129508)   Luke Lau via llvm-commits
• [llvm] [GlobalISel] Diagnose inline assembly constraint lowering errors (PR #135782)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][SplitModule] Do not create empty modules (PR #135761)   Pierre van Houtryve via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Shengchen Kan via llvm-commits
• [llvm] [GlobalISel] Add `combine` action for C++ combine rules (PR #135941)   Pierre van Houtryve via llvm-commits
• [llvm] [VPlan] Add VPInstruction::StepVector and use it in VPWidenIntOrFpInductionRecipe (PR #129508)   Luke Lau via llvm-commits
• [llvm] [GlobalISel] Add `combine` action for C++ combine rules (PR #135941)   Pierre van Houtryve via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Gergely Bálint via llvm-commits
• [llvm] [VPlan] Add VPInstruction::StepVector and use it in VPWidenIntOrFpInductionRecipe (PR #129508)   Luke Lau via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   via llvm-commits
• [llvm] [RISCV] Sink vp.splat operands of VP intrinsic. (PR #133245)   Luke Lau via llvm-commits
• [llvm] Canonicalize `smax(smin(X, MinC), MaxC) -> smin(smax(X, MaxC), MinC)` (PR #136665)   via llvm-commits
• [llvm] [BOLT][AArch64] Support for pointer authentication (v2) (PR #120064)   Paschalis Mpeis via llvm-commits
• [llvm] Canonicalize `smax(smin(X, MinC), MaxC) -> smin(smax(X, MaxC), MinC)` (PR #136665)   via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] [RISCV] Sink vp.splat operands of VP intrinsic. (PR #133245)   Luke Lau via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [llvm] [SPIR-V] Fix OpVectorShuffle operands on load (PR #135954)   Nathan Gauër via llvm-commits
• [llvm] [InstCombine] Canonicalize `smax(smin(X, MinC), MaxC) -> smin(smax(X, MaxC), MinC)` (PR #136665)   via llvm-commits
• [llvm] [InstCombine] Fold tan(x) * cos(x) => sin(x) (PR #136319)   via llvm-commits
• [llvm] [mlir] [mlir][gpu] Change GPU modules to globals (PR #135478)   Christian Sigg via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Feng Zou via llvm-commits
• [llvm] [InstCombine] Canonicalize `smax(smin(X, MinC), MaxC) -> smin(smax(X, MaxC), MinC)` (PR #136665)   via llvm-commits
• [llvm] [TTI] Fix discrepancies in prototypes between interface and implementations (NFCI) (PR #136655)   Sergei Barannikov via llvm-commits
• [llvm] [IR] Relax convergence requirements on call (PR #135794)   Nathan Gauër via llvm-commits
• [llvm] [IR] Relax convergence requirements on call (PR #135794)   Nathan Gauër via llvm-commits
• [llvm] Clarify conditions of `lit` exiting with exit code 1 (PR #136190)   James Henderson via llvm-commits
• [llvm] f541a3a - [AMDGPU] SIInstrInfo: Fix resultDependsOnExec for VOPC instructions (#134629)   via llvm-commits
• [llvm] [AMDGPU] SIInstrInfo: Fix resultDependsOnExec for VOPC instructions (PR #134629)   Frederik Harwath via llvm-commits
• [llvm] [IR] Relax convergence requirements on call (PR #135794)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [TTI] Make the rest of TTI::Concept/TTI::Model methods const (NFC) (PR #136668)   Sergei Barannikov via llvm-commits
• [llvm] [TTI] Make the rest of TTI::Concept/TTI::Model methods const (NFC) (PR #136668)   via llvm-commits
• [llvm] [InstCombine] Canonicalize `smax(smin(X, MinC), MaxC) -> smin(smax(X, MaxC), MinC)` (PR #136665)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize `smax(smin(X, MinC), MaxC) -> smin(smax(X, MaxC), MinC)` (PR #136665)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize `smax(smin(X, MinC), MaxC) -> smin(smax(X, MaxC), MinC)` (PR #136665)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize `smax(smin(X, MinC), MaxC) -> smin(smax(X, MaxC), MinC)` (PR #136665)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Matt Arsenault via llvm-commits
• [llvm] [TTI] Fix discrepancies in prototypes between interface and implementations (NFCI) (PR #136655)   Matt Arsenault via llvm-commits
• [llvm] [TTI] Fix discrepancies in prototypes between interface and implementations (NFCI) (PR #136655)   Matt Arsenault via llvm-commits
• [llvm] [NFC] Fixed test case fail caused by the patch [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode #122741 (PR #136636)   Matt Arsenault via llvm-commits
• [clang] [llvm] reduce max wrt divergent mask (PR #135138)   Aniket Lal via llvm-commits
• [llvm] Reland "[LoopVectorizer] Add support for chaining partial reductions #120272" (PR #124282)   Mikael Holmén via llvm-commits
• [llvm] [SPIRV] Support for the SPV_INTEL_subgroup_matrix_multiply_accumulate SPIR-V extension (PR #135225)   Vyacheslav Levytskyy via llvm-commits
• [clang] [llvm] reduce over divergent mask (PR #133228)   Aniket Lal via llvm-commits
• [llvm] ef72b93 - [LV] Use requested calling convention for vector math routines (#136122)   via llvm-commits
• [llvm] [LV] Use requested calling convention for vector math routines (PR #136122)   David Sherwood via llvm-commits
• [clang] [llvm] [RISCV] Add Andes N45/NX45 processor definition (PR #136670)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add Andes N45/NX45 processor definition (PR #136670)   via llvm-commits
• [clang] [llvm] [RISCV] Add Andes N45/NX45 processor definition (PR #136670)   via llvm-commits
• [llvm] [RISCV] Add ISel patterns for Xqcia instructions (PR #136548)   via llvm-commits
• [llvm] [SystemZ] Handle f16 load positive/negative/complement without libcalls. (PR #136286)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle f16 load positive/negative/complement without libcalls. (PR #136286)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle f16 load positive/negative/complement without libcalls. (PR #136286)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle f16 load positive/negative/complement without libcalls. (PR #136286)   Ulrich Weigand via llvm-commits
• [llvm] 3334c35 - [TTI] Fix discrepancies in prototypes between interface and implementations (NFCI) (#136655)   via llvm-commits
• [llvm] [TTI] Fix discrepancies in prototypes between interface and implementations (NFCI) (PR #136655)   Sergei Barannikov via llvm-commits
• [llvm] c3f815b - Modify the localCache API to require an explicit commit on CachedFile… (#136121)   via llvm-commits
• [lldb] [llvm] Modify the localCache API to require an explicit commit on CachedFile… (PR #136121)   via llvm-commits
• [llvm] [SystemZ] Add DAGCombine for FCOPYSIGN to remove rounding. (PR #136131)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Add DAGCombine for FCOPYSIGN to remove rounding. (PR #136131)   Ulrich Weigand via llvm-commits
• [llvm] [InstCombine] Canonicalize `smax(smin(X, MinC), MaxC) -> smin(smax(X, MaxC), MinC)` (PR #136665)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Allow spilling to unused Zcmp Stack (PR #125959)   Sam Elliott via llvm-commits
• [llvm] 278c429 - [ValueTracking] Drop ucmp/scmp from getIntrinsicRange() (NFCI)   Nikita Popov via llvm-commits
• [llvm] [BOLT][AArch64] Support for pointer authentication (v2) (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] Do not combine shuffle+bitcast if the bitcast is eliminable. (PR #135769)   Ricardo Jesus via llvm-commits
• [llvm] [BOLT][AArch64] Support for pointer authentication (v2) (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] Reland "[SelectionDAG] Introducing a new ISD::POISON SDNode to represent the poison value in the IR." (PR #135056)   Martin Storsjö via llvm-commits
• [llvm] [InstCombine] Do not combine shuffle+bitcast if the bitcast is eliminable. (PR #135769)   Nikita Popov via llvm-commits
• [llvm] [DWARFLinker] Update `stmt-seq-macho.test` to use `update_test_body.py` (PR #133363)   Ulrich Weigand via llvm-commits
• [llvm] [SPIR-V] Add store legalization for ptrcast (PR #135369)   Nathan Gauër via llvm-commits
• [llvm] [InstCombine] fold u <= (u <= (unsigned)b) into (u <= (unsigned)b). (PR #136654)   Yingwei Zheng via llvm-commits
• [llvm] d8b0e61 - [SPIR-V] Fix OpVectorShuffle operands on load (#135954)   via llvm-commits
• [llvm] [SPIR-V] Fix OpVectorShuffle operands on load (PR #135954)   Nathan Gauër via llvm-commits
• [llvm] [SPIR-V] Add store legalization for ptrcast (PR #135369)   Nathan Gauër via llvm-commits
• [clang] [llvm] [ARM] Adding diagnostics for mcmodel=tiny when used in invalid targets (PR #125643)   via llvm-commits
• [llvm] [X86][DAGCombiner][SelectionDAG] - Fold Zext Build Vector to Bitcast of widen Build Vector (PR #135010)   Rohit Aggarwal via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [X86] SimplifyDemandedBitsForTargetNode - add handling for X86ISD::FAND/FOR (PR #136618)   Simon Pilgrim via llvm-commits
• [llvm] [BOLT][AArch64] Support for pointer authentication (v2) (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] Stitch up loop passes in codegen pipeline (PR #133050)   Akshat Oke via llvm-commits
• [llvm] [X86] SimplifyDemandedBitsForTargetNode - add handling for X86ISD::FAND/FOR (PR #136618)   Simon Pilgrim via llvm-commits
• [llvm] Stitch up loop passes in codegen pipeline (PR #133050)   Akshat Oke via llvm-commits
• [llvm] [CodeGen][NPM]Stitch up loop passes in codegen pipeline (PR #133050)   Akshat Oke via llvm-commits
• [llvm] [CodeGen][NPM]Stitch up loop passes in codegen pipeline (PR #133050)   via llvm-commits
• [llvm] [SPIRV] Support for the SPV_INTEL_subgroup_matrix_multiply_accumulate SPIR-V extension (PR #135225)   Dmitry Sidorov via llvm-commits
• [llvm] [BOLT][AArch64] Support for pointer authentication (v2) (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Support for pointer authentication (v2) (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] [InstCombine] Canonicalize `smax(smin(X, MinC), MaxC) -> smin(smax(X, MaxC), MinC)` (PR #136665)   via llvm-commits
• [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #133050)   Akshat Oke via llvm-commits
• [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #133050)   Akshat Oke via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [llvm] [BOLT][AArch64] Support for pointer authentication (v2) (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Support for pointer authentication (v2) (PR #120064)   Gergely Bálint via llvm-commits
• [lldb] [llvm] Modify the localCache API to require an explicit commit on CachedFile… (PR #136121)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] Add clang driver changes to support MTI RISC-V (PR #134065)   Djordje Todorovic via llvm-commits
• [clang] [llvm] Add clang driver changes to support MTI RISC-V (PR #134065)   Djordje Todorovic via llvm-commits
• [llvm] [AMDGPU] SIInstrInfo: Fix resultDependsOnExec for VOPC instructions (PR #134629)   LLVM Continuous Integration via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Abinaya Saravanan via llvm-commits
• [llvm] [InstCombine] Canonicalize `smax(smin(X, MinC), MaxC) -> smin(smax(X, MaxC), MinC)` (PR #136665)   via llvm-commits
• [clang] [llvm] [clang][OpenMP][SPIR-V] Fix AS of globals and set the default AS to 4 (PR #135251)   Dmitry Sidorov via llvm-commits
• [llvm] [InstCombine] Canonicalize `smax(smin(X, MinC), MaxC) -> smin(smax(X, MaxC), MinC)` (PR #136665)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize `smax(smin(X, MinC), MaxC) -> smin(smax(X, MaxC), MinC)` (PR #136665)   Yingwei Zheng via llvm-commits
• [llvm] 9efd798 - [TTI] Make the rest of TTI::Concept/TTI::Model methods const (NFC) (#136668)   via llvm-commits
• [llvm] [TTI] Make the rest of TTI::Concept/TTI::Model methods const (NFC) (PR #136668)   Sergei Barannikov via llvm-commits
• [clang] [llvm] [LLVM][SROA] Teach SROA how to "bitcast" between fixed and scalable vectors. (PR #130973)   Paul Walker via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   Sergei Barannikov via llvm-commits
• [llvm] [InstCombine] Canonicalize `smax(smin(X, MinC), MaxC) -> smin(smax(X, MaxC), MinC)` (PR #136665)   via llvm-commits
• [llvm] 97eb416 - [flang][Parser][OpenMP] Fix unparser for cancellation_construct_type (#136001)   via llvm-commits
• [flang] [llvm] [flang][Parser][OpenMP] Fix unparser for cancellation_construct_type (PR #136001)   Tom Eccles via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   via llvm-commits
• [llvm] [AMDGPU] Do not fold COPY with implicit operands (PR #136003)   Mariusz Sikora via llvm-commits
• [llvm] c1940cd - [SPIR-V] Add store legalization for ptrcast (#135369)   via llvm-commits
• [llvm] [SPIR-V] Add store legalization for ptrcast (PR #135369)   Nathan Gauër via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   via llvm-commits
• [llvm] [CodeExtractor] Improve debug info for input values. (PR #136016)   Abid Qadeer via llvm-commits
• [llvm] [CodeExtractor] Improve debug info for input values. (PR #136016)   Abid Qadeer via llvm-commits
• [llvm] [X86] SimplifyDemandedBitsForTargetNode - add handling for X86ISD::FAND/FOR (PR #136618)   Phoebe Wang via llvm-commits
• [llvm] [RISCV] Add ISel patterns for Xqcia instructions (PR #136548)   via llvm-commits
• [llvm] 8f8853a - [RISCV] Add ISel patterns for Xqcia instructions (#136548)   via llvm-commits
• [llvm] [RISCV] Add ISel patterns for Xqcia instructions (PR #136548)   via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   Jim Lin via llvm-commits
• [llvm] [CodeExtractor] Improve debug info for input values. (PR #136016)   Abid Qadeer via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   via llvm-commits
• [llvm] [AMDGPU] Reapply patch 135326 (PR #136678)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Reapply patch 135326 (PR #136678)   via llvm-commits
• [llvm] [CodeExtractor] Improve debug info for input values. (PR #136016)   Abid Qadeer via llvm-commits
• [llvm] [AArch64] Fix tryToConvertShuffleOfTbl2ToTbl4 with non-buildvector input operands. (PR #135961)   Nashe Mncube via llvm-commits
• [llvm] [LV] Add support for partial reductions without a binary op (PR #133922)   Florian Hahn via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   Pengcheng Wang via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   Pengcheng Wang via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   Pengcheng Wang via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   Nicholas Guy via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Gergely Bálint via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   via llvm-commits
• [llvm] a095ebc - [LLVM][CostModel][AArch64] Remove magic numbers from f16 vector compares. (#135795)   via llvm-commits
• [llvm] [LLVM][CostModel][AArch64] Remove magic numbers from f16 vector compares. (PR #135795)   Paul Walker via llvm-commits
• [llvm] Reland "[LoopVectorizer] Add support for chaining partial reductions #120272" (PR #124282)   Nicholas Guy via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   Luke Lau via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   Sam Tebbs via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Tom Eccles via llvm-commits
• [llvm] [AMDGPU] Reapply patch 135326 (PR #136678)   Matt Arsenault via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   Florian Hahn via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   Florian Hahn via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   Florian Hahn via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   Florian Hahn via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   Florian Hahn via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   Florian Hahn via llvm-commits
• [llvm] [RISCV] Cost ordered bf16/f16 w/ zvfhmin reductions as invalid (PR #114250)   Luke Lau via llvm-commits
• [llvm] [AArch64] Add tablegen patterns for i8 and i16 vector insert/extract pairs (PR #136091)   Nashe Mncube via llvm-commits
• [llvm] Expanding the Histogram Intrinsic (PR #127399)   Graham Hunter via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Gergely Bálint via llvm-commits
• [llvm] [LoopVersioningLICM] Only mark pointers with generated checks as noalias (PR #135168)   John Brawn via llvm-commits
• [llvm] [VPlan] Fix MayReadFromMemory/MayWriteToMemory on VPWidenIntrinsicRecipe (PR #136684)   Luke Lau via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   Nicholas Guy via llvm-commits
• [llvm] [VPlan] Fix MayReadFromMemory/MayWriteToMemory on VPWidenIntrinsicRecipe (PR #136684)   via llvm-commits
• [llvm] [VPlan] Fix MayReadFromMemory/MayWriteToMemory on VPWidenIntrinsicRecipe (PR #136684)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] Canonicalize `smax(smin(X, MinC), MaxC) -> smin(smax(X, MaxC), MinC)` (PR #136665)   via llvm-commits
• [llvm] Expanding the Histogram Intrinsic (PR #127399)   Graham Hunter via llvm-commits
• [llvm] Reapply "[AMDGPU] Insert readfirstlane in the function returns in sgpr." (PR #136678)   Pankaj Dwivedi via llvm-commits
• [llvm] [LLVM][CodeGen][AArch64] Don't scalarise v8{f16,bf16} vsetcc operations. (PR #135398)   Paul Walker via llvm-commits
• [llvm] Reapply "[AMDGPU] Insert readfirstlane in the function returns in sgpr." (PR #136678)   Pankaj Dwivedi via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Sam Tebbs via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   Sergei Barannikov via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [llvm] [LLVM][CodeGen][AArch64] Don't scalarise v8{f16,bf16} vsetcc operations. (PR #135398)   Paul Walker via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   Simon Pilgrim via llvm-commits
• [llvm] [LLVM][CostModel][AArch64] Remove magic numbers from f16 vector compares. (PR #135795)   LLVM Continuous Integration via llvm-commits
• [llvm] [LoopVersioningLICM] Only mark pointers with generated checks as noalias (PR #135168)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] Reapply "[AMDGPU] Insert readfirstlane in the function returns in sgpr." (PR #136678)   Pankaj Dwivedi via llvm-commits
• [llvm] Reapply "[AMDGPU] Insert readfirstlane in the function returns in sgpr." (PR #136678)   Pankaj Dwivedi via llvm-commits
• [llvm] [llvm-extract] support unnamed bbs. (PR #135140)   Allin Lee via llvm-commits
• [llvm] [LangRef] Add a description of the semantics of call signatures. (PR #136189)   Mehdi Amini via llvm-commits
• [llvm] [CMake] Only export the LLVM_LINK_LLVM_DYLIB setting if not yet set (PR #135570)   Jonas Rembser via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   David Sherwood via llvm-commits
• [llvm] [llvm-cov] Fix branch counts of template functions (second attempt) (PR #135074)   via llvm-commits
• [llvm] [PAC][InstCombine] Replace auth+sign with resign (PR #130807)   Anatoly Trosinenko via llvm-commits
• [llvm] Reapply "[AMDGPU] Insert readfirstlane in the function returns in sgpr." (PR #136678)   Matt Arsenault via llvm-commits
• [llvm] Reapply "[AMDGPU] Insert readfirstlane in the function returns in sgpr." (PR #136678)   Matt Arsenault via llvm-commits
• [llvm] Reapply "[AMDGPU] Insert readfirstlane in the function returns in sgpr." (PR #136678)   Matt Arsenault via llvm-commits
• [llvm] Reapply "[AMDGPU] Insert readfirstlane in the function returns in sgpr." (PR #136678)   Matt Arsenault via llvm-commits
• [llvm] [llvm-cov] Fix branch counts of template functions (second attempt) (PR #135074)   via llvm-commits
• [llvm] [mlir] [mlir][gpu] Change GPU modules to globals (PR #135478)   Mehdi Amini via llvm-commits
• [llvm] [RISCV] Cost ordered bf16/f16 w/ zvfhmin reductions as invalid (PR #114250)   Harald van Dijk via llvm-commits
• [llvm] [mlir] [mlir][gpu] Change GPU modules to globals (PR #135478)   Mehdi Amini via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   Sergei Barannikov via llvm-commits
• [llvm] [Support] Use absolute paths for include filenames (PR #136687)   via llvm-commits
• [llvm] [CMake] Only export the LLVM_LINK_LLVM_DYLIB setting if not yet set (PR #135570)   Jonas Hahnfeld via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   Sergei Barannikov via llvm-commits
• [llvm] [Support] Use absolute paths for include filenames (PR #136687)   via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   Sergei Barannikov via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   Sergei Barannikov via llvm-commits
• [llvm] [llvm-mca][FeatureRequest] Itimeline graph, note source of delay for each instruction (PR #136423)   Andrea Di Biagio via llvm-commits
• [llvm] [DebugInfo] Handle additional types of stores in assignment tracking (PR #129070)   Stephen Tozer via llvm-commits
• [llvm] 1a48e1d - [AMDGPU] Do not fold COPY with implicit operands (#136003)   via llvm-commits
• [llvm] [AMDGPU] Do not fold COPY with implicit operands (PR #136003)   Mariusz Sikora via llvm-commits
• [llvm] [RISCV] Simplify fixup kinds that force relocations (PR #136088)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Simplify fixup kinds that force relocations (PR #136088)   Sam Elliott via llvm-commits
• [compiler-rt] [llvm] [TySan] Add option to outline instrumentation (PR #120582)   via llvm-commits
• [llvm] [CMake] Only export the LLVM_LINK_LLVM_DYLIB setting if not yet set (PR #135570)   Jonas Rembser via llvm-commits
• [llvm] [BOLT][AArch64] Support for pointer authentication (v2) (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] [mlir] [mlir][gpu] Change GPU modules to globals (PR #135478)   Christian Sigg via llvm-commits
• [llvm] [mlir] [mlir][gpu] Change GPU modules to globals (PR #135478)   Christian Sigg via llvm-commits
• [llvm] [AMDGPU][True16][MC] add fake16 error and promote test (PR #135984)   Ivan Kosarev via llvm-commits
• [compiler-rt] [llvm] [TySan] Add option to outline instrumentation (PR #120582)   via llvm-commits
• [llvm] [GlobalISel]: G_UNMERGE_VALUES for vectors with different element sizes (PR #133335)   Robert Imschweiler via llvm-commits
• [compiler-rt] [llvm] [TySan] Add option to outline instrumentation (PR #120582)   via llvm-commits
• [llvm] [InstCombine] Canonicalize `smax(smin(X, MinC), MaxC) -> smin(smax(X, MaxC), MinC)` (PR #136665)   via llvm-commits
• [llvm] [InstCombine] Canonicalize `max(min(X, MinC), MaxC) -> min(max(X, MaxC), MinC)` (PR #136665)   via llvm-commits
• [llvm] [MachinePipeliner] Use AliasAnalysis properly when analyzing loop-carried dependencies (PR #136691)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Use AliasAnalysis properly when analyzing loop-carried dependencies (PR #136691)   via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   via llvm-commits
• [llvm] [MachinePipeliner] Add validation for missed dependencies (PR #135148)   Ryotaro Kasuga via llvm-commits
• [llvm] Reapply "[SPARC] Use umulxhi to do extending 64x64->128 multiply when we have VIS3" (#135897) (PR #136475)   via llvm-commits
• [llvm] a25fdd7 - Reapply "[AMDGPU] Insert readfirstlane in the function returns in sgpr." (#136678)   via llvm-commits
• [llvm] Reapply "[AMDGPU] Insert readfirstlane in the function returns in sgpr." (PR #136678)   Pankaj Dwivedi via llvm-commits
• [llvm] [DebugInfo] Handle additional types of stores in assignment tracking (PR #129070)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RISCV][NFC] Convert some predicates to TIIPredicate (PR #129658)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV][NFC] Convert some predicates to TIIPredicate (PR #129658)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV][NFC] Convert some predicates to TIIPredicate (PR #129658)   Pengcheng Wang via llvm-commits
• [llvm] [MachinePipeliner] Use AliasAnalysis properly when analyzing loop-carried dependencies (PR #136691)   Ryotaro Kasuga via llvm-commits
• [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #133050)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #133050)   Matt Arsenault via llvm-commits
• [llvm] [ConstraintElim] Add facts implied by intrinsics if they are used by other constraints (PR #80121)   Yingwei Zheng via llvm-commits
• [llvm] [ConstraintElim] Add facts implied by intrinsics if they are used by other constraints (PR #80121)   Yingwei Zheng via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [llvm] e428afd - [gn build] Port c3f815ba82de   LLVM GN Syncbot via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [compiler-rt] [llvm] [MC/DC][Coverage] Enable profile correlation for MC/DC (PR #136437)   Roman Beliaev via llvm-commits
• [llvm] Expanding the Histogram Intrinsic (PR #127399)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Perfect Shuffles (PR #106446)   David Green via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Anatoly Trosinenko via llvm-commits
• [clang] [llvm] Add Support for Ziccamoc (PR #136694)   via llvm-commits
• [clang] [llvm] Add Support for Ziccamoc (PR #136694)   via llvm-commits
• [llvm] [RISCV][NFC] Convert some predicates to TIIPredicate (PR #129658)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] Fix register class constraints for si-fold-operands pass when folding immediate into copies (PR #131387)   via llvm-commits
• [polly] [RemoveDI][Polly] Migrate to adapt to the new DebugRecord format in more areas (PR #135935)   Karthika Devi C via llvm-commits
• [llvm] [AMDGPU] Fix register class constraints for si-fold-operands pass when folding immediate into copies (PR #131387)   via llvm-commits
• [llvm] [AMDGPU][InsertWaitCnts] Add test for global_wb/inv/wbinv tracking (PR #135339)   Pierre van Houtryve via llvm-commits
• [polly] [RemoveDI][Polly] Migrate to adapt to the new DebugRecord format in more areas (PR #135935)   Karthika Devi C via llvm-commits
• [clang] [llvm] Add Support for Ziccamoc (PR #136694)   Pengcheng Wang via llvm-commits
• [llvm] Expanding the Histogram Intrinsic (PR #127399)   via llvm-commits
• [clang] [llvm] [RISCV] Add support for Ziccamoc (PR #136694)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU][InsertWaitCnts] Add test for global_wb/inv/wbinv tracking (PR #135339)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][InsertWaitCnts] Add test for global_wb/inv/wbinv tracking (PR #135339)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][InsertWaitCnts] Add test for global_wb/inv/wbinv tracking (PR #135339)   Pierre van Houtryve via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [RISCV] Add support for Ziccamoc (PR #136694)   Pengcheng Wang via llvm-commits
• [llvm] 47903e3 - [AMDGPU][InsertWaitCnts] Add test for global_wb/inv/wbinv tracking (#135339)   via llvm-commits
• [llvm] [AMDGPU][InsertWaitCnts] Add test for global_wb/inv/wbinv tracking (PR #135339)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][InsertWaitCnts] Track global_wb/inv/wbinv (PR #135340)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][InsertWaitCnts] Track global_wb/inv/wbinv (PR #135340)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][InsertWaitCnts] Track global_wb/inv/wbinv (PR #135340)   Pierre van Houtryve via llvm-commits
• [llvm] ec3a905 - [AMDGPU][InsertWaitCnts] Track global_wb/inv/wbinv (#135340)   via llvm-commits
• [llvm] [AMDGPU][InsertWaitCnts] Track global_wb/inv/wbinv (PR #135340)   Pierre van Houtryve via llvm-commits
• [llvm] 2b71269 - [SelectionDAG][X86] Fold `sub(x, mul(divrem(x, y)[0], y))` to `divrem(x, y)[1]` (#136565)   via llvm-commits
• [llvm] [SelectionDAG][X86] Fold `sub(x, mul(divrem(x,y)[0], y))` to `divrem(x, y)[1]` (PR #136565)   via llvm-commits
• [libc] [llvm] [LLVM] Replace use of `LLVM_RUNTIMES_TARGET` with `LLVM_DEFAULT_TARGET_TRIPLE` (PR #136208)   Joseph Huber via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Gergely Bálint via llvm-commits
• [libc] [llvm] [LLVM] Replace use of `LLVM_RUNTIMES_TARGET` with `LLVM_DEFAULT_TARGET_TRIPLE` (PR #136208)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   via llvm-commits
• [llvm] [LV] Add support for partial reductions without a binary op (PR #133922)   Sam Tebbs via llvm-commits
• [libc] [llvm] [LLVM] Replace use of `LLVM_RUNTIMES_TARGET` with `LLVM_DEFAULT_TARGET_TRIPLE` (PR #136208)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [LLVM] Replace use of `LLVM_RUNTIMES_TARGET` with `LLVM_DEFAULT_TARGET_TRIPLE` (PR #136208)   LLVM Continuous Integration via llvm-commits
• [lld] [lld][ICF] Prevent merging two sections when they point to non-globals (PR #136641)   Peter Smith via llvm-commits
• [lld] [lld][ICF] Prevent merging two sections when they point to non-globals (PR #136641)   Peter Smith via llvm-commits
• [llvm] [CostModel] Plumb CostKind into getExtractWithExtendCost (PR #135523)   David Green via llvm-commits
• [clang] [llvm] [RISCV] Add support for Ziccamoc (PR #136694)   Sam Elliott via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Gergely Bálint via llvm-commits
• [libc] [llvm] [LLVM] Replace use of `LLVM_RUNTIMES_TARGET` with `LLVM_DEFAULT_TARGET_TRIPLE` (PR #136208)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV][NFC] Convert some predicates to TIIPredicate (PR #129658)   Pengcheng Wang via llvm-commits
• [libc] [llvm] [LLVM] Replace use of `LLVM_RUNTIMES_TARGET` with `LLVM_DEFAULT_TARGET_TRIPLE` (PR #136208)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [LLVM] Replace use of `LLVM_RUNTIMES_TARGET` with `LLVM_DEFAULT_TARGET_TRIPLE` (PR #136208)   LLVM Continuous Integration via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   Florian Hahn via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   Florian Hahn via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Tom Eccles via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space. (PR #135444)   Alex MacLean via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space. (PR #135444)   Alex MacLean via llvm-commits
• [llvm] dba8acd - Revert "[ValueTracking] Drop ucmp/scmp from getIntrinsicRange() (NFCI)"   Hans Wennborg via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space. (PR #135444)   Mehdi Amini via llvm-commits
• [llvm] [llvm-cov] Fix branch counts of template functions (second attempt) (PR #135074)   via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   Alex MacLean via llvm-commits
• [llvm] [InstCombine] Canonicalize `max(min(X, MinC), MaxC) -> min(max(X, MaxC), MinC)` (PR #136665)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize `max(min(X, MinC), MaxC) -> min(max(X, MaxC), MinC)` (PR #136665)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize `max(min(X, MinC), MaxC) -> min(max(X, MaxC), MinC)` (PR #136665)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Canonicalize `max(min(X, MinC), MaxC) -> min(max(X, MaxC), MinC)` (PR #136665)   via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   via llvm-commits
• [llvm] [InstCombine] Canonicalize `max(min(X, MinC), MaxC) -> min(max(X, MaxC), MinC)` (PR #136665)   via llvm-commits
• [llvm] [InstCombine] Canonicalize `max(min(X, MinC), MaxC) -> min(max(X, MaxC), MinC)` (PR #136665)   via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   via llvm-commits
• [clang] [llvm] [SYCL] Add SYCL property set registry class (PR #136697)   Justin Cai via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   via llvm-commits
• [clang] [llvm] [SYCL] Add SYCL property set registry class (PR #136697)   via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   Nicholas Guy via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   Nicholas Guy via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   Nicholas Guy via llvm-commits
• [llvm] [NVPTX] Add mix precision arith intrinsics (PR #136657)   Alex MacLean via llvm-commits
• [llvm] [LoopVectorizer] Prune VFs based on plan register pressure (PR #132190)   Sam Tebbs via llvm-commits
• [libc] [llvm] [LLVM] Replace use of `LLVM_RUNTIMES_TARGET` with `LLVM_DEFAULT_TARGET_TRIPLE` (PR #136208)   Joseph Huber via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   Nicholas Guy via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Abinaya Saravanan via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [AMDGPU][True16][MC] add fake16 error and promote test (PR #135984)   Joe Nash via llvm-commits
• [clang] [llvm] [SYCL] Add SYCL property set registry class (PR #136697)   Justin Cai via llvm-commits
• [clang] [llvm] [SYCL] Add SYCL property set registry class (PR #136697)   Justin Cai via llvm-commits
• [clang] [llvm] [SYCL] Add SYCL property set registry class (PR #136697)   Justin Cai via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   Jim Lin via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   Jim Lin via llvm-commits
• [clang] [llvm] [SYCL] Add SYCL property set registry class (PR #136697)   Justin Cai via llvm-commits
• [clang] [llvm] [SYCL] Add SYCL property set registry class (PR #136697)   Justin Cai via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   Jim Lin via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [llvm] cfeaa39 - Reapply "[SPARC] Use umulxhi to do extending 64x64->128 multiply when we have VIS3" (#135897) (#136475)   via llvm-commits
• [llvm] Reapply "[SPARC] Use umulxhi to do extending 64x64->128 multiply when we have VIS3" (#135897) (PR #136475)   via llvm-commits
• [llvm] [LoopVectorizer] Prune VFs based on plan register pressure (PR #132190)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Prune VFs based on plan register pressure (PR #132190)   Sam Tebbs via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Fabian Ritter via llvm-commits
• [llvm] [LoopVectorizer] Prune VFs based on plan register pressure (PR #132190)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Prune VFs based on plan register pressure (PR #132190)   Sam Tebbs via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   Jim Lin via llvm-commits
• [llvm] [CostModel] Plumb CostKind into getExtractWithExtendCost (PR #135523)   David Green via llvm-commits
• [llvm] d20604e - [CostModel] Plumb CostKind into getExtractWithExtendCost (#135523)   via llvm-commits
• [llvm] [CostModel] Plumb CostKind into getExtractWithExtendCost (PR #135523)   David Green via llvm-commits
• [llvm] Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #136701)   zhijian lin via llvm-commits
• [llvm] Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #136701)   via llvm-commits
• [llvm] Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #136701)   via llvm-commits
• [llvm] [InstCombine] Canonicalize `max(min(X, MinC), MaxC) -> min(max(X, MaxC), MinC)` (PR #136665)   via llvm-commits
• [llvm] Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #136701)   via llvm-commits
• [llvm] [GlobalISel] Introduce `G_POISON` (PR #127825)   Mateusz Sokół via llvm-commits
• [llvm] [X86][GlobalIsel] add strictfp attribute from ir in mir (PR #136702)   via llvm-commits
• [llvm] [X86][GlobalIsel] add strictfp attribute from ir into mir (PR #136702)   via llvm-commits
• [llvm] [GlobalISel] Introduce `G_POISON` (PR #127825)   Mateusz Sokół via llvm-commits
• [llvm] [GlobalISel] Introduce `G_POISON` (PR #127825)   Mateusz Sokół via llvm-commits
• [llvm] [GlobalISel] Introduce `G_POISON` (PR #127825)   Mateusz Sokół via llvm-commits
• [llvm] [GlobalISel] Introduce `G_POISON` (PR #127825)   Mateusz Sokół via llvm-commits
• [llvm] Expanding the Histogram Intrinsic (PR #127399)   Florian Hahn via llvm-commits
• [llvm] [GlobalISel] Introduce `G_POISON` (PR #127825)   Mateusz Sokół via llvm-commits
• [llvm] Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #136701)   zhijian lin via llvm-commits
• [llvm] Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #136701)   zhijian lin via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update GFX11Plus codegen test with true16 flag (PR #135078)   Joe Nash via llvm-commits
• [llvm] [CodeGenPrepare] Unfold slow ctpop when used in power-of-two test (PR #102731)   Sergei Barannikov via llvm-commits
• [llvm] [CostModel] Plumb CostKind into getExtractWithExtendCost (PR #135523)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86][GlobalIsel] add strictfp attribute from ir into mir (PR #136702)   Phoebe Wang via llvm-commits
• [clang] [llvm] [clang][OpenMP][SPIR-V] Fix AS of globals and set the default AS to 4 (PR #135251)   Nick Sarnie via llvm-commits
• [llvm] [CodeGenPrepare] Unfold slow ctpop when used in power-of-two test (PR #102731)   Sergei Barannikov via llvm-commits
• [llvm] [CodeGenPrepare] Unfold slow ctpop when used in power-of-two test (PR #102731)   Sergei Barannikov via llvm-commits
• [llvm] [NFC] Fixed test case fail caused by the patch [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode #122741 (PR #136636)   zhijian lin via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   Luke Lau via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   Luke Lau via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   Luke Lau via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   Luke Lau via llvm-commits
• [llvm] Remove an incorrect assert in MFMASmallGemmSingleWaveOpt. (PR #130131)   via llvm-commits
• [llvm] 278062f - [CVP] Add test showing how a call-site range can pessimize opt (NFC)   Nikita Popov via llvm-commits
• [llvm] d51b278 - [IR] Intersect call and fn range in CallBase::getRange()   Nikita Popov via llvm-commits
• [llvm] [AArch64] Merge scaled and unscaled narrow zero stores (PR #136705)   Guy David via llvm-commits
• [llvm] [AArch64] Merge scaled and unscaled narrow zero stores (PR #136705)   via llvm-commits
• [llvm] Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #136701)   zhijian lin via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   Jim Lin via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   Jim Lin via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   Jim Lin via llvm-commits
• [llvm] 980531c - [VPlan] Fix MayReadFromMemory/MayWriteToMemory on VPWidenIntrinsicRecipe (#136684)   via llvm-commits
• [llvm] [VPlan] Fix MayReadFromMemory/MayWriteToMemory on VPWidenIntrinsicRecipe (PR #136684)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   Nikita Popov via llvm-commits
• [llvm] c5a5f43 - Reapply [ValueTracking] Drop ucmp/scmp from getIntrinsicRange() (NFCI)   Nikita Popov via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] fix msghdr for musl (PR #136195)   Deák Lajos via llvm-commits
• [llvm] [llvm] add LLVM_FRIEND_ABI macro for friend function decls (PR #136595)   Andrew Rogers via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] fix msghdr for musl (PR #136195)   Deák Lajos via llvm-commits
• [llvm] [AARch64] Funnel Shift now uses rev32/rev64 instructions (PR #136707)   via llvm-commits
• [llvm] [AARch64] Funnel Shift now uses rev32/rev64 instructions (PR #136707)   via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   Nikita Popov via llvm-commits
• [llvm] [AARch64] Funnel Shift now uses rev32/rev64 instructions (PR #136707)   via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [CodeExtractor] Improve debug info for input values. (PR #136016)   Abid Qadeer via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   Luke Lau via llvm-commits
• [llvm] [X86][SelectionDAG] Fix the Gather's base and index by modifying the Scale value (PR #134979)   Rohit Aggarwal via llvm-commits
• [llvm] [VPlan] Manage instruction medata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction metadata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction metadata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction metadata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction metadata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction metadata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction metadata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction metadata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [VPlan] Manage instruction metadata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [AArch64][SVE] Add dot product lowering for PARTIAL_REDUCE_MLA node (PR #130933)   Nicholas Guy via llvm-commits
• [llvm] [X86][SelectionDAG] Fix the Gather's base and index by modifying the Scale value (PR #134979)   Rohit Aggarwal via llvm-commits
• [llvm] [VPlan] Introduce VPlanConstantFolder (PR #125365)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Philip Reames via llvm-commits
• [llvm] [VPlan] Introduce VPlanConstantFolder (PR #125365)   Ramkumar Ramachandra via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Tom Eccles via llvm-commits
• [llvm] [LV] Improve code in selectInterleaveCount (NFC) (PR #128002)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   via llvm-commits
• [llvm] [RISCV] Use ri.vzip2{a, b} for interleave2 if available (PR #136364)   Luke Lau via llvm-commits
• [flang] [llvm] [flang][OpenMP] Introduce OmpHintClause, simplify OmpAtomicClause (PR #136311)   Tom Eccles via llvm-commits
• [llvm] [RISCV] Simplify fixup kinds that force relocations (PR #136088)   Mariusz Borsa via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Philip Reames via llvm-commits
• [llvm] [RISCV] Use ri.vzip2{a, b} for interleave2 if available (PR #136364)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Philip Reames via llvm-commits
• [llvm] [CodeGen][NPM] Update BranchFolderLegacy make tail merge configurable via flag (PR #135277)   Mikhail R. Gadelha via llvm-commits
• [llvm] [LAA] Hoist setting condition for RT-checks (PR #128045)   Ramkumar Ramachandra via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Alex MacLean via llvm-commits
• [llvm] 901ac60 - [RISCV] Use ri.vzip2{a,b} for interleave2 if available (#136364)   via llvm-commits
• [llvm] [RISCV] Use ri.vzip2{a, b} for interleave2 if available (PR #136364)   Philip Reames via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   Hristo Hristov via llvm-commits
• [llvm] [LV][LAA][NFC]Add a test with non-power-of-2 store-load forward distance, NFC (PR #136710)   Alexey Bataev via llvm-commits
• [llvm] [LV][LAA][NFC]Add a test with non-power-of-2 store-load forward distance, NFC (PR #136710)   via llvm-commits
• [llvm] [docs][CoC] Update verbiage about appeal process (PR #136715)   Cyndy Ishida via llvm-commits
• [llvm] [X86][GlobalIsel] support G_FABS for f80 (PR #136718)   via llvm-commits
• [lld] [wasm-ld] Refactor WasmSym from static globals to per-link context (PR #134970)   Anutosh Bhat via llvm-commits
• [polly] [RemoveDI][Polly] Migrate to adapt to the new DebugRecord format in more areas (PR #135935)   Michael Kruse via llvm-commits
• [llvm] [RISCV] Lower SEW<=32 vector_deinterleave(2) via vunzip2{a, b} (PR #136463)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Philip Reames via llvm-commits
• [llvm] [docs][CoC] Update verbiage about appeal process (PR #136715)   Aaron Ballman via llvm-commits
• [llvm] c607180 - [docs] Fix typo in GitHub.rst   via llvm-commits
• [llvm] [InstCombine] Canonicalize `max(min(X, MinC), MaxC) -> min(max(X, MaxC), MinC)` (PR #136665)   via llvm-commits
• [clang] [llvm] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   Alexey Bataev via llvm-commits
• [clang] [llvm] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   Alexey Bataev via llvm-commits
• [clang] [llvm] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   Alexey Bataev via llvm-commits
• [llvm] [InstCombine] Fold tan(x) * cos(x) => sin(x) (PR #136319)   Andy Kaylor via llvm-commits
• [llvm] [X86][GlobalIsel] support G_FABS for f80 (PR #136718)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for bitfield extract (PR #132381)   Petar Avramovic via llvm-commits
• [llvm] [BOLT][test] Resolve symlink for nm tool (NFC) (PR #136722)   YongKang Zhu via llvm-commits
• [llvm] [BOLT][test] Resolve symlink for nm tool (NFC) (PR #136722)   via llvm-commits
• [compiler-rt] [TySan] Fix false positives with derived classes (PR #126260)   via llvm-commits
• [compiler-rt] [TySan] Fix false positives with derived classes (PR #126260)   via llvm-commits
• [llvm] [PowerPC] Add dense math half-precision floating-point outer-product accumulate to DMR instructions (PR #133272)   Maryam Moghadas via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Feng Zou via llvm-commits
• [llvm] [RISCV][NFC] Convert some predicates to TIIPredicate (PR #129658)   Craig Topper via llvm-commits
• [llvm] Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (PR #136701)   Matt Arsenault via llvm-commits
• [llvm] [BOLT][test] Resolve symlink for nm tool (NFC) (PR #136722)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][test] Resolve symlink for nm tool (NFC) (PR #136722)   Amir Ayupov via llvm-commits
• [llvm] a5a6ae1 - [docs][CoC] Update verbiage about appeal process (#136715)   via llvm-commits
• [llvm] [docs][CoC] Update verbiage about appeal process (PR #136715)   Cyndy Ishida via llvm-commits
• [llvm] [InstCombine] Canonicalize `max(min(X, MinC), MaxC) -> min(max(X, MaxC), MinC)` (PR #136665)   via llvm-commits
• [llvm] [AARch64] Funnel Shift now uses rev32/rev64 instructions (PR #136707)   David Green via llvm-commits
• [llvm] [DAG] shouldReduceLoadWidth - add optional<unsigned> byte offset argument (PR #136723)   Simon Pilgrim via llvm-commits
• [llvm] [RISCV][NFC] Convert some predicates to TIIPredicate (PR #129658)   Craig Topper via llvm-commits
• [llvm] [AARch64] Funnel Shift now uses rev32/rev64 instructions (PR #136707)   David Green via llvm-commits
• [llvm] [SLP]Prefer segmented/deinterleaved loads to strided and fix codegen (PR #135058)   Alexey Bataev via llvm-commits
• [llvm] [DAG] shouldReduceLoadWidth - add optional<unsigned> byte offset argument (PR #136723)   via llvm-commits
• [llvm] [DAG] shouldReduceLoadWidth - add optional<unsigned> byte offset argument (PR #136723)   via llvm-commits
• [llvm] [DAG] shouldReduceLoadWidth - add optional<unsigned> byte offset argument (PR #136723)   via llvm-commits
• [llvm] [LLVM][TableGen] Do not test fixed opcode value in DecoderEmitter tests (PR #136724)   Rahul Joshi via llvm-commits
• [llvm] [InstCombine] Fold tan(x) * cos(x) => sin(x) (PR #136319)   Matt Arsenault via llvm-commits
• [llvm] [DAG] shouldReduceLoadWidth - add optional<unsigned> byte offset argument (PR #136723)   Simon Pilgrim via llvm-commits
• [llvm] [LLVM][TableGen] Do not test fixed opcode value in DecoderEmitter tests (PR #136724)   Rahul Joshi via llvm-commits
• [llvm] [BOLT] Gadget scanner: analyze functions without CFG information (PR #133461)   Anatoly Trosinenko via llvm-commits
• [llvm] [LV] Fix missing entry in willGenerateVectors (PR #136712)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Fold tan(x) * cos(x) => sin(x) (PR #136319)   Matt Arsenault via llvm-commits
• [llvm] [LV] Fix missing entry in willGenerateVectors (PR #136712)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (PR #136191)   Philip Reames via llvm-commits
• [llvm] [llvm] add LLVM_ABI_FRIEND macro for friend function decls (PR #136595)   Andrew Rogers via llvm-commits
• [llvm] [llvm] add LLVM_ABI_FRIEND macro for friend function decls (PR #136595)   Andrew Rogers via llvm-commits
• [llvm] [LoopVersioningLICM] Only mark pointers with generated checks as noalias (PR #135168)   John Brawn via llvm-commits
• [llvm] c049583 - [llvm] add LLVM_ABI_FRIEND macro for friend function decls (#136595)   via llvm-commits
• [llvm] [llvm] add LLVM_ABI_FRIEND macro for friend function decls (PR #136595)   Saleem Abdulrasool via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   Luke Lau via llvm-commits
• [llvm] Remove an incorrect assert in MFMASmallGemmSingleWaveOpt. (PR #130131)   Matt Arsenault via llvm-commits
• [llvm] Remove an incorrect assert in MFMASmallGemmSingleWaveOpt. (PR #130131)   Matt Arsenault via llvm-commits
• [llvm] [DAG] shouldReduceLoadWidth - add optional<unsigned> byte offset argument (PR #136723)   Matt Arsenault via llvm-commits
• [llvm] f52b01b - [SLP][NFC]Rename functions/variables, limit visibility to meet the coding standards, NFC   Alexey Bataev via llvm-commits
• [llvm] [llvm-extract] support unnamed bbs. (PR #135140)   Benjamin Maxwell via llvm-commits
• [llvm] [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (PR #136191)   Alexey Bataev via llvm-commits
• [llvm] [DAG] shouldReduceLoadWidth - add optional<unsigned> byte offset argument (PR #136723)   Simon Pilgrim via llvm-commits
• [llvm] [X86][GlobalIsel] add strictfp attribute from ir into mir (PR #136702)   via llvm-commits
• [llvm] [CodeExtractor] Improve debug info for input values. (PR #136016)   Abid Qadeer via llvm-commits
• [llvm] [LangRef] Add a description of the semantics of call signatures. (PR #136189)   Eli Friedman via llvm-commits
• [llvm] [CodeExtractor] Improve debug info for input values. (PR #136016)   Abid Qadeer via llvm-commits
• [llvm] [X86][GlobalIsel] support G_FABS for f80 (PR #136718)   Evgenii Kudriashov via llvm-commits
• [llvm] [RISCV] Add disjoint or patterns for vwadd[u].vv (PR #136716)   Luke Lau via llvm-commits
• [llvm] [DAG] shouldReduceLoadWidth - add optional<unsigned> byte offset argument (PR #136723)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Add branch folding before branch relaxation (PR #134760)   Philip Reames via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   Mateusz Mikuła via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   via llvm-commits
• [clang] [llvm] [openmp] [OpenMP] Change build of OpenMP device runtime to be a separate runtime (PR #136729)   Joseph Huber via llvm-commits
• [clang] [llvm] [openmp] [OpenMP] Change build of OpenMP device runtime to be a separate runtime (PR #136729)   via llvm-commits
• [clang] [llvm] [openmp] [OpenMP] Change build of OpenMP device runtime to be a separate runtime (PR #136729)   via llvm-commits
• [clang] [llvm] [openmp] [OpenMP] Change build of OpenMP device runtime to be a separate runtime (PR #136729)   Joseph Huber via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Ashley Coleman via llvm-commits
• [llvm] [DAG] shouldReduceLoadWidth - add optional<unsigned> byte offset argument (PR #136723)   Simon Pilgrim via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Ashley Coleman via llvm-commits
• [llvm] [GlobalISel] Introduce `G_POISON` (PR #127825)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Add disjoint or patterns for vwadd[u].vv (PR #136716)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add disjoint or patterns for vwadd[u].vv (PR #136716)   Luke Lau via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix missing entry in willGenerateVectors (PR #136712)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix missing entry in willGenerateVectors (PR #136712)   Florian Hahn via llvm-commits
• [llvm] [NFC] Add a pre- commit test case for Patch https://github.com/llvm/llvm-project/pull/111696 (PR #136730)   zhijian lin via llvm-commits
• [llvm] [NFC] Add a pre- commit test case for Patch #111696 (PR #136730)   zhijian lin via llvm-commits
• [llvm] [NFC] Add a pre- commit test case for Patch #111696 (PR #136730)   via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   David Green via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   via llvm-commits
• [llvm] [NFC][AArch64][GlobalISel] Add test coverage for vector store legalization (PR #134904)   Tobias Stadler via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   Artem Belevich via llvm-commits
• [llvm] [RISCV] Add disjoint or patterns for vwadd[u].vv (PR #136716)   Philip Reames via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Support for DLL export (PR #136014)   Andrew Rogers via llvm-commits
• [llvm] [RISCV] Add disjoint or patterns for vwadd[u].vv (PR #136716)   Philip Reames via llvm-commits
• [llvm] [BOLT] Improve profile quality reporting (PR #130810)   via llvm-commits
• [llvm] 1c722fc - [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (#136191)   via llvm-commits
• [llvm] [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (PR #136191)   Philip Reames via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Support for DLL export (PR #136014)   Andrew Rogers via llvm-commits
• [llvm] [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (PR #136191)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (PR #136191)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Andrew Rogers via llvm-commits
• [llvm] [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (PR #136191)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [openmp] [OpenMP] Change build of OpenMP device runtime to be a separate runtime (PR #136729)   Joseph Huber via llvm-commits
• [llvm] [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (PR #136191)   LLVM Continuous Integration via llvm-commits
• [llvm] remove 'movt' if there is no user of it (PR #136735)   via llvm-commits
• [llvm] [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (PR #136191)   LLVM Continuous Integration via llvm-commits
• [llvm] remove 'movt' if there is no user of it (PR #136735)   via llvm-commits
• [llvm] [JITLink][AArch32] Add explicit visibility macros to functions needed by unittests (PR #116557)   Thomas Fransham via llvm-commits
• [llvm] [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (PR #136191)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (PR #136191)   LLVM Continuous Integration via llvm-commits
• [llvm] [LV] Fix missing entry in willGenerateVectors (PR #136712)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Matt Arsenault via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   Florian Hahn via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   Florian Hahn via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   Florian Hahn via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   via llvm-commits
• [compiler-rt] [compiler-rt] Make sure __clzdi2 doesn't call itself recursively on sparc64 (PR #136737)   via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   Hristo Hristov via llvm-commits
• [llvm] [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (PR #136191)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (PR #136191)   LLVM Continuous Integration via llvm-commits
• [llvm] [DWARFLinker] Update `stmt-seq-macho.test` to use `update_test_body.py` (PR #133363)   via llvm-commits
• [compiler-rt] [compiler-rt] Make sure __clzdi2 doesn't call itself recursively on sparc64 (PR #136737)   via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   Florian Hahn via llvm-commits
• [llvm] [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (PR #136191)   LLVM Continuous Integration via llvm-commits
• [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)   via llvm-commits
• [llvm] 7c4cb0e - Fix build error introduced by 1c722fc   Philip Reames via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] remove 'movt' if there is no user of it (PR #136735)   Matt Arsenault via llvm-commits
• [llvm] remove 'movt' if there is no user of it (PR #136735)   Matt Arsenault via llvm-commits
• [llvm] remove 'movt' if there is no user of it (PR #136735)   Matt Arsenault via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Helena Kotas via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Helena Kotas via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Helena Kotas via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Helena Kotas via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Helena Kotas via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Helena Kotas via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Helena Kotas via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Helena Kotas via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Helena Kotas via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Helena Kotas via llvm-commits
• [llvm] [NFC][AArch64][GlobalISel] Add test coverage for vector load/store legalization (PR #134904)   Matt Arsenault via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Helena Kotas via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Helena Kotas via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Andrew Rogers via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/ADT for DLL export (PR #136629)   Andrew Rogers via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] [DirectX] Allow llvm lifetime intrinsics to pass on to the DirectX backend (PR #136622)   Chris B via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   Artem Belevich via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] 5ebf08c - [DirectX] Allow llvm lifetime intrinsics to pass on to the DirectX backend (#136622)   via llvm-commits
• [llvm] [DirectX] Allow llvm lifetime intrinsics to pass on to the DirectX backend (PR #136622)   Farzon Lotfi via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Matt Arsenault via llvm-commits
• [llvm] [Offload] Implement the remaining initial Offload API (PR #122106)   Joseph Huber via llvm-commits
• [llvm] [NFC][llvm] Remove duplicate isUEFI check (PR #136593)   Prabhu Rajasekaran via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Matt Arsenault via llvm-commits
• [llvm] fcb3097 - [LLVM][TableGen] Do not test fixed opcode value in DecoderEmitter tests (#136724)   via llvm-commits
• [llvm] [LLVM][TableGen] Do not test fixed opcode value in DecoderEmitter tests (PR #136724)   Rahul Joshi via llvm-commits
• [llvm] [Offload] Implement the remaining initial Offload API (PR #122106)   Joseph Huber via llvm-commits
• [llvm] [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (PR #136191)   LLVM Continuous Integration via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Adopt some Ld* patterns to reduce codegen regressions (PR #135492)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Adopt some Ld* patterns to reduce codegen regressions (PR #135492)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Adopt some Ld* patterns to reduce codegen regressions (PR #135492)   David Green via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   Alex MacLean via llvm-commits
• [llvm] [NFC] Add a pre- commit test case for Patch #111696 (PR #136730)   zhijian lin via llvm-commits
• [llvm] [NFC] Add a pre- commit test case for Patch #111696 (PR #136730)   zhijian lin via llvm-commits
• [compiler-rt] [compiler-rt] Make sure __clzdi2 doesn't call itself recursively on sparc64 (PR #136737)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] [compiler-rt] Make sure __clzdi2 doesn't call itself recursively on sparc64 (PR #136737)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] [compiler-rt] Make sure __clzdi2 doesn't call itself recursively on sparc64 (PR #136737)   Saleem Abdulrasool via llvm-commits
• [llvm] [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (PR #136191)   LLVM Continuous Integration via llvm-commits
• [llvm] remove 'movt' if there is no user of it (PR #136735)   via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   Sergei Barannikov via llvm-commits
• [llvm] [llvm] Ensure propagated constants in the vtable are aligned (PR #136630)   Paul Kirth via llvm-commits
• [llvm] [LV] Fix missing entry in willGenerateVectors (PR #136712)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AMDGPU] Added hot-block-rematerialize pass (PR #136631)   Adam Yang via llvm-commits
• [llvm] [LV] Fix missing entry in willGenerateVectors (PR #136712)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AMDGPU] Added hot-block-rematerialize pass (PR #136631)   Adam Yang via llvm-commits
• [llvm] [AMDGPU] Added hot-block-rematerialize pass (PR #136631)   Adam Yang via llvm-commits
• [llvm] [AMDGPU] Added hot-block-rematerialize pass (PR #136631)   Adam Yang via llvm-commits
• [llvm] [DirectX] Allow llvm lifetime intrinsics to pass on to the DirectX backend (PR #136622)   LLVM Continuous Integration via llvm-commits
• [llvm] [Support] Use absolute paths for include filenames (PR #136687)   Markus Böck via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Support for DLL export (PR #136014)   Nikita Popov via llvm-commits
• [llvm] [CostModel] Remove optional from InstructionCost::getValue() (PR #135596)   David Green via llvm-commits
• [llvm] [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (PR #136191)   LLVM Continuous Integration via llvm-commits
• [llvm] b5eae19 - [flang][OpenMP] Introduce OmpHintClause, simplify OmpAtomicClause (#136311)   via llvm-commits
• [flang] [llvm] [flang][OpenMP] Introduce OmpHintClause, simplify OmpAtomicClause (PR #136311)   Krzysztof Parzyszek via llvm-commits
• [flang] [llvm] [flang][OpenMP] Extend common::AtomicDefaultMemOrderType enumeration (PR #136312)   Krzysztof Parzyszek via llvm-commits
• [llvm] [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (PR #136191)   LLVM Continuous Integration via llvm-commits
• [flang] [llvm] [flang][OpenMP] Extend common::AtomicDefaultMemOrderType enumeration (PR #136312)   Krzysztof Parzyszek via llvm-commits
• [llvm] [BOLT][test] Resolve symlink for nm tool (NFC) (PR #136722)   YongKang Zhu via llvm-commits
• [llvm] [mlir] [mlir][gpu] Change GPU modules to globals (PR #135478)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [llvm] Ensure propagated constants in the vtable are aligned (PR #136630)   Paul Kirth via llvm-commits
• [llvm] [llvm] Ensure propagated constants in the vtable are aligned (PR #136630)   Paul Kirth via llvm-commits
• [llvm] [llvm] Ensure propagated constants in the vtable are aligned (PR #136630)   via llvm-commits
• [llvm] [llvm] Ensure propagated constants in the vtable are aligned (PR #136630)   via llvm-commits
• [llvm] [llvm] Ensure propagated constants in the vtable are aligned (PR #136630)   via llvm-commits
• [llvm] [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (PR #136191)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [clang][OpenMP][SPIR-V] Fix AS of globals and set the default AS to 4 (PR #135251)   Nick Sarnie via llvm-commits
• [llvm] [AArch64][SME] Allow spills of ZT0 around SME ABI routines again (PR #136726)   Benjamin Maxwell via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   Alex MacLean via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   Alex MacLean via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [clang] [llvm] [OpenMP] Update the bitcode library install and search path (PR #136754)   Joseph Huber via llvm-commits
• [clang] [llvm] [OpenMP] Update the bitcode library install and search path (PR #136754)   via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [llvm] Ensure propagated constants in the vtable are aligned (PR #136630)   Peter Collingbourne via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   Eli Friedman via llvm-commits
• [llvm] [JumpThreading] Do not unfold select if block has address taken and used (PR #135106)   Weihang Fan via llvm-commits
• [llvm] [llvm] Construct SmallVector with iterator ranges (NFC) (PR #136460)   David Blaikie via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   via llvm-commits
• [llvm] [mlir] [mlir][gpu] Change GPU modules to globals (PR #135478)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [NVPTX] Add support for PTX ISA v8.8 (PR #136639)   Artem Belevich via llvm-commits
• [llvm] [LAA] Improve convergent tests (PR #136758)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NVPTX] Add support for PTX ISA v8.8 (PR #136639)   Alex MacLean via llvm-commits
• [llvm] [LAA] Improve convergent tests (PR #136758)   via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Jonathan Thackray via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   via llvm-commits
• [llvm] [NFC] Add a pre- commit test case for Patch #111696 (PR #136730)   zhijian lin via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [compiler-rt] [ASan] Prevent ASan/LSan deadlock by preloading modules before error reporting (PR #131756)   David Justo via llvm-commits
• [llvm] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [llvm] Ensure propagated constants in the vtable are aligned (PR #136630)   via llvm-commits
• [llvm] [RISCV] Clear kill flags after replaceRegWith in RISCVFoldMemOffset. (PR #136762)   Craig Topper via llvm-commits
• [llvm] [RISCV] Clear kill flags after replaceRegWith in RISCVFoldMemOffset. (PR #136762)   via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [1/2] (PR #135444)   via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [1/2] (PR #135444)   via llvm-commits
• [llvm] [BOLT] Do not return Def-ed registers from MCPlusBuilder::getUsedRegs (PR #129890)   Maksim Panchenko via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [2/2] (PR #136768)   via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [2/2] (PR #136768)   via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [2/2] (PR #136768)   via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix missing entry in willGenerateVectors (PR #136712)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce VPlanConstantFolder (PR #125365)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce VPlanConstantFolder (PR #125365)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce VPlanConstantFolder (PR #125365)   Florian Hahn via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [1/2] (PR #135444)   via llvm-commits
• [llvm] [VPlan] Introduce VPlanConstantFolder (PR #125365)   Florian Hahn via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [1/2] (PR #135444)   via llvm-commits
• [llvm] [LoopVectorizer] Prune VFs based on plan register pressure (PR #132190)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorizer] Prune VFs based on plan register pressure (PR #132190)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorizer] Prune VFs based on plan register pressure (PR #132190)   Florian Hahn via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [1/2] (PR #135444)   via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [2/2] (PR #136768)   via llvm-commits
• [llvm] [LAA] Improve convergent tests (PR #136758)   Florian Hahn via llvm-commits
• [llvm] [RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (PR #136191)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [1/2] (PR #135444)   via llvm-commits
• [llvm] [GlobalISel] Introduce `G_POISON` (PR #127825)   Mateusz Sokół via llvm-commits
• [llvm] [GlobalISel] Introduce `G_POISON` (PR #127825)   Mateusz Sokół via llvm-commits
• [lld] [LLD][COFF] add __{data,bss}_{start,end}__ symbols for Cygwin support (PR #136180)   via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   via llvm-commits
• [llvm] [InstrRef] Preserve debug instr num in aarch64-ldst-opt. (PR #136009)   Shubham Sandeep Rastogi via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [clang] [llvm] Reland "[HLSL][RootSignature] Implement initial parsing of the descriptor table clause params" (PR #136740)   Ashley Coleman via llvm-commits
• [llvm] [InstrRef] Preserve debug instr num in aarch64-ldst-opt. (PR #136009)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] [InstrRef] Preserve debug instr num in aarch64-ldst-opt. (PR #136009)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] [InstrRef] Preserve debug instr num in aarch64-ldst-opt. (PR #136009)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] d6a68be - [NVPTX] Add support for Shared Cluster Memory address space [1/2] (#135444)   via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [1/2] (PR #135444)   via llvm-commits
• [llvm] [GlobalISel] Introduce `G_POISON` (PR #127825)   Mateusz Sokół via llvm-commits
• [llvm] [InstrRef] Preserve debug instr num in aarch64-ldst-opt. (PR #136009)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Gheorghe-Teodor Bercea via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [2/2] (PR #136768)   via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)   Alex MacLean via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [1/2] (PR #135444)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Support for DLL export (PR #136014)   Andrew Rogers via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [1/2] (PR #135444)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [1/2] (PR #135444)   LLVM Continuous Integration via llvm-commits
• [llvm] a2be454 - [NVPTX] Use v2.u64 to load/store 128-bit values (#136638)   via llvm-commits
• [llvm] [NVPTX] Use v2.u64 to load/store 128-bit values (PR #136638)   Alex MacLean via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Florian Mayer via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Florian Mayer via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Florian Mayer via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [1/2] (PR #135444)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Support for DLL export (PR #136014)   Andrew Rogers via llvm-commits
• [llvm] [AMDGPU] Fix for 131386 by reducing implicit definitions on register restoration (PR #133986)   Krzysztof Drewniak via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Support for DLL export (PR #136014)   Andrew Rogers via llvm-commits
• [llvm] [RISCV] Remove `AND` mask generated by `( zext ( atomic_load ) )` by replacing the load with `zextload` for orderings not stronger then monotonic. (PR #136502)   Craig Topper via llvm-commits
• [llvm] a7dcedc - [RISCV] Add initial batch of test coverage for zvqdotq codegen   Philip Reames via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [NVPTX] Fix ptxas tests from #135444 (PR #136782)   via llvm-commits
• [llvm] [NVPTX] Fix ptxas tests from #135444 (PR #136782)   via llvm-commits
• [llvm] [NVPTX] Fix ptxas tests from #135444 (PR #136782)   Alex MacLean via llvm-commits
• [llvm] [RISCV] Clear kill flags after replaceRegWith in RISCVFoldMemOffset. (PR #136762)   Philip Reames via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [RISCV] Remove `AND` mask generated by `( zext ( atomic_load ) )` by replacing the load with `zextload` for orderings not stronger then monotonic. (PR #136502)   Jan Górski via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [NVPTX] Fix ptxas tests from #135444 (PR #136782)   via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   via llvm-commits
• [llvm] 8dbf92e - [NVPTX] Fix ptxas tests from #135444 (#136782)   via llvm-commits
• [llvm] [NVPTX] Fix ptxas tests from #135444 (PR #136782)   via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Vitaly Buka via llvm-commits
• [lldb] [llvm] Add RISC-V CPU type and CPU subtype to llvm & lldb (PR #136785)   Jonas Devlieghere via llvm-commits
• [lldb] [llvm] Add RISC-V CPU type and CPU subtype to llvm & lldb (PR #136785)   via llvm-commits
• [lldb] [llvm] Add RISC-V CPU type and CPU subtype to llvm & lldb (PR #136785)   via llvm-commits
• [clang] [llvm] [Clang][C++23] Core language changes from P1467R9 extended floating-point types and standard names. (PR #78503)   Hubert Tong via llvm-commits
• [lldb] [llvm] Add RISC-V CPU type and CPU subtype to llvm & lldb (PR #136785)   Jason Molenda via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Andrew Rogers via llvm-commits
• [llvm] [llvm] revisions to export annotation macros to avoid compiler warnings (PR #135995)   Andrew Rogers via llvm-commits
• [llvm] [llvm] revisions to export annotation macros to avoid compiler warnings (PR #135995)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Andrew Rogers via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [DirectX] Fix shader flag version-checking logic to match DXC (PR #136787)   Deric C. via llvm-commits
• [llvm] [DirectX] Fix shader flag version-checking logic to match DXC (PR #136787)   via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] AMDGPU/MC: Fix emitting absolute expressions (PR #136789)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU/MC: Fix emitting absolute expressions (PR #136789)   via llvm-commits
• [clang] [llvm] User/raoanag/refract (PR #136026)   via llvm-commits
• [llvm] 3d04da5 - [NVPTX] Add support for Shared Cluster Memory address space [2/2] (#136768)   via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [2/2] (PR #136768)   via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [2/2] (PR #136768)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [2/2] (PR #136768)   LLVM Continuous Integration via llvm-commits
• [lldb] [llvm] Add RISC-V CPU type and CPU subtype to llvm & lldb (PR #136785)   Craig Topper via llvm-commits
• [llvm] [RISCV] Clear kill flags after replaceRegWith in RISCVFoldMemOffset. (PR #136762)   Craig Topper via llvm-commits
• [llvm] [NFCI] Move ProfOStream from InstrProfWriter.cpp to InstrProf.h/cpp (PR #136791)   Mingming Liu via llvm-commits
• [llvm] [NFCI] Move ProfOStream from InstrProfWriter.cpp to InstrProf.h/cpp (PR #136791)   via llvm-commits
• [llvm] [NFCI] Move ProfOStream from InstrProfWriter.cpp to InstrProf.h/cpp (PR #136791)   Mingming Liu via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] [Offload] Fix handling of 'bare' mode when environment missing (PR #136794)   Joseph Huber via llvm-commits
• [llvm] [Offload] Fix handling of 'bare' mode when environment missing (PR #136794)   via llvm-commits
• [llvm] [Offload] Fix handling of 'bare' mode when environment missing (PR #136794)   via llvm-commits
• [llvm] [Offload] Fix handling of 'bare' mode when environment missing (PR #136794)   via llvm-commits
• [llvm] [Offload] Fix handling of 'bare' mode when environment missing (PR #136794)   Shilei Tian via llvm-commits
• [llvm] [RISCV] Clear kill flags after replaceRegWith in RISCVFoldMemOffset. (PR #136762)   Craig Topper via llvm-commits
• [llvm] [InlineSpiller] Check rematerialization before folding operand (PR #134015)   via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Florian Mayer via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Florian Mayer via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Florian Mayer via llvm-commits
• [llvm] [RISCV] Add disjoint or patterns for vwadd[u].vv (PR #136716)   Jim Lin via llvm-commits
• [llvm] Revert "[X86][APX] Support peephole optimization with CCMP instruction (#129994)" (PR #136796)   Feng Zou via llvm-commits
• [llvm] Revert "[X86][APX] Support peephole optimization with CCMP instruction (#129994)" (PR #136796)   via llvm-commits
• [llvm] Revert "[X86][APX] Support peephole optimization with CCMP instruction (#129994)" (PR #136796)   Feng Zou via llvm-commits
• [llvm] Revert "[X86][APX] Support peephole optimization with CCMP instruction (#129994)" (PR #136796)   Feng Zou via llvm-commits
• [llvm] [Offload] Fix handling of 'bare' mode when environment missing (PR #136794)   Joseph Huber via llvm-commits
• [llvm] Revert "[X86][APX] Support peephole optimization with CCMP instruction (#129994)" (PR #136796)   Feng Zou via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] Revert "[X86][APX] Support peephole optimization with CCMP instruction (#129994)" (PR #136796)   Feng Zou via llvm-commits
• [llvm] [COFF] Preserve UniqueID used to create MCSectionCOFF (PR #123869)   Wei Xiao via llvm-commits
• [llvm] [LoongArch] Pre-commit for widen shuffle mask (PR #136544)   via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] Revert "[X86][APX] Support peephole optimization with CCMP instruction (#129994)" (PR #136796)   Phoebe Wang via llvm-commits
• [clang] [llvm] [RISCV] Add Andes N45/NX45 processor definition (PR #136670)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add Andes N45/NX45 processor definition (PR #136670)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add Andes N45/NX45 processor definition (PR #136670)   Jim Lin via llvm-commits
• [llvm] 2484060 - [RISCV] Clear kill flags after replaceRegWith in RISCVFoldMemOffset. (#136762)   via llvm-commits
• [llvm] [RISCV] Clear kill flags after replaceRegWith in RISCVFoldMemOffset. (PR #136762)   Craig Topper via llvm-commits
• [llvm] [LoongArch] Pre-commit for widen shuffle mask (PR #136544)   via llvm-commits
• [llvm] [RISCV] Return false for Zalasr load/store in isWorthFoldingAdd. (PR #136799)   Craig Topper via llvm-commits
• [llvm] [RISCV] Return false for Zalasr load/store in isWorthFoldingAdd. (PR #136799)   via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Shengchen Kan via llvm-commits
• [llvm] 122e515 - gn build: Port d1cce66469d0 more   Peter Collingbourne via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   A. Jiang via llvm-commits
• [llvm] [Utils][vim] Add missing hihlights for disjoint (PR #136801)   Jim Lin via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Feng Zou via llvm-commits
• [llvm] [RISCV] Clear kill flags after replaceRegWith in RISCVFoldMemOffset. (PR #136762)   LLVM Continuous Integration via llvm-commits
• [lldb] [llvm] Add RISC-V CPU type and CPU subtype to llvm & lldb (PR #136785)   Jason Molenda via llvm-commits
• [llvm] [Support] Use absolute paths for include filenames (PR #136687)   via llvm-commits
• [llvm] [Support] Use absolute paths for include filenames (PR #136687)   via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Feng Zou via llvm-commits
• [llvm] [DAG] shouldReduceLoadWidth - add optional<unsigned> byte offset argument (PR #136723)   Phoebe Wang via llvm-commits
• [llvm] remove 'movt' if there is no user of it (PR #136735)   via llvm-commits
• [llvm] [libc] add uefi fullbuild to workflows (PR #131376)   Tristan Ross via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support for dispatch construct (Sema & Codegen) support (PR #131838)   via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support for dispatch construct (Sema & Codegen) support (PR #131838)   via llvm-commits
• [llvm] SelectionDAG: Add missing AddNodeIDCustom case for MDNodeSDNode. (PR #136805)   Peter Collingbourne via llvm-commits
• [llvm] SelectionDAG: Add missing AddNodeIDCustom case for MDNodeSDNode. (PR #136805)   via llvm-commits
• [llvm] [libc] add uefi fullbuild to workflows (PR #131376)   Tristan Ross via llvm-commits
• [clang] [llvm] [RISCV] Add Andes N45/NX45 processor definition (PR #136670)   Pengcheng Wang via llvm-commits
• [llvm] [libc] add uefi fullbuild to workflows (PR #131376)   Tristan Ross via llvm-commits
• [llvm] [libc] add uefi fullbuild to workflows (PR #131376)   Tristan Ross via llvm-commits
• [llvm] 68d89e9 - [RISCV] Remove stale comment. NFC   Craig Topper via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [llvm] [libc] add uefi fullbuild to workflows (PR #131376)   Tristan Ross via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   Sergei Barannikov via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [libc] add uefi fullbuild to workflows (PR #131376)   Tristan Ross via llvm-commits
• [llvm] [libc] add uefi fullbuild to workflows (PR #131376)   via llvm-commits
• [llvm] [libc] add uefi fullbuild to workflows (PR #131376)   Tristan Ross via llvm-commits
• [llvm] [InstCombine] Offset both sides of an equality icmp (PR #134086)   via llvm-commits
• [llvm] [InstCombine] Offset both sides of an equality icmp (PR #134086)   via llvm-commits
• [llvm] [InstCombine] Offset both sides of an equality icmp (PR #134086)   via llvm-commits
• [llvm] [InstCombine] Offset both sides of an equality icmp (PR #134086)   via llvm-commits
• [llvm] Handle VECREDUCE intrinsics in NVPTX backend (PR #136253)   Princeton Ferro via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [LoongArch] Pre-commit for widen shuffle mask (PR #136544)   via llvm-commits
• [llvm] 141c14c - [LoongArch] Pre-commit for widen shuffle mask (#136544)   via llvm-commits
• [llvm] [LoongArch] Pre-commit for widen shuffle mask (PR #136544)   via llvm-commits
• [llvm] [mlir] [mlir][gpu] Change GPU modules to globals (PR #135478)   Christian Sigg via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Florian Mayer via llvm-commits
• [compiler-rt] [compiler-rt] Make sure __clzdi2 doesn't call itself recursively on sparc64 (PR #136737)   Sergei Barannikov via llvm-commits
• [polly] [RemoveDI][Polly] Migrate to adapt to the new DebugRecord format in more areas (PR #135935)   Karthika Devi C via llvm-commits
• [compiler-rt] [llvm] [msan] Add experimental '-mllvm -msan-embed-faulting-instruction' and MSAN_OPTIONS=print_faulting_instruction (PR #136539)   Thurston Dang via llvm-commits
• [llvm] [X86][GlobalIsel] support G_FABS for f80 (PR #136718)   via llvm-commits
• [compiler-rt] [compiler-rt] Make sure __clzdi2 doesn't call itself recursively on sparc64 (PR #136737)   Sergei Barannikov via llvm-commits
• [llvm] [LoongArch] Pre-commit for widen shuffle mask (PR #136544)   LLVM Continuous Integration via llvm-commits
• [llvm] update_test_checks: Relax DIFile filename checks (PR #135692)   Henrik G. Olsson via llvm-commits
• [llvm] [CodeGenPrepare] Unfold slow ctpop when used in power-of-two test (PR #102731)   Yingwei Zheng via llvm-commits
• [llvm] [LoongArch] Try to widen shuffle mask (PR #136081)   via llvm-commits
• [llvm] [RISCV] Keep or disjoint after folding casted bitwise logic (PR #136815)   Jim Lin via llvm-commits
• [llvm] [RISCV] Keep or disjoint after folding casted bitwise logic (PR #136815)   via llvm-commits
• [llvm] 5080a02 - [CodeGenPrepare] Unfold slow ctpop when used in power-of-two test (#102731)   via llvm-commits
• [llvm] [CodeGenPrepare] Unfold slow ctpop when used in power-of-two test (PR #102731)   Sergei Barannikov via llvm-commits
• [llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)   Jim Lin via llvm-commits
• [llvm] [RISCV] Keep or disjoint after folding casted bitwise logic (PR #136815)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Keep or disjoint after folding casted bitwise logic (PR #136815)   Jim Lin via llvm-commits
• [compiler-rt] [compiler-rt] Make sure __clzdi2 doesn't call itself recursively on sparc64 (PR #136737)   Sergei Barannikov via llvm-commits
• [llvm] [InstCombine] Keep or disjoint after folding casted bitwise logic (PR #136815)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Keep or disjoint after folding casted bitwise logic (PR #136815)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Keep or disjoint after folding casted bitwise logic (PR #136815)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Keep or disjoint after folding casted bitwise logic (PR #136815)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Keep or disjoint after folding casted bitwise logic (PR #136815)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add disjoint or patterns for vwadd[u].vv (PR #136716)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add disjoint or patterns for vwadd[u].vv (PR #136716)   Luke Lau via llvm-commits
• [llvm] 832ca74 - [RISCV] Add Andes N45/NX45 processor definition (#136670)   via llvm-commits
• [clang] [llvm] [RISCV] Add Andes N45/NX45 processor definition (PR #136670)   Jim Lin via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Sergei Barannikov via llvm-commits
• [llvm] [MachinePipeliner] Use AliasAnalysis properly when analyzing loop-carried dependencies (PR #136691)   via llvm-commits
• [llvm] [MachinePipeliner] Use AliasAnalysis properly when analyzing loop-carried dependencies (PR #136691)   via llvm-commits
• [llvm] [MachinePipeliner] Use AliasAnalysis properly when analyzing loop-carried dependencies (PR #136691)   via llvm-commits
• [llvm] [MachinePipeliner] Use AliasAnalysis properly when analyzing loop-carried dependencies (PR #136691)   via llvm-commits
• [llvm] [InstCombine] Offset both sides of an equality icmp (PR #134086)   Yingwei Zheng via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Sergei Barannikov via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Sergei Barannikov via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Sergei Barannikov via llvm-commits
• [llvm] Clarify conditions of `lit` exiting with exit code 1 (PR #136190)   James Henderson via llvm-commits
• [llvm] [RISCV] Add disjoint or patterns for vwadd[u].vv (PR #136716)   Luke Lau via llvm-commits
• [llvm] [JumpThreading][GVN] Copy metadata when inserting preload into preds (PR #134403)   Yingwei Zheng via llvm-commits
• [clang] [llvm] [RISCV] Add Andes N45/NX45 processor definition (PR #136670)   LLVM Continuous Integration via llvm-commits
• [llvm] [LLVM][TargetParser] Handle -msys targets the same as -cygwin. (PR #136817)   via llvm-commits
• [llvm] 98b6f8d - [CostModel] Remove optional from InstructionCost::getValue() (#135596)   via llvm-commits
• [llvm] [CostModel] Remove optional from InstructionCost::getValue() (PR #135596)   David Green via llvm-commits
• [llvm] 1a99f79 - [RISCV] Add tests for fixed-length vwadd[u].{w,v}v with disjoint or. NFC   Luke Lau via llvm-commits
• [llvm] [LLVM][TargetParser] Handle -msys targets the same as -cygwin. (PR #136817)   Mateusz Mikuła via llvm-commits
• [llvm] [LLVM][TargetParser] Handle -msys targets the same as -cygwin. (PR #136817)   via llvm-commits
• [llvm] [RISCV][NFC] Convert some predicates to TIIPredicate (PR #129658)   Pengcheng Wang via llvm-commits
• [llvm] [CostModel] Remove optional from InstructionCost::getValue() (PR #135596)   LLVM Continuous Integration via llvm-commits
• [llvm] [CostModel] Remove optional from InstructionCost::getValue() (PR #135596)   LLVM Continuous Integration via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [llvm] [LLVM][TargetParser] Handle -msys targets the same as -cygwin. (PR #136817)   via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   Sergei Barannikov via llvm-commits
• [llvm] [LLVM][TargetParser] Handle -msys targets the same as -cygwin. (PR #136817)   via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [llvm] [LLVM][TargetParser] Handle -msys targets the same as -cygwin. (PR #136817)   via llvm-commits
• [llvm] [LLVM][TargetParser] Handle -msys targets the same as -cygwin. (PR #136817)   via llvm-commits
• [llvm] [RISCV] Support disjoint RISCVISD::OR_VL in combineOp_VLToVWOp_VL (PR #136820)   Luke Lau via llvm-commits
• [llvm] [LLVM][TargetParser] Handle -msys targets the same as -cygwin. (PR #136817)   Martin Storsjö via llvm-commits
• [llvm] [RISCV] Support disjoint RISCVISD::OR_VL in combineOp_VLToVWOp_VL (PR #136820)   via llvm-commits
• [llvm] [RISCV] Support disjoint RISCVISD::OR_VL in combineOp_VLToVWOp_VL (PR #136820)   Luke Lau via llvm-commits
• [llvm] [JumpThreading][GVN] Copy metadata when inserting preload into preds (PR #134403)   Yingwei Zheng via llvm-commits
• [llvm] [LLVM][TargetParser] Handle -msys targets the same as -cygwin. (PR #136817)   Martin Storsjö via llvm-commits
• [llvm] 8204931 - [RISCV] Add disjoint or patterns for vwadd[u].v{v, x} (#136716)   via llvm-commits
• [llvm] [RISCV] Add disjoint or patterns for vwadd[u].vv (PR #136716)   Luke Lau via llvm-commits
• [llvm] [Mips] Support "$sp" named register (PR #136821)   via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   via llvm-commits
• [llvm] dd3de59 - [CostModel] Fix InlineSizeEstimatorAnalysis after #135596   David Green via llvm-commits
• [llvm] [RISCV] Remove `AND` mask generated by `( zext ( atomic_load ) )` by replacing the load with `zextload` for orderings not stronger then monotonic. (PR #136502)   Jan Górski via llvm-commits
• [llvm] [MachinePipeliner] Use AliasAnalysis properly when analyzing loop-carried dependencies (PR #136691)   Ryotaro Kasuga via llvm-commits
• [lld] [LLD][COFF] add __{data,bss}_{start,end}__ symbols for Cygwin support (PR #136180)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] add __{data,bss}_{start,end}__ symbols for Cygwin support (PR #136180)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] add __{data,bss}_{start,end}__ symbols for Cygwin support (PR #136180)   Martin Storsjö via llvm-commits
• [llvm] [MachinePipeliner] Use AliasAnalysis properly when analyzing loop-carried dependencies (PR #136691)   Ryotaro Kasuga via llvm-commits
• [llvm] [AMDGPU] Support block load/store for CSR (PR #130013)   Diana Picus via llvm-commits
• [llvm] [RISCV] Add fixed-length patterns for disjoint or patterns for vwadd[u].v{v,x} (PR #136824)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add fixed-length patterns for disjoint or patterns for vwadd[u].v{v,x} (PR #136824)   via llvm-commits
• [llvm] [AArch64] Funnel Shift now uses rev32/rev64 instructions (PR #136707)   via llvm-commits
• [llvm] SelectionDAG: Add missing AddNodeIDCustom case for MDNodeSDNode. (PR #136805)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Add missing AddNodeIDCustom case for MDNodeSDNode. (PR #136805)   Matt Arsenault via llvm-commits
• [llvm] [LoopPeel] Add new option to peeling loops to make PHIs into IVs (PR #121104)   Ryotaro Kasuga via llvm-commits
• [clang] [llvm] [OpenMP] Update the bitcode library install and search path (PR #136754)   Michael Kruse via llvm-commits
• [llvm] AMDGPU/MC: Fix emitting absolute expressions (PR #136789)   Matt Arsenault via llvm-commits
• [llvm] [CmpInstAnalysis] Decompose icmp eq (and x, C) C2 (PR #136367)   Yingwei Zheng via llvm-commits
• [llvm] [CmpInstAnalysis] Decompose icmp eq (and x, C) C2 (PR #136367)   Yingwei Zheng via llvm-commits
• [llvm] [CmpInstAnalysis] Decompose icmp eq (and x, C) C2 (PR #136367)   Yingwei Zheng via llvm-commits
• [llvm] [CmpInstAnalysis] Decompose icmp eq (and x, C) C2 (PR #136367)   Yingwei Zheng via llvm-commits
• [llvm] [CmpInstAnalysis] Decompose icmp eq (and x, C) C2 (PR #136367)   Yingwei Zheng via llvm-commits
• [llvm] [CmpInstAnalysis] Decompose icmp eq (and x, C) C2 (PR #136367)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU] Implement IR expansion for frem instruction (PR #130988)   Frederik Harwath via llvm-commits
• [llvm] update_test_checks: Relax DIFile filename checks (PR #135692)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [AArch64] Funnel Shift now uses rev32/rev64 instructions (PR #136707)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Funnel Shift now uses rev32/rev64 instructions (PR #136707)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Funnel Shift now uses rev32/rev64 instructions (PR #136707)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Funnel Shift now uses rev32/rev64 instructions (PR #136707)   Cullen Rhodes via llvm-commits
• [lld] [LLD][COFF] Handle --start-lib/--end-lib group in the same way as other archives (PR #136496)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] Handle --start-lib/--end-lib group in the same way as other archives (PR #136496)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] Handle --start-lib/--end-lib group in the same way as other archives (PR #136496)   Martin Storsjö via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   Nikita Popov via llvm-commits
• [llvm] [LLVM][Cygwin] Fix llvm-config shared library names (PR #136599)   Martin Storsjö via llvm-commits
• [llvm] 91edbe2 - [lldb][LoongArch] Fix expression function call failure   via llvm-commits
• [llvm] [lldb][LoongArch] Fix expression function call failure (PR #136563)   via llvm-commits
• [llvm] [JumpThreading][GVN] Copy metadata when inserting preload into preds (PR #134403)   Yingwei Zheng via llvm-commits
• [llvm] [CodeGen][NPM] Support CodeGenSCCOrder in pipeline (PR #136818)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][NPM] Support CodeGenSCCOrder in pipeline (PR #136818)   Matt Arsenault via llvm-commits
• [llvm] [JumpThreading][GVN] Copy metadata when inserting preload into preds (PR #134403)   Yingwei Zheng via llvm-commits
• [llvm] [Utils][vim] Add missing hihlights for disjoint (PR #136801)   Fraser Cormack via llvm-commits
• [llvm] [AArch64][SVE] Add dot product lowering for PARTIAL_REDUCE_MLA node (PR #130933)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SVE] Add dot product lowering for PARTIAL_REDUCE_MLA node (PR #130933)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SVE] Add dot product lowering for PARTIAL_REDUCE_MLA node (PR #130933)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SVE] Add dot product lowering for PARTIAL_REDUCE_MLA node (PR #130933)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SVE] Add dot product lowering for PARTIAL_REDUCE_MLA node (PR #130933)   Sander de Smalen via llvm-commits
• [llvm] [JumpThreading][GVN] Copy metadata when inserting preload into preds (PR #134403)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize `max(min(X, MinC), MaxC) -> min(max(X, MaxC), MinC)` (PR #136665)   Nikita Popov via llvm-commits
• [llvm] [Utils][vim] Add missing highlights for disjoint (PR #136801)   Fraser Cormack via llvm-commits
• [llvm] [DebugInfo][GlobalOpt] Preserve source locs for optimized loads (PR #134828)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [DebugInfo][GlobalOpt] Preserve source locs for optimized loads (PR #134828)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [DebugInfo][GlobalOpt] Preserve source locs for optimized loads (PR #134828)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Preserve inbounds flag based on ValueTracking and NUW (PR #130617)   Fabian Ritter via llvm-commits
• [llvm] 8a57df6 - [llvm-extract] support unnamed bbs. (#135140)   via llvm-commits
• [llvm] [llvm-extract] support unnamed bbs. (PR #135140)   Benjamin Maxwell via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Jonathan Thackray via llvm-commits
• [llvm] [llvm-extract] support unnamed bbs. (PR #135140)   via llvm-commits
• [llvm] [DAG] shouldReduceLoadWidth - add optional<unsigned> byte offset argument (PR #136723)   Simon Pilgrim via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   Nikolas Klauser via llvm-commits
• [llvm] [CmpInstAnalysis] Decompose icmp eq (and x, C) C2 (PR #136367)   Nikita Popov via llvm-commits
• [llvm] [CmpInstAnalysis] Decompose icmp eq (and x, C) C2 (PR #136367)   Nikita Popov via llvm-commits
• [llvm] [CmpInstAnalysis] Decompose icmp eq (and x, C) C2 (PR #136367)   Nikita Popov via llvm-commits
• [llvm] [CmpInstAnalysis] Decompose icmp eq (and x, C) C2 (PR #136367)   Nikita Popov via llvm-commits
• [llvm] InstCombine: Avoid counting uses of constants (PR #136566)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][NPM] Support CodeGenSCCOrder in pipeline (PR #136818)   Akshat Oke via llvm-commits
• [llvm] 48585ca - InstCombine: Avoid counting uses of constants (#136566)   via llvm-commits
• [llvm] InstCombine: Avoid counting uses of constants (PR #136566)   Matt Arsenault via llvm-commits
• [llvm] [JumpThreading][GVN] Copy metadata when inserting preload into preds (PR #134403)   Yingwei Zheng via llvm-commits
• [llvm] [DAG] shouldReduceLoadWidth - add optional<unsigned> byte offset argument (PR #136723)   Simon Pilgrim via llvm-commits
• [compiler-rt] Revert "[builtins] Disable COMPILER_RT_CRT_USE_EH_FRAME_REGISTRY by d… (PR #84580)   via llvm-commits
• [llvm] [CodeGen][NPM] Support CodeGenSCCOrder in pipeline (PR #136818)   Akshat Oke via llvm-commits
• [clang] [llvm] Checking scripts (PR #136829)   via llvm-commits
• [clang] [llvm] Checking scripts (PR #136829)   via llvm-commits
• [llvm] [JumpThreading][GVN] Copy metadata when inserting preload into preds (PR #134403)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU][SplitModule] Do not create empty modules (PR #135761)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU][SplitModule] Do not create empty modules (PR #135761)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU][SplitModule] Do not create empty modules (PR #135761)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] Checking scripts (PR #136829)   via llvm-commits
• [clang] [llvm] Checking scripts (PR #136829)   via llvm-commits
• [llvm] [MIPS]Remove unnecessary SLL instructions on MIPS64el (PR #109386)   via llvm-commits
• [llvm] a133170 - [gn build] Port 4a58071d8726   LLVM GN Syncbot via llvm-commits
• [clang] [llvm] [MIPS] Add FeatureMSA to i6400 and i6500 cores (PR #134985)   Mallikarjuna Gouda via llvm-commits
• [llvm] [Mips] Support "$sp" named register (PR #136821)   Iris Shi via llvm-commits
• [llvm] [DAG] shouldReduceLoadWidth - add optional<unsigned> byte offset argument (PR #136723)   Simon Pilgrim via llvm-commits
• [llvm] [NVPTX] Add mix precision arith intrinsics (PR #136657)   Rajat Bajpai via llvm-commits
• [llvm] [DAG] shouldReduceLoadWidth - add optional<unsigned> byte offset argument (PR #136723)   Simon Pilgrim via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Gergely Bálint via llvm-commits
• [clang] [llvm] Checking scripts (PR #136829)   via llvm-commits
• [llvm] 3cd6b86 - [MachinePipeliner] Use AliasAnalysis properly when analyzing loop-carried dependencies (#136691)   via llvm-commits
• [llvm] [MachinePipeliner] Use AliasAnalysis properly when analyzing loop-carried dependencies (PR #136691)   Ryotaro Kasuga via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A45/AX45 processor definition (PR #136832)   Jim Lin via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A45/AX45 processor definition (PR #136832)   via llvm-commits
• [llvm] [AMDGPU] Replace dynamic VGPR feature with attribute (PR #133444)   Diana Picus via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Paschalis Mpeis via llvm-commits
• [llvm] [MachinePipeliner] Use AliasAnalysis properly when analyzing loop-carried dependencies (PR #136691)   via llvm-commits
• [llvm] [Mips] Support "$sp" named register (PR #136821)   via llvm-commits
• [llvm] [AMDGPU] Replace dynamic VGPR feature with attribute (PR #133444)   Diana Picus via llvm-commits
• [llvm] [MachinePipeliner] Use AliasAnalysis properly when analyzing loop-carried dependencies (PR #136691)   Ryotaro Kasuga via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Gergely Bálint via llvm-commits
• [clang] [llvm] [MIPS] Add FeatureMSA to i6400 and i6500 cores (PR #134985)   Mallikarjuna Gouda via llvm-commits
• [llvm] [JumpThreading][GVN] Copy metadata when inserting preload into preds (PR #134403)   Yingwei Zheng via llvm-commits
• [llvm] [AArch64] Allow variadic calls with SVE argument if it is named. (PR #136833)   Sander de Smalen via llvm-commits
• [llvm] LV: Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (PR #127399)   via llvm-commits
• [llvm] [JumpThreading][GVN] Copy metadata when inserting preload into preds (PR #134403)   Yingwei Zheng via llvm-commits
• [llvm] [AArch64] Allow variadic calls with SVE argument if it is named. (PR #136833)   via llvm-commits
• [llvm] [InstCombine] Canonicalize `max(min(X, MinC), MaxC) -> min(max(X, MaxC), MinC)` (PR #136665)   LLVM Continuous Integration via llvm-commits
• [llvm] [LAA] Improve convergent tests (PR #136758)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Improve convergent tests (PR #136758)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AMDGPU] Support block load/store for CSR (PR #130013)   LLVM Continuous Integration via llvm-commits
• [llvm] LV: Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (PR #127399)   via llvm-commits
• [llvm] LV: Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (PR #127399)   via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   YunQiang Su via llvm-commits
• [llvm] [LAA] Improve convergent tests (PR #136758)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] Branch1 (PR #136834)   via llvm-commits
• [clang] [llvm] Branch1 (PR #136834)   via llvm-commits
• [clang] [llvm] Branch1 (PR #136834)   via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [2/2] (PR #136768)   Guray Ozen via llvm-commits
• [llvm] [LV] Fix missing entry in willGenerateVectors (PR #136712)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] Branch1 (PR #136834)   A. Jiang via llvm-commits
• [llvm] [Reassociate] Invalidate analysis passes after canonicalizeOperands (PR #136835)   Björn Pettersson via llvm-commits
• [llvm] [Reassociate] Invalidate analysis passes after canonicalizeOperands (PR #136835)   via llvm-commits
• [clang] [llvm] Branch1 (PR #136834)   via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Sergei Barannikov via llvm-commits
• [llvm] [CodeGen][NPM] Support CodeGenSCCOrder in pipeline (PR #136818)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][NPM] Support CodeGenSCCOrder in pipeline (PR #136818)   Matt Arsenault via llvm-commits
• [llvm] [Reassociate] Invalidate analysis passes after canonicalizeOperands (PR #136835)   Nikita Popov via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Preserve inbounds flag based on ValueTracking and NUW (PR #130617)   Matt Arsenault via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [LoopVectorizer] Prune VFs based on plan register pressure (PR #132190)   Sam Tebbs via llvm-commits
• [llvm] [SPIR-V] Consistent handling of TargetExtTypes in emit-intrinsics (PR #135682)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [Offload] Fix handling of 'bare' mode when environment missing (PR #136794)   Jan Patrick Lehr via llvm-commits
• [llvm] [X86][SelectionDAG] Fix the Gather's base and index by modifying the Scale value (PR #134979)   Rohit Aggarwal via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A45/AX45 processor definition (PR #136832)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [openmp] [OpenMP] Change build of OpenMP device runtime to be a separate runtime (PR #136729)   Michael Kruse via llvm-commits
• [clang] [llvm] [openmp] [OpenMP] Change build of OpenMP device runtime to be a separate runtime (PR #136729)   Michael Kruse via llvm-commits
• [clang] [llvm] [openmp] [OpenMP] Change build of OpenMP device runtime to be a separate runtime (PR #136729)   Michael Kruse via llvm-commits
• [clang] [llvm] [openmp] [OpenMP] Change build of OpenMP device runtime to be a separate runtime (PR #136729)   Michael Kruse via llvm-commits
• [llvm] [RISCV] Support disjoint RISCVISD::OR_VL in combineOp_VLToVWOp_VL (PR #136820)   Pengcheng Wang via llvm-commits
• [llvm] [mlir] [mlir][gpu] Change GPU modules to globals (PR #135478)   Mehdi Amini via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Matt Arsenault via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Matt Arsenault via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Matt Arsenault via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Matt Arsenault via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Matt Arsenault via llvm-commits
• [llvm] a7999f3 - [NFC][AArch64TTI] Refactor instCombineSVEVectorMul into simplifySVEIntrinsicBinOp.   Paul Walker via llvm-commits
• [llvm] SPIRV: Set NoPHIs property after selection (PR #136327)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [RISCV] Add fixed-length patterns for disjoint or patterns for vwadd[u].v{v,x} (PR #136824)   Pengcheng Wang via llvm-commits
• [lldb] [llvm] Add RISC-V CPU type and CPU subtype to llvm & lldb (PR #136785)   David Spickett via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Paschalis Mpeis via llvm-commits
• [compiler-rt] [llvm] [TySan] Add option to outline instrumentation (PR #120582)   via llvm-commits
• [llvm] [VPlan] Introduce VPlanConstantFolder (PR #125365)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce VPlanConstantFolder (PR #125365)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [openmp] [OpenMP] Change build of OpenMP device runtime to be a separate runtime (PR #136729)   Michał Górny via llvm-commits
• [llvm] [DebugInfo][ConstraintElimination] Fix debug value loss in replacing comparisons with the speculated constants (PR #136839)   Shan Huang via llvm-commits
• [llvm] [DebugInfo][ConstraintElimination] Fix debug value loss in replacing comparisons with the speculated constants (PR #136839)   via llvm-commits
• [llvm] [DebugInfo][ConstraintElimination] Fix debug value loss in replacing comparisons with the speculated constants (PR #136839)   via llvm-commits
• [llvm] 8c47f23 - [SPIRV] Support for the SPV_INTEL_subgroup_matrix_multiply_accumulate SPIR-V extension (#135225)   via llvm-commits
• [llvm] [SPIRV] Support for the SPV_INTEL_subgroup_matrix_multiply_accumulate SPIR-V extension (PR #135225)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [X86][SelectionDAG] Fix the Gather's base and index by modifying the Scale value (PR #134979)   Rohit Aggarwal via llvm-commits
• [llvm] [AArch64] Merge scaled and unscaled narrow zero stores (PR #136705)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Merge scaled and unscaled narrow zero stores (PR #136705)   Florian Hahn via llvm-commits
• [clang] [llvm] [Clang][llvm] Implement fp8 FMOP4A intrinsics (PR #130127)   Virginia Cangelosi via llvm-commits
• [llvm] [AArch64][SVE] Add dot product lowering for PARTIAL_REDUCE_MLA node (PR #130933)   Nicholas Guy via llvm-commits
• [lld] [lld][ICF] Prevent merging two sections when they point to non-globals (PR #136641)   Peter Smith via llvm-commits
• [llvm] [CodeExtractor] Improve debug info for input values. (PR #136016)   Michael Kruse via llvm-commits
• [llvm] [CodeExtractor] Improve debug info for input values. (PR #136016)   Michael Kruse via llvm-commits
• [llvm] [CodeExtractor] Improve debug info for input values. (PR #136016)   Michael Kruse via llvm-commits
• [llvm] [CodeExtractor] Improve debug info for input values. (PR #136016)   Michael Kruse via llvm-commits
• [llvm] [CodeExtractor] Improve debug info for input values. (PR #136016)   Michael Kruse via llvm-commits
• [llvm] [CodeExtractor] Improve debug info for input values. (PR #136016)   Michael Kruse via llvm-commits
• [llvm] [loop-vectorize] Fix crash when using types that aren't known scale factors (PR #136680)   Nicholas Guy via llvm-commits
• [clang] [llvm] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (PR #136842)   Pengcheng Wang via llvm-commits
• [llvm] [LV] Fix crash when using types that aren't known scale factors (PR #136680)   Nicholas Guy via llvm-commits
• [clang] [llvm] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (PR #136842)   via llvm-commits
• [clang] [llvm] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (PR #136842)   via llvm-commits
• [clang] [clang-tools-extra] [flang] [lldb] [llvm] [mlir] [openmp] [polly] [Documentation] Always use SVG for dot-generated doxygen images. (PR #136843)   via llvm-commits
• [llvm] [AMDGPU] Replace dynamic VGPR feature with attribute (PR #133444)   Matt Arsenault via llvm-commits
• [clang] [clang-tools-extra] [flang] [lldb] [llvm] [mlir] [openmp] [polly] [Documentation] Always use SVG for dot-generated doxygen images. (PR #136843)   via llvm-commits
• [clang] [llvm] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (PR #136842)   Pengcheng Wang via llvm-commits
• [llvm] [mlir] [mlir][gpu] Change GPU modules to globals (PR #135478)   Ivan Butygin via llvm-commits
• [llvm] [X86][GlobalIsel] support G_FABS for f80 (PR #136718)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix for 131386 by reducing implicit definitions on register restoration (PR #133986)   via llvm-commits
• [llvm] 15d8b3c - [LLVM][ISel][AArch64 Remove AArch64ISD::FCM##z nodes. (#135817)   via llvm-commits
• [llvm] [LLVM][ISel][AArch64 Remove AArch64ISD::FCM##z nodes. (PR #135817)   Paul Walker via llvm-commits
• [compiler-rt] [ASan] Prevent ASan/LSan deadlock by preloading modules before error reporting (PR #131756)   via llvm-commits
• [llvm] [AMDGPU] Support block load/store for CSR (PR #130013)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (PR #136842)   Luke Lau via llvm-commits
• [clang] [llvm] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (PR #136842)   Luke Lau via llvm-commits
• [clang] [llvm] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (PR #136842)   Luke Lau via llvm-commits
• [clang] [llvm] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (PR #136842)   Luke Lau via llvm-commits
• [clang] [llvm] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (PR #136842)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Support block load/store for CSR (PR #130013)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Matt Arsenault via llvm-commits
• [llvm] 2a9f77f - [Reassociate] Invalidate analysis passes after canonicalizeOperands (#136835)   via llvm-commits
• [llvm] [Reassociate] Invalidate analysis passes after canonicalizeOperands (PR #136835)   Björn Pettersson via llvm-commits
• [llvm] [GlobalISel] Add `combine` action for C++ combine rules (PR #135941)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Add fixed-length patterns for disjoint or patterns for vwadd[u].v{v,x} (PR #136824)   Luke Lau via llvm-commits
• [llvm] [GlobalISel] Diagnose inline assembly constraint lowering errors (PR #135782)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Diagnose inline assembly constraint lowering errors (PR #135782)   Matt Arsenault via llvm-commits
• [flang] [llvm] [flang][OpenMP] Extend common::AtomicDefaultMemOrderType enumeration (PR #136312)   Krzysztof Parzyszek via llvm-commits
• [flang] [llvm] [flang][OpenMP] Use OmpMemoryOrderType enumeration in FAIL clause (PR #136313)   Krzysztof Parzyszek via llvm-commits
• [flang] [llvm] [flang][OpenMP] Use OmpMemoryOrderType enumeration in FAIL clause (PR #136313)   Krzysztof Parzyszek via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   Matt Arsenault via llvm-commits
• [llvm] [SPIRV] Change how to detect OpenCL/Vulkan Env and update tests accordingly. (PR #129689)   Marcos Maronas via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Anatoly Trosinenko via llvm-commits
• [llvm] [GlobalISel] Enhance iPTR type support in SDAG patterns (PR #111503)   Matt Arsenault via llvm-commits
• [llvm] Revert "[AMDGPU] Support block load/store for CSR" (PR #136846)   Diana Picus via llvm-commits
• [llvm] Revert "[AMDGPU] Support block load/store for CSR" (PR #136846)   via llvm-commits
• [llvm] 013aab4 - [NFC][LLVM] Add test coverage for all binops to sve-intrinsic-simplify-binop.ll.   Paul Walker via llvm-commits
• [llvm] Revert "[AMDGPU] Support block load/store for CSR" (PR #136846)   via llvm-commits
• [llvm] [SPIRV] Change how to detect OpenCL/Vulkan Env and update tests accordingly. (PR #129689)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Change how to detect OpenCL/Vulkan Env and update tests accordingly. (PR #129689)   Marcos Maronas via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Paschalis Mpeis via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Ryotaro Kasuga via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Ryotaro Kasuga via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Ryotaro Kasuga via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Ryotaro Kasuga via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Ryotaro Kasuga via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Ryotaro Kasuga via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane in the function returns in sgpr. (PR #135326)   Pankaj Dwivedi via llvm-commits
• [llvm] [SPIRV] Change how to detect OpenCL/Vulkan Env and update tests accordingly. (PR #129689)   Marcos Maronas via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Ryotaro Kasuga via llvm-commits
• [llvm] Revert "[AMDGPU] Support block load/store for CSR" (PR #136846)   Diana Picus via llvm-commits
• [llvm] [LiveVariables] Mark use as implicit-def if defined at instr (PR #119446)   Matt Arsenault via llvm-commits
• [llvm] [LiveVariables] Mark use as implicit-def if defined at instr (PR #119446)   Matt Arsenault via llvm-commits
• [llvm] [LiveVariables] Mark use as implicit-def if defined at instr (PR #119446)   Matt Arsenault via llvm-commits
• [llvm] [LiveVariables] Mark use as implicit-def if defined at instr (PR #119446)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Jonathan Thackray via llvm-commits
• [llvm] [LLVM][InstCombine] Enable constant folding for SVE add,and,eor,fadd,fdiv,fsub,orr & sub intrinsics. (PR #136849)   Paul Walker via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Jonathan Thackray via llvm-commits
• [llvm] [InstCombine] Preserve signbit semantics of NaN with fold to fabs (PR #136648)   Yingwei Zheng via llvm-commits
• [llvm] [LLVM][InstCombine] Enable constant folding for SVE add,and,eor,fadd,fdiv,fsub,orr & sub intrinsics. (PR #136849)   via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Jonathan Thackray via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Jonathan Thackray via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Jonathan Thackray via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Jonathan Thackray via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64] Merge scaled and unscaled narrow zero stores (PR #136705)   Guy David via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Jonathan Thackray via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64] Funnel Shift now uses rev32/rev64 instructions (PR #136707)   David Green via llvm-commits
• [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for bitfield extract (PR #132381)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for bitfield extract (PR #132381)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for bitfield extract (PR #132381)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for bitfield extract (PR #132381)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Do not fold logical is_finite test (PR #136851)   Yingwei Zheng via llvm-commits
• [llvm] [IR] Relax convergence requirements on call (PR #135794)   Matt Arsenault via llvm-commits
• [llvm] [IR] Relax convergence requirements on call (PR #135794)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalIsel] support G_FABS for f80 (PR #136718)   Evgenii Kudriashov via llvm-commits
• [llvm] [AArch64] Merge scaled and unscaled narrow zero stores (PR #136705)   Guy David via llvm-commits
• [llvm] Revert "[AMDGPU] Support block load/store for CSR" (PR #136846)   Simon Pilgrim via llvm-commits
• [llvm] 6bb2f90 - Revert "[AMDGPU] Support block load/store for CSR" (#136846)   via llvm-commits
• [llvm] Revert "[AMDGPU] Support block load/store for CSR" (PR #136846)   Diana Picus via llvm-commits
• [llvm] [AArch64][GlobalISel] Perfect Shuffles (PR #106446)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Perfect Shuffles (PR #106446)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Perfect Shuffles (PR #106446)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Perfect Shuffles (PR #106446)   Matt Arsenault via llvm-commits
• [llvm] update_test_checks: Relax DIFile filename checks (PR #135692)   Jeremy Morse via llvm-commits
• [llvm] [AArch64][SVE] Add dot product lowering for PARTIAL_REDUCE_MLA node (PR #130933)   Sander de Smalen via llvm-commits
• [llvm] [InstCombine] Preserve signbit semantics of NaN with fold to fabs (PR #136648)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Preserve signbit semantics of NaN with fold to fabs (PR #136648)   Yingwei Zheng via llvm-commits
• [llvm] 673882c - [gn build] Port 6bb2f90557fb   LLVM GN Syncbot via llvm-commits
• [llvm] [IR] Relax convergence requirements on call (PR #135794)   Nathan Gauër via llvm-commits
• [llvm] [InstCombine] Do not fold logical is_finite test (PR #136851)   Yingwei Zheng via llvm-commits
• [llvm] [IR] Relax convergence requirements on call (PR #135794)   Nathan Gauër via llvm-commits
• [llvm] 1ce709c - [LV] Fix crash when building partial reductions using types that aren't known scale factors (#136680)   via llvm-commits
• [llvm] [LV] Fix crash when building partial reductions using types that aren't known scale factors (PR #136680)   Nicholas Guy via llvm-commits
• [llvm] a1f369e - [AArch64][SVE] Add dot product lowering for PARTIAL_REDUCE_MLA node (#130933)   via llvm-commits
• [llvm] [AArch64][SVE] Add dot product lowering for PARTIAL_REDUCE_MLA node (PR #130933)   Nicholas Guy via llvm-commits
• [llvm] LV: Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (PR #127399)   Graham Hunter via llvm-commits
• [llvm] [LV] Fix stale entry in MinBWs in tryToWiden (PR #136858)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Fix stale entry in MinBWs in tryToWiden (PR #136858)   via llvm-commits
• [llvm] [docs] Reorder metadata examples in note (PR #136859)   via llvm-commits
• [llvm] [docs] Reorder metadata examples in note (PR #136859)   via llvm-commits
• [llvm] [docs] Reorder metadata examples in note (PR #136859)   via llvm-commits
• [llvm] [X86] shouldReduceLoadWidth - don't split loads if ANY uses are a extract+store or a full width legal binop (PR #129695)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] [SelectionDAG] Improve type legalisation for PARTIAL_REDUCE_MLA (PR #130935)   Nicholas Guy via llvm-commits
• [llvm] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Jonathan Thackray via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Jonathan Thackray via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Jonathan Thackray via llvm-commits
• [llvm] [X86] shouldReduceLoadWidth - don't split loads if ANY uses are a extract+store or a full width legal binop (PR #129695)   via llvm-commits
• [clang] [llvm] [RISCV] Add support for Ziccamoc (PR #136694)   via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Pawan Nirpal via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] 5b0cd17 - [Clang][llvm] Implement fp8 FMOP4A intrinsics (#130127)   via llvm-commits
• [clang] [llvm] [Clang][llvm] Implement fp8 FMOP4A intrinsics (PR #130127)   Virginia Cangelosi via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   via llvm-commits
• [llvm] [LoopVersioningLICM] Only mark pointers with generated checks as noalias (PR #135168)   John Brawn via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Pawan Nirpal via llvm-commits
• [llvm] [DAGCombiner] Add DAG combine for PARTIAL_REDUCE_MLA when no mul op (PR #131326)   Nicholas Guy via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [clang] [llvm] [RISCV] Add support for Ziccamoc (PR #136694)   via llvm-commits
• [llvm] [X86] shouldReduceLoadWidth - don't split loads if ANY uses are a extract+store or a full width legal binop (PR #129695)   Simon Pilgrim via llvm-commits
• [llvm] [X86] shouldReduceLoadWidth - don't split loads if ANY uses are a extract+store or a full width legal binop (PR #129695)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][SVE] Add lowering for PARTIAL_REDUCE_U/SMLA to USDOT (PR #131327)   Nicholas Guy via llvm-commits
• [llvm] 92bba68 - [Offload] Fix handling of 'bare' mode when environment missing (#136794)   via llvm-commits
• [llvm] [Offload] Fix handling of 'bare' mode when environment missing (PR #136794)   Joseph Huber via llvm-commits
• [llvm] [SelectionDAG] Improve type legalisation for PARTIAL_REDUCE_MLA (PR #130935)   Nicholas Guy via llvm-commits
• [llvm] [X86] shouldReduceLoadWidth - don't split loads if ANY uses are a extract+store or a full width legal binop (PR #129695)   Simon Pilgrim via llvm-commits
• [llvm] [LoopVersioningLICM] Only mark pointers with generated checks as noalias (PR #135168)   John Brawn via llvm-commits
• [llvm] [DAGCombiner] Add DAG combine for PARTIAL_REDUCE_MLA when no mul op (PR #131326)   Nicholas Guy via llvm-commits
• [llvm] [DAGCombiner] Add DAG combine for PARTIAL_REDUCE_MLA when no mul op (PR #131326)   Nicholas Guy via llvm-commits
• [llvm] [DAGCombiner] Add DAG combine for PARTIAL_REDUCE_MLA when no mul op (PR #131326)   Nicholas Guy via llvm-commits
• [llvm] [SelectionDAG] Improve type legalisation for PARTIAL_REDUCE_MLA (PR #130935)   via llvm-commits
• [llvm] [DAGCombiner] Add DAG combine for PARTIAL_REDUCE_MLA when no mul op (PR #131326)   Nicholas Guy via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] [AArch64][SVE] Add lowering for PARTIAL_REDUCE_U/SMLA to USDOT (PR #131327)   Nicholas Guy via llvm-commits
• [llvm] [DAGCombiner] Add DAG combine for PARTIAL_REDUCE_MLA when no mul op (PR #131326)   via llvm-commits
• [llvm] [AArch64][SVE] Add lowering for PARTIAL_REDUCE_U/SMLA to USDOT (PR #131327)   via llvm-commits
• [llvm] [AArch64][SVE] Add lowering for PARTIAL_REDUCE_U/SMLA to USDOT (PR #131327)   via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [clang] [llvm] [OpenMP] Update the bitcode library install and search path (PR #136754)   Joseph Huber via llvm-commits
• [clang] [llvm] [OpenMP] Update the bitcode library install and search path (PR #136754)   Joseph Huber via llvm-commits
• [llvm] [LV] Fix crash when building partial reductions using types that aren't known scale factors (PR #136680)   Nicholas Guy via llvm-commits
• [llvm] [LV] Fix crash when building partial reductions using types that aren't known scale factors (PR #136680)   Nicholas Guy via llvm-commits
• [clang] [llvm] [openmp] [OpenMP] Change build of OpenMP device runtime to be a separate runtime (PR #136729)   Joseph Huber via llvm-commits
• [llvm] 91e1922 - [DSE] Skip non-pointer args in initializes handling (NFCI)   Nikita Popov via llvm-commits
• [llvm] 14dee0a - [NewGVN] Avoid AA query on non-pointers (NFCI)   Nikita Popov via llvm-commits
• [clang] [llvm] [RISCV] Add support for Ziccamoc (PR #136694)   Pengcheng Wang via llvm-commits
• [llvm] 01ee03c - [CoroElide] Avoid AA query on non-pointers (NFCI)   Nikita Popov via llvm-commits
• [llvm] 208257f - [CoroElide] Remove unnecessary bitcast (NFCI)   Nikita Popov via llvm-commits
• [llvm] [llvm][docs] Remove unnecessary apostrophe (PR #136844)   via llvm-commits
• [clang] [llvm] [MIPS] Add FeatureMSA to i6400 and i6500 cores (PR #134985)   Mallikarjuna Gouda via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Remove Named flag from OperatorInfo::Member entries (PR #136862)   Michael Buch via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Remove Named flag from OperatorInfo::Member entries (PR #136862)   via llvm-commits
• [clang] [llvm] [MIPS] Add FeatureMSA to i6400 and i6500 cores (PR #134985)   Mallikarjuna Gouda via llvm-commits
• [clang] [llvm] [openmp] [OpenMP] Change build of OpenMP device runtime to be a separate runtime (PR #136729)   Joseph Huber via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Remove Named flag from OperatorInfo::Member entries (PR #136862)   Michael Buch via llvm-commits
• [llvm] [DAGCombiner] Add DAG combine for PARTIAL_REDUCE_MLA when no mul op (PR #131326)   Nicholas Guy via llvm-commits
• [llvm] [AArch64][SVE] Add lowering for PARTIAL_REDUCE_U/SMLA to USDOT (PR #131327)   Nicholas Guy via llvm-commits
• [llvm] [openmp] [OpenMP] Change build of OpenMP device runtime to be a separate runtime (PR #136729)   Joseph Huber via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Tom Eccles via llvm-commits
• [llvm] [SelectionDAG] Improve type legalisation for PARTIAL_REDUCE_MLA (PR #130935)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG] Improve type legalisation for PARTIAL_REDUCE_MLA (PR #130935)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG] Improve type legalisation for PARTIAL_REDUCE_MLA (PR #130935)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG] Improve type legalisation for PARTIAL_REDUCE_MLA (PR #130935)   Benjamin Maxwell via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Support for DLL export (PR #136014)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Improve type legalisation for PARTIAL_REDUCE_MLA (PR #130935)   Benjamin Maxwell via llvm-commits
• [llvm] [NFC] Add a pre-commit test case for #111696 (PR #136730)   Amy Kwan via llvm-commits
• [clang] [llvm] [Clang][llvm] Implement fp8 FMOP4A intrinsics (PR #130127)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Disable pauth and ldgm as unsupported instructions fixed (PR #136868)   Lakshay Kumar via llvm-commits
• [llvm] [JumpThreading] Do not unfold select if block has address taken and used (PR #135106)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   via llvm-commits
• [llvm] [NFC] Add a pre-commit test case for #111696 (PR #136730)   Amy Kwan via llvm-commits
• [llvm] [NFC] Add a pre-commit test case for #111696 (PR #136730)   Amy Kwan via llvm-commits
• [llvm] [NFC] Add a pre-commit test case for #111696 (PR #136730)   Amy Kwan via llvm-commits
• [llvm] [AArch64][SVE] Add lowering for PARTIAL_REDUCE_U/SMLA to USDOT (PR #131327)   Benjamin Maxwell via llvm-commits
• [llvm] 5afe859 - [OMPIRBuilder] Remove unnecessary pointer bitcasts (NFCI)   Nikita Popov via llvm-commits
• [llvm] [AArch64][SVE] Add lowering for PARTIAL_REDUCE_U/SMLA to USDOT (PR #131327)   Benjamin Maxwell via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Remove Named flag from OperatorInfo::Member entries (PR #136862)   Michael Buch via llvm-commits
• [llvm] [X86] shouldReduceLoadWidth - don't split loads if we can freely reuse full width legal binop (PR #129695)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][LLVM] Document and adopt variadic `isa` in a few places (PR #136869)   Rahul Joshi via llvm-commits
• [llvm] [AArch64][SVE] Add lowering for PARTIAL_REDUCE_U/SMLA to USDOT (PR #131327)   Benjamin Maxwell via llvm-commits
• [clang] [llvm] [OpenMP] Update the bitcode library install and search path (PR #136754)   LLVM Continuous Integration via llvm-commits
• [llvm] AMDGPU/MC: Fix emitting absolute expressions (PR #136789)   Nicolai Hähnle via llvm-commits
• [llvm] [NFC][AArch64][GlobalISel] Add test coverage for vector load/store legalization (PR #134904)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Sander de Smalen via llvm-commits
• [llvm] AMDGPU/MC: Fix emitting absolute expressions (PR #136789)   Matt Arsenault via llvm-commits
• [llvm] [DAG] narrowExtractedVectorLoad - reuse existing SDLoc. NFC (PR #136870)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] narrowExtractedVectorLoad - reuse existing SDLoc. NFC (PR #136870)   via llvm-commits
• [llvm] [DAG] narrowExtractedVectorLoad - reuse existing SDLoc. NFC (PR #136870)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Improve type legalisation for PARTIAL_REDUCE_MLA (PR #130935)   Sander de Smalen via llvm-commits
• [llvm] [SelectionDAG] Improve type legalisation for PARTIAL_REDUCE_MLA (PR #130935)   Sander de Smalen via llvm-commits
• [llvm] [SelectionDAG] Improve type legalisation for PARTIAL_REDUCE_MLA (PR #130935)   Sander de Smalen via llvm-commits
• [llvm] e58d227 - [NFC][AArch64][GlobalISel] Add test coverage for vector load/store legalization (#134904)   via llvm-commits
• [llvm] [NFC][AArch64][GlobalISel] Add test coverage for vector load/store legalization (PR #134904)   Tobias Stadler via llvm-commits
• [llvm] [InstCombine] Fold tan(x) * cos(x) => sin(x) (PR #136319)   via llvm-commits
• [llvm] [DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks (PR #136205)   Vladislav Dzhidzhoev via llvm-commits
• [compiler-rt] [compiler-rt] Make sure __clzdi2 doesn't call itself recursively on sparc64 (PR #136737)   via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Disable pauth and ldgm as unsupported instructions fixed (PR #136868)   Lakshay Kumar via llvm-commits
• [lldb] [llvm] Add RISC-V CPU type and CPU subtype to llvm & lldb (PR #136785)   Jonas Devlieghere via llvm-commits
• [compiler-rt] [asan] Implement address sanitizer on AIX: memory mapping (6/6) (PR #136874)   Jake Egan via llvm-commits
• [compiler-rt] [asan] Implement address sanitizer on AIX: memory mapping (6/6) (PR #136874)   via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Remove Named flag from OperatorInfo::Member entries (PR #136862)   Nathan Sidwell via llvm-commits
• [flang] [llvm] [Flang][OpenACC] Make async clause on data consistent with elsewhere (PR #136866)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [AArch64][SVE] Add lowering for PARTIAL_REDUCE_U/SMLA to USDOT (PR #131327)   Benjamin Maxwell via llvm-commits
• [compiler-rt] [compiler-rt] Make sure __clzdi2 doesn't call itself recursively on sparc64 (PR #136737)   via llvm-commits
• [llvm] [DebugInfo][ConstraintElimination] Fix debug value loss in replacing comparisons with the speculated constants (PR #136839)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [DebugInfo][ConstraintElimination] Fix debug value loss in replacing comparisons with the speculated constants (PR #136839)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [DebugInfo][ConstraintElimination] Fix debug value loss in replacing comparisons with the speculated constants (PR #136839)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [DebugInfo][ConstraintElimination] Fix debug value loss in replacing comparisons with the speculated constants (PR #136839)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [DebugInfo][ConstraintElimination] Fix debug value loss in replacing comparisons with the speculated constants (PR #136839)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [NVPTX] Add mix precision arith intrinsics (PR #136657)   Alex MacLean via llvm-commits
• [llvm] [RISCV] Add CompressPat for all cases in isCopyInstrImpl (PR #136875)   Alex Bradbury via llvm-commits
• [llvm] [AMDGPU][MC] test update with script for gfx11/gfx12 mc test (PR #135527)   Ivan Kosarev via llvm-commits
• [lldb] [llvm] Add RISC-V CPU type and CPU subtype to llvm & lldb (PR #136785)   David Spickett via llvm-commits
• [llvm] [ObjC][ProvenanceEval] Only evaluate pointers (PR #136876)   Nikita Popov via llvm-commits
• [llvm] [RISCV] Add CompressPat for all cases in isCopyInstrImpl (PR #136875)   Alex Bradbury via llvm-commits
• [llvm] [ObjC][ProvenanceEval] Only evaluate pointers (PR #136876)   via llvm-commits
• [llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)   Ryotaro Kasuga via llvm-commits
• [llvm] [NFC][AArch64][GlobalISel] Add test coverage for vector load/store legalization (PR #134904)   LLVM Continuous Integration via llvm-commits
• [lldb] [llvm] Add RISC-V CPU type and CPU subtype to llvm & lldb (PR #136785)   Jonas Devlieghere via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [NVPTX] Consistently check fast-math flags when lowering div (PR #136890)   Alex MacLean via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   Sergei Barannikov via llvm-commits
• [llvm] [NVPTX] Consistently check fast-math flags when lowering div (PR #136890)   via llvm-commits
• [llvm] [NVPTX] Consistently check fast-math flags when lowering div (PR #136890)   via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [lldb] [llvm] Add RISC-V CPU type and CPU subtype to llvm & lldb (PR #136785)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [lldb] [llvm] Add RISC-V CPU type and CPU subtype to llvm & lldb (PR #136785)   David Spickett via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [lldb] [llvm] Add RISC-V CPU type and CPU subtype to llvm & lldb (PR #136785)   David Spickett via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [llvm] [NVPTX] Consistently check fast-math flags when lowering div (PR #136890)   Alex MacLean via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [clang] [llvm] [clang] [OpenMP] New OpenMP 6.0 self_maps clause - CodeGen (PR #134131)   via llvm-commits
• [llvm] [InstCombine] Fold bitcast (extelt (bitcast X), Idx) into bitcast+shufflevector. (PR #136998)   Ricardo Jesus via llvm-commits
• [llvm] [InstCombine] Fold bitcast (extelt (bitcast X), Idx) into bitcast+shufflevector. (PR #136998)   via llvm-commits
• [clang] [llvm] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   via llvm-commits
• [clang] [llvm] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (PR #136842)   Craig Topper via llvm-commits
• [clang] [llvm] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   via llvm-commits
• [llvm] [mlir][bazel] Remove unnecessary dependencies. (PR #136999)   Christian Sigg via llvm-commits
• [llvm] [InstCombine] Fold bitcast (extelt (bitcast X), Idx) into bitcast+shufflevector. (PR #136998)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][LLVM][IR] Adopt vadiadic `isa<>` (PR #137001)   Rahul Joshi via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Support for DLL export (PR #136014)   Andrew Rogers via llvm-commits
• [llvm] [RFC][TableGen] Require DAG argument for complex operands in InstAlias (PR #136411)   Rahul Joshi via llvm-commits
• [llvm] [InstCombine] Fold bitcast (extelt (bitcast X), Idx) into bitcast+shufflevector. (PR #136998)   Ricardo Jesus via llvm-commits
• [clang] [llvm] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   via llvm-commits
• [compiler-rt] [asan] Implement address sanitizer on AIX: memory mapping (6/6) (PR #136874)   Jake Egan via llvm-commits
• [clang] [llvm] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   via llvm-commits
• [clang] [llvm] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold bitcast (extelt (bitcast X), Idx) into bitcast+shufflevector. (PR #136998)   Simon Pilgrim via llvm-commits
• [llvm] [DependenceAnalysis] Extending SIV to handle separate loops (PR #128782)   Alireza Torabian via llvm-commits
• [llvm] [IVDescriptors] Don't require nsz/nnan for (min|max)num. (PR #137003)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] Fold bitcast (extelt (bitcast X), Idx) into bitcast+shufflevector. (PR #136998)   Ricardo Jesus via llvm-commits
• [llvm] [IVDescriptors] Don't require nsz/nnan for (min|max)num. (PR #137003)   via llvm-commits
• [llvm] [IVDescriptors] Don't require nsz/nnan for (min|max)num. (PR #137003)   via llvm-commits
• [llvm] [RFC][TableGen] Require DAG argument for complex operands in InstAlias (PR #136411)   Sergei Barannikov via llvm-commits
• [clang] [llvm] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (PR #136842)   Pengcheng Wang via llvm-commits
• [lldb] [llvm] Add RISC-V CPU type and CPU subtype to llvm & lldb (PR #136785)   Jonas Devlieghere via llvm-commits
• [llvm] [LV] Add test for #87407 (PR #137005)   Ramkumar Ramachandra via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [LV] Add test for #87407 (PR #137005)   via llvm-commits
• [llvm] [AArch64] Replace 64-bit MADD with [SU]MADDL when possible (PR #135926)   David Green via llvm-commits
• [clang] [clang-tools-extra] [flang] [lldb] [llvm] [mlir] [openmp] [polly] [Documentation] Always use SVG for dot-generated doxygen images. (PR #136843)   Aaron Ballman via llvm-commits
• [llvm] [VPlan][LoopVectorize] Truncate min/max intrinsic ops (PR #90643)   Ramkumar Ramachandra via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [lld] [LLD][COFF] add __{data,bss}_{start,end}__ symbols for Cygwin support (PR #136180)   via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [openmp] [OpenMP] Change build of OpenMP device runtime to be a separate runtime (PR #136729)   Johannes Doerfert via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [RISCV] Add CompressPat for all cases in isCopyInstrImpl (PR #136875)   Craig Topper via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [RFC][TableGen] Require DAG argument for complex operands in InstAlias (PR #136411)   Rahul Joshi via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [lldb] [llvm] Add RISC-V CPU type and CPU subtype to llvm & lldb (PR #136785)   David Spickett via llvm-commits
• [llvm] [openmp] [OpenMP] Change build of OpenMP device runtime to be a separate runtime (PR #136729)   Joseph Huber via llvm-commits
• [llvm] 7915124 - [DAG] narrowExtractedVectorLoad - reuse existing SDLoc. NFC (#136870)   via llvm-commits
• [llvm] [DAG] narrowExtractedVectorLoad - reuse existing SDLoc. NFC (PR #136870)   Simon Pilgrim via llvm-commits
• [llvm] [LLVM][Cygwin] Fix shared library name (PR #136599)   via llvm-commits
• [llvm] [mlir] [mlir][gpu] Change GPU modules to globals (PR #135478)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [LLVM][Cygwin] Fix shared library name (PR #136599)   via llvm-commits
• [llvm] [SYCL][LLVM] Adding property set I/O library for SYCL (PR #110771)   Arvind Sudarsanam via llvm-commits
• [llvm] [SYCL][LLVM] Adding property set I/O library for SYCL (PR #110771)   Arvind Sudarsanam via llvm-commits
• [llvm] [LLVM][Cygwin] Fix shared library name (PR #136599)   via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Remove Named flag from OperatorInfo::Member entries (PR #136862)   Michael Buch via llvm-commits
• [llvm] [RISCV] Add branch folding before branch relaxation (PR #134760)   Craig Topper via llvm-commits
• [llvm] 2e389cb - [Flang][OpenACC] Make async clause on data consistent with elsewhere (#136866)   via llvm-commits
• [flang] [llvm] [Flang][OpenACC] Make async clause on data consistent with elsewhere (PR #136866)   Erich Keane via llvm-commits
• [llvm] [NFC][LLVM] Document and adopt variadic `isa` in a few places (PR #136869)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM] Document and adopt variadic `isa` in a few places (PR #136869)   via llvm-commits
• [llvm] [NFC][LLVM] Document and adopt variadic `isa` in a few places (PR #136869)   via llvm-commits
• [llvm] [NFC][LLVM] Document and adopt variadic `isa` in a few places (PR #136869)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM] Document and adopt variadic `isa` in a few places (PR #136869)   Rahul Joshi via llvm-commits
• [llvm] [openmp] [OpenMP] Change build of OpenMP device runtime to be a separate runtime (PR #136729)   Johannes Doerfert via llvm-commits
• [llvm] [NFC][LLVM] Document and adopt variadic `isa` in a few places (PR #136869)   Rahul Joshi via llvm-commits
• [llvm] [VPlan] Fix typo in assertion. NFC (PR #137009)   Luke Lau via llvm-commits
• [lld] [LLD][COFF] add __{data,bss}_{start,end}__ symbols for Cygwin support (PR #136180)   Martin Storsjö via llvm-commits
• [llvm] [VPlan] Fix typo in assertion. NFC (PR #137009)   via llvm-commits
• [llvm] [VPlan] Fix typo in assertion. NFC (PR #137009)   via llvm-commits
• [llvm] 8abc917 - [InstCombine] Do not fold logical is_finite test (#136851)   via llvm-commits
• [llvm] [InstCombine] Do not fold logical is_finite test (PR #136851)   Yingwei Zheng via llvm-commits
• [llvm] AMDGPU/MC: Fix emitting absolute expressions (PR #136789)   Nicolai Hähnle via llvm-commits
• [llvm] 24c8605 - AMDGPU/MC: Fix emitting absolute expressions (#136789)   via llvm-commits
• [llvm] AMDGPU/MC: Fix emitting absolute expressions (PR #136789)   Nicolai Hähnle via llvm-commits
• [llvm] [RISCV] Add branch folding before branch relaxation (PR #134760)   Philip Reames via llvm-commits
• [llvm] [NVPTX] Switch to untyped float registers (PR #137011)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Switch to untyped float registers (PR #137011)   via llvm-commits
• [llvm] [llvm] Ensure propagated constants in the vtable are aligned (PR #136630)   Paul Kirth via llvm-commits
• [llvm] [DirectX] Implement the ForwardHandleAccesses pass (PR #135378)   Justin Bogner via llvm-commits
• [llvm] [VPlan][LoopVectorize] Truncate min/max intrinsic ops (PR #90643)   Ramkumar Ramachandra via llvm-commits
• [llvm] [MC] Use StringTable for MCSchedClassDesc names (PR #137012)   Jay Foad via llvm-commits
• [llvm] [Analysis]: Allow inlining recursive call IF recursion depth is 1. (PR #119677)   David Green via llvm-commits
• [llvm] [Analysis]: Allow inlining recursive call IF recursion depth is 1. (PR #119677)   David Green via llvm-commits
• [llvm] [DirectX] Implement the ForwardHandleAccesses pass (PR #135378)   Justin Bogner via llvm-commits
• [llvm] [Analysis]: Allow inlining recursive call IF recursion depth is 1. (PR #119677)   David Green via llvm-commits
• [llvm] [MC] Use StringTable for MCSchedClassDesc names (PR #137012)   via llvm-commits
• [llvm] [MC] Use StringTable for MCSchedClassDesc names (PR #137012)   via llvm-commits
• [llvm] [InstCombine][DebugInfo] Update debug value uses in `freelyInvertAllUsersOf` (PR #137013)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine][DebugInfo] Update debug info after inverting a boolean instruction (PR #71212)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine][DebugInfo] Update debug info after inverting a boolean instruction (PR #71212)   Yingwei Zheng via llvm-commits
• [llvm] 2f0cd0c - [NFCI] Move ProfOStream from InstrProfWriter.cpp to InstrProf.h/cpp (#136791)   via llvm-commits
• [llvm] [NFCI] Move ProfOStream from InstrProfWriter.cpp to InstrProf.h/cpp (PR #136791)   Mingming Liu via llvm-commits
• [llvm] [InstCombine][DebugInfo] Update debug value uses in `freelyInvertAllUsersOf` (PR #137013)   via llvm-commits
• [llvm] [BOLT] Enable hugify for AArch64 (PR #117158)   via llvm-commits
• [llvm] [DirectX] Implement the ForwardHandleAccesses pass (PR #135378)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Implement the ForwardHandleAccesses pass (PR #135378)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Implement the ForwardHandleAccesses pass (PR #135378)   Justin Bogner via llvm-commits
• [llvm] a83b4a2 - [DirectX] Implement the ForwardHandleAccesses pass (#135378)   via llvm-commits
• [llvm] [DirectX] Implement the ForwardHandleAccesses pass (PR #135378)   Justin Bogner via llvm-commits
• [llvm] [DWARFLinker] Update `stmt-seq-macho.test` to use `update_test_body.py` (PR #133363)   via llvm-commits
• [llvm] [RISCV] Check the extension type for atomic loads in isel patterns. (PR #137019)   Craig Topper via llvm-commits
• [llvm] [RISCV] Check the extension type for atomic loads in isel patterns. (PR #137019)   via llvm-commits
• [llvm] [LangRef] No target-specific size limit for atomics (PR #136864)   Eli Friedman via llvm-commits
• [llvm] [BOLT][NFCI] Emit uniform diagnostics in DataAggregator (PR #136530)   Amir Ayupov via llvm-commits
• [llvm] [RISCV] Remove `AND` mask generated by `( zext ( atomic_load ) )` by replacing the load with `zextload` for orderings not stronger then monotonic. (PR #136502)   Craig Topper via llvm-commits
• [llvm] [DirectX] Implement the ForwardHandleAccesses pass (PR #135378)   LLVM Continuous Integration via llvm-commits
• [llvm] [RFC][TableGen] Require DAG argument for complex operands in InstAlias (PR #136411)   Paul Walker via llvm-commits
• [llvm] [RFC][TableGen] Require DAG argument for complex operands in InstAlias (PR #136411)   Paul Walker via llvm-commits
• [llvm] [RFC][TableGen] Require DAG argument for complex operands in InstAlias (PR #136411)   Paul Walker via llvm-commits
• [llvm] [RFC][TableGen] Require DAG argument for complex operands in InstAlias (PR #136411)   Paul Walker via llvm-commits
• [llvm] [LLVM][Cygwin] Fix shared library name (PR #136599)   via llvm-commits
• [llvm] [AMDGPU] Use variadic isa<>. NFC. (PR #137016)   Shilei Tian via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Disable pauth and ldgm as unsupported instructions fixed (PR #136868)   Lakshay Kumar via llvm-commits
• [llvm] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update GFX11Plus codegen test with true16 flag (PR #135078)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update GFX11Plus codegen test with true16 flag (PR #135078)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update GFX11Plus codegen test with true16 flag (PR #135078)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update GFX11Plus codegen test with true16 flag (PR #135078)   Brox Chen via llvm-commits
• [llvm] 6dbc01e - [AMDGPU][True16][CodeGen] update GFX11Plus codegen test with true16 flag (#135078)   via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kiran Chandramohan via llvm-commits
• [llvm] [MC] Use StringTable for MCSchedClassDesc names (PR #137012)   Min-Yih Hsu via llvm-commits
• [llvm] [MC] Use StringTable for MCSchedClassDesc names (PR #137012)   Min-Yih Hsu via llvm-commits
• [llvm] [mlir] [mlir][gpu] Change GPU modules to globals (PR #135478)   Fabian Mora via llvm-commits
• [llvm] [RFC][TableGen] Require DAG argument for complex operands in InstAlias (PR #136411)   Sergei Barannikov via llvm-commits
• [llvm] [NFC][LLVM][IR] Adopt vadiadic `isa<>` (PR #137001)   Rahul Joshi via llvm-commits
• [lld] [LLD][COFF] add __{data,bss}_{start,end}__ symbols for Cygwin support (PR #136180)   via llvm-commits
• [llvm] [RFC][TableGen] Require DAG argument for complex operands in InstAlias (PR #136411)   Sergei Barannikov via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   Akash Dutta via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   via llvm-commits
• [llvm] [AArch64] Merge scaled and unscaled narrow zero stores (PR #136705)   Jon Roelofs via llvm-commits
• [llvm] [AArch64] Merge scaled and unscaled narrow zero stores (PR #136705)   Jon Roelofs via llvm-commits
• [llvm] [AArch64] Merge scaled and unscaled narrow zero stores (PR #136705)   Jon Roelofs via llvm-commits
• [llvm] [X86][GlobalIsel] support G_FABS for f80 (PR #136718)   via llvm-commits
• [llvm] [VPlan] Fix typo in assertion. NFC (PR #137009)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [DirectX] Fix shader flag version-checking logic to match DXC (PR #136787)   Finn Plummer via llvm-commits
• [llvm] SelectionDAG: Add missing AddNodeIDCustom case for MDNodeSDNode. (PR #136805)   Peter Collingbourne via llvm-commits
• [llvm] Fix stmt-seq-macho.test for little endian platforms (PR #137017)   via llvm-commits
• [llvm] dbb8434 - SelectionDAG: Add missing AddNodeIDCustom case for MDNodeSDNode.   via llvm-commits
• [llvm] SelectionDAG: Add missing AddNodeIDCustom case for MDNodeSDNode. (PR #136805)   Peter Collingbourne via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Lane (NFC). (PR #137030)   Florian Hahn via llvm-commits
• [llvm] [LLVM][ISel][AArch64 Remove AArch64ISD::FCM##z nodes. (PR #135817)   via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Lane (NFC). (PR #137030)   via llvm-commits
• [llvm] 213424b - Add MachO RISC-V CPU type and CPU subtype to llvm & lldb (#136785)   via llvm-commits
• [lldb] [llvm] Add RISC-V CPU type and CPU subtype to llvm & lldb (PR #136785)   Jonas Devlieghere via llvm-commits
• [llvm] [AArch64] Merge scaled and unscaled narrow zero stores (PR #136705)   Florian Hahn via llvm-commits
• [llvm] Fix stmt-seq-macho.test for little endian platforms (PR #137017)   Jonas Devlieghere via llvm-commits
• [lld] [LLD][COFF] add __{data,bss}_{start,end}__ symbols for Cygwin support (PR #136180)   via llvm-commits
• [llvm] Fix stmt-seq-macho.test for little endian platforms (PR #137017)   Hubert Tong via llvm-commits
• [lld] [LLD][COFF] add __{data,bss}_{start,end}__ symbols for Cygwin support (PR #136180)   via llvm-commits
• [lld] [LLD][COFF] add __{data,bss}_{start,end}__ symbols for Cygwin support (PR #136180)   via llvm-commits
• [llvm] bdf21ca - [LV] Fix missing entry in willGenerateVectors (#136712)   via llvm-commits
• [llvm] [LV] Fix missing entry in willGenerateVectors (PR #136712)   Ramkumar Ramachandra via llvm-commits
• [llvm] 98eb476 - Fix stmt-seq-macho.test for little endian platforms (#137017)   via llvm-commits
• [llvm] Fix stmt-seq-macho.test for little endian platforms (PR #137017)   via llvm-commits
• [llvm] [LLVM][ISel][AArch64 Remove AArch64ISD::FCM##z nodes. (PR #135817)   via llvm-commits
• [llvm] [LLVM][Cygwin] Fix shared library name (PR #136599)   via llvm-commits
• [llvm] [LV] Fix MinBWs in WidenIntrinsic case (PR #137005)   Ramkumar Ramachandra via llvm-commits
• [llvm] [DirectX] Fix shader flag version-checking logic to match DXC (PR #136787)   Deric C. via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Adrian Prantl via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Adrian Prantl via llvm-commits
• [llvm] [Offload] Fix missing dependency on `clang-nvlink-wrapper' (PR #137033)   Joseph Huber via llvm-commits
• [llvm] [Offload] Deprecate `openmp` and `offload` projects (PR #136314)   Joseph Huber via llvm-commits
• [llvm] [Offload] Deprecate `openmp` and `offload` projects builds (PR #136314)   Joseph Huber via llvm-commits
• [llvm] [Flang-rt] Forward `libomp-mod` dependency for non-default runtime builds (PR #137035)   Joseph Huber via llvm-commits
• [llvm] [NVPTX] Switch to untyped float registers (PR #137011)   Justin Fargnoli via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   Matt Arsenault via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support for dispatch construct (Sema & Codegen) support (PR #131838)   Shilei Tian via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support for dispatch construct (Sema & Codegen) support (PR #131838)   Shilei Tian via llvm-commits
• [clang] [llvm] Reland "[HLSL][RootSignature] Implement initial parsing of the descriptor table clause params" (PR #136740)   Finn Plummer via llvm-commits
• [clang] [llvm] Reland "[HLSL][RootSignature] Implement initial parsing of the descriptor table clause params" (PR #136740)   Finn Plummer via llvm-commits
• [llvm] [RISCV] Check the extension type for atomic loads in isel patterns. (PR #137019)   Matt Arsenault via llvm-commits
• [llvm] [NFC][LLVM] Document and adopt variadic `isa` in a few places (PR #136869)   Matt Arsenault via llvm-commits
• [llvm] b8e420e - Reland "[HLSL][RootSignature] Implement initial parsing of the descriptor table clause params" (#136740)   via llvm-commits
• [clang] [llvm] Reland "[HLSL][RootSignature] Implement initial parsing of the descriptor table clause params" (PR #136740)   Finn Plummer via llvm-commits
• [llvm] [RISCV] Initial codegen support for zvqdotq extension (PR #137039)   Philip Reames via llvm-commits
• [llvm] [RISCV] Initial codegen support for zvqdotq extension (PR #137039)   via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/ADT for DLL export (PR #136629)   Vassil Vassilev via llvm-commits
• [llvm] [Offload] Fix missing dependency on `clang-nvlink-wrapper' (PR #137033)   Tom Stellard via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Support for DLL export (PR #136014)   Vassil Vassilev via llvm-commits
• [llvm] [Offload] Fix missing dependency on `clang-nvlink-wrapper' (PR #137033)   Joseph Huber via llvm-commits
• [llvm] [RISCV] Add CompressPat for all cases in isCopyInstrImpl (PR #136875)   Alex Bradbury via llvm-commits
• [llvm] [Offload] Fix missing dependency on `clang-nvlink-wrapper' (PR #137033)   Aaron Jarmusch via llvm-commits
• [llvm] [IVDescriptors] Don't require nsz/nnan for (min|max)num. (PR #137003)   Andy Kaylor via llvm-commits
• [llvm] bc11987 - [Offload] Fix missing dependency on `clang-nvlink-wrapper' (#137033)   via llvm-commits
• [llvm] [Offload] Fix missing dependency on `clang-nvlink-wrapper' (PR #137033)   Joseph Huber via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/ADT for DLL export (PR #136629)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Analysis for DLL export (PR #136623)   Andrew Rogers via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Support for DLL export (PR #136014)   Andrew Rogers via llvm-commits
• [llvm] [RISCV] Add fixed-length patterns for disjoint or patterns for vwadd[u].v{v,x} (PR #136824)   Philip Reames via llvm-commits
• [llvm] AArch64: Use PTRUE_B as much as possible to increase CSE (PR #137042)   Matthias Braun via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [clang] [clang-tools-extra] [flang] [lldb] [llvm] [mlir] [openmp] [polly] [Documentation] Always use SVG for dot-generated doxygen images. (PR #136843)   John Ericson via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [llvm] [RISCV] Deprecate `riscv.segN.load/store` in favor of their mask variants (PR #137045)   via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Sander de Smalen via llvm-commits
• [clang] [llvm] [NFC][RootSignatures] Conform to new std::optional calling conventions (PR #136747)   Finn Plummer via llvm-commits
• [clang] [llvm] Reland "[HLSL][RootSignature] Implement initial parsing of the descriptor table clause params" (PR #136740)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [lld] [LLD][COFF] add __{data,bss}_{start,end}__ symbols for Cygwin support (PR #136180)   Martin Storsjö via llvm-commits
• [llvm] [InstCombine] Fold tan(x) * cos(x) => sin(x) (PR #136319)   Matt Arsenault via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [llvm] [NFC] [AArch64] Simplify offset scaling in ldst-opt (PR #137044)   Florian Hahn via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [llvm] [AMDGPU] add s_bitset[10]_b32 optimization for shl+[or, andn2] pattern (PR #134155)   Matt Arsenault via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [clang] [llvm] [CMake] Add a linker test for -Bsymbolic-functions to AddLLVM (PR #79539)   via llvm-commits
• [llvm] [Flang][LLVM] Remove leftover CMake for old flang handling (PR #137049)   Joseph Huber via llvm-commits
• [llvm] [IVDescriptors] Don't require nsz/nnan for (min|max)num. (PR #137003)   Nikita Popov via llvm-commits
• [lld] [LLD][COFF] add __{data,bss}_{start,end}__ symbols for Cygwin support (PR #136180)   via llvm-commits
• [llvm] [NFC][LLVM] Document and adopt variadic `isa` in a few places (PR #136869)   Rahul Joshi via llvm-commits
• [clang] [llvm] [NFC][RootSignatures] Conform to new std::optional calling conventions (PR #136747)   Justin Bogner via llvm-commits
• [llvm] [InstCombine] Fold tan(x) * cos(x) => sin(x) (PR #136319)   Andy Kaylor via llvm-commits
• [lld] [LLD][COFF] add __{data,bss}_{start,end}__ symbols for Cygwin support (PR #136180)   via llvm-commits
• [llvm] [InstCombine] Fold tan(x) * cos(x) => sin(x) (PR #136319)   Matt Arsenault via llvm-commits
• [llvm] SPIRV: Simplify phi processing (PR #137050)   Matt Arsenault via llvm-commits
• [llvm] SPIRV: Simplify phi processing (PR #137050)   Matt Arsenault via llvm-commits
• [llvm] SPIRV: Simplify phi processing (PR #137050)   Matt Arsenault via llvm-commits
• [llvm] SPIRV: Simplify phi processing (PR #137050)   via llvm-commits
• [llvm] [memprof] Move writeMemProf to a separate file (PR #137051)   Kazu Hirata via llvm-commits
• [llvm] SPIRV: Set NoPHIs property after selection (PR #136327)   Matt Arsenault via llvm-commits
• [llvm] [memprof] Move writeMemProf to a separate file (PR #137051)   via llvm-commits
• [llvm] SPIRV: Set NoPHIs property after rewriting them (PR #136327)   Matt Arsenault via llvm-commits
• [llvm] SPIRV: Set NoPHIs property after rewriting them (PR #136327)   Matt Arsenault via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   Nikita Popov via llvm-commits
• [llvm] llvm-reduce: Add values to return reduction (PR #132686)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] add s_bitset[10]_b32 optimization for shl+[or, andn2] pattern (PR #134155)   via llvm-commits
• [llvm] [AMDGPU] Do not add cost for register aligned shufflevectors (PR #137052)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Do not add cost for register aligned shufflevectors (PR #137052)   via llvm-commits
• [llvm] [FunctionAttrs] Bail if initializes range overflows 64-bit signed int (PR #137053)   Arthur Eubanks via llvm-commits
• [lldb] [llvm] [lldb] Implement CLI support for reverse-continue (PR #132783)   Robert O'Callahan via llvm-commits
• [llvm] [FunctionAttrs] Bail if initializes range overflows 64-bit signed int (PR #137053)   via llvm-commits
• [clang] [llvm] [NFC][RootSignatures] Conform to new std::optional calling conventions (PR #136747)   Damyan Pepper via llvm-commits
• [clang] [llvm] [NFC][RootSignatures] Conform to new std::optional calling conventions (PR #136747)   Damyan Pepper via llvm-commits
• [llvm] [RISCV] Add CompressPat for all cases in isCopyInstrImpl (PR #136875)   Philip Reames via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   Nikita Popov via llvm-commits
• [llvm] [LLVM][AMDGPU][NFC] clang-format Target/AMDGPU (PR #137056)   Maksim Levental via llvm-commits
• [llvm] [LLVM][AMDGPU][NFC] clang-format Target/AMDGPU (PR #137056)   Maksim Levental via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] [InstCombine] Fold tan(x) * cos(x) => sin(x) (PR #136319)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [llvm] [RISCV] Initial codegen support for zvqdotq extension (PR #137039)   Craig Topper via llvm-commits
• [llvm] 71f2c1e - [VPlan] Use early exit in ::extractLastLaneOfFirstOperand (NFC).   Florian Hahn via llvm-commits
• [llvm] [DirectX] Fix shader flag version-checking logic to match DXC (PR #136787)   Finn Plummer via llvm-commits
• [llvm] Revert "[RISCV] Allow spilling to unused Zcmp Stack (#125959)" (PR #137060)   Craig Topper via llvm-commits
• [llvm] Revert "[RISCV] Allow spilling to unused Zcmp Stack (#125959)" (PR #137060)   via llvm-commits
• [llvm] [NVPTX] Switch to untyped float registers (PR #137011)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Switch to untyped float registers (PR #137011)   Artem Belevich via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] [FunctionAttrs] Bail if initializes range overflows 64-bit signed int (PR #137053)   Arthur Eubanks via llvm-commits
• [llvm] [FunctionAttrs] Bail if initializes range overflows 64-bit signed int (PR #137053)   Arthur Eubanks via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [llvm] [RISCV] Initial codegen support for zvqdotq extension (PR #137039)   Craig Topper via llvm-commits
• [llvm] [InstrRef] Preserve debug instr num in aarch64-ldst-opt. (PR #136009)   Adrian Prantl via llvm-commits
• [llvm] [InstrRef] Preserve debug instr num in aarch64-ldst-opt. (PR #136009)   Adrian Prantl via llvm-commits
• [llvm] [InstrRef] Preserve debug instr num in aarch64-ldst-opt. (PR #136009)   Adrian Prantl via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [clang] [llvm] [LLVM][Clang][Cygwin] Fix building Clang for Cygwin (PR #134494)   via llvm-commits
• [clang] [llvm] [LLVM][Clang][Cygwin] Fix building Clang for Cygwin (PR #134494)   via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [llvm] Revert "[AMDGPU] Support block load/store for CSR" (PR #136846)   LLVM Continuous Integration via llvm-commits
• [llvm] [OpenMP] [IR Builder] Changes to Support Scan Operation (PR #136035)   Anchu Rajendran S via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Support for DLL export (PR #136014)   Andrew Rogers via llvm-commits
• [llvm] [memprof] Move writeMemProf to a separate file (PR #137051)   Mingming Liu via llvm-commits
• [llvm] [FunctionAttrs] Bail if initializes range overflows 64-bit signed int (PR #137053)   Nikita Popov via llvm-commits
• [llvm] [llvm] annotate interfaces in llvm/Support for DLL export (PR #136014)   Andrew Rogers via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [llvm] [NVPTX] Small NVVMReflect bug (PR #137062)   Yonah Goldberg via llvm-commits
• [llvm] [VPlan] Add exit phi operands during initial construction (NFC). (PR #136455)   via llvm-commits
• [llvm] [NVPTX] Small NVVMReflect bug (PR #137062)   Yonah Goldberg via llvm-commits
• [llvm] [NVPTX] Small NVVMReflect bug (PR #137062)   via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [llvm] [JITLink][i386] Avoid 'i386' name clashing with built-in macro (PR #137063)   Dimitry Andric via llvm-commits
• [llvm] [NVPTX] Small NVVMReflect bug (PR #137062)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Small NVVMReflect bug (PR #137062)   Artem Belevich via llvm-commits
• [llvm] [JITLink][i386] Avoid 'i386' name clashing with built-in macro (PR #137063)   Jessica Clarke via llvm-commits
• [clang] [llvm] [DLCov 2/5] Implement DebugLoc coverage tracking (PR #107279)   David Blaikie via llvm-commits
• [llvm] [RISCV] Return false for Zalasr load/store in isWorthFoldingAdd. (PR #136799)   Philip Reames via llvm-commits
• [llvm] ff6a23d - [RISCV] Return false for Zalasr load/store in isWorthFoldingAdd. (#136799)   via llvm-commits
• [llvm] [RISCV] Return false for Zalasr load/store in isWorthFoldingAdd. (PR #136799)   Craig Topper via llvm-commits
• [lld] [LLD][COFF] add __{data,bss}_{start,end}__ symbols for Cygwin support (PR #136180)   via llvm-commits
• [llvm] [VPlan] Manage instruction metadata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction metadata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction metadata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction metadata in VPlan. (PR #135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction metadata in VPlan. (PR #135272)   via llvm-commits
• [lld] [LLD][COFF] add __{data,bss}_{start,end}__ symbols for Cygwin support (PR #136180)   via llvm-commits
• [clang] [llvm] [DLCov 2/5] Implement DebugLoc coverage tracking (PR #107279)   Stephen Tozer via llvm-commits
• [llvm] ee617f1 - [NFC] [AArch64] Simplify offset scaling in ldst-opt (#137044)   via llvm-commits
• [llvm] [NFC] [AArch64] Simplify offset scaling in ldst-opt (PR #137044)   Guy David via llvm-commits
• [clang] [llvm] [HLSL] Run finalize linkage pass for all targets (PR #134260)   Eli Friedman via llvm-commits
• [llvm] [flang][cuda][rt] Track asynchronous allocation stream for deallocation (PR #137073)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Ashley Coleman via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Ashley Coleman via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [clang] [llvm] [DLCov 2/5] Implement DebugLoc coverage tracking (PR #107279)   David Blaikie via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [llvm] [flang][cuda][rt] Track asynchronous allocation stream for deallocation (PR #137073)   Zhen Wang via llvm-commits
• [llvm] [flang][cuda][rt] Track asynchronous allocation stream for deallocation (PR #137073)   Zhen Wang via llvm-commits
• [clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space [2/2] (PR #136768)   via llvm-commits
• [llvm] [NVPTX] Support BFloat Store Parameter (PR #137074)   Steffi Stumpos via llvm-commits
• [llvm] [NVPTX] Support BFloat Store Parameter (PR #137074)   via llvm-commits
• [llvm] [flang][cuda][rt] Track asynchronous allocation stream for deallocation (PR #137073)   Zhen Wang via llvm-commits
• [llvm] [NVPTX] Support BFloat Store Parameter (PR #137074)   via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Ashley Coleman via llvm-commits
• [llvm] [NVPTX] Support BFloat Store Parameter (PR #137074)   Steffi Stumpos via llvm-commits
• [lldb] [llvm] [lldb] Implement CLI support for reverse-continue (PR #132783)   Jonas Devlieghere via llvm-commits
• [clang] [llvm] [LLVM][Clang][Cygwin] Fix building Clang for Cygwin (PR #134494)   via llvm-commits
• [llvm] 6388a7a - [RISCV] Check the extension type for atomic loads in isel patterns. (#137019)   via llvm-commits
• [llvm] [RISCV] Check the extension type for atomic loads in isel patterns. (PR #137019)   Craig Topper via llvm-commits
• [llvm] 0547e84 - [FunctionAttrs] Bail if initializes range overflows 64-bit signed int (#137053)   via llvm-commits
• [llvm] [FunctionAttrs] Bail if initializes range overflows 64-bit signed int (PR #137053)   Arthur Eubanks via llvm-commits
• [clang] [llvm] [LLVM][Clang][Cygwin] Fix building Clang for Cygwin (PR #134494)   Mateusz Mikuła via llvm-commits
• [clang] [llvm] [LLVM][Clang][Cygwin] Fix building Clang for Cygwin (PR #134494)   Mateusz Mikuła via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Ashley Coleman via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Ashley Coleman via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Lane (NFC). (PR #137030)   via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Lane (NFC). (PR #137030)   via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Lane (NFC). (PR #137030)   via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Lane (NFC). (PR #137030)   via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Lane (NFC). (PR #137030)   via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Lane (NFC). (PR #137030)   via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Lane (NFC). (PR #137030)   via llvm-commits
• [clang] [llvm] [LLVM][Clang][Cygwin] Fix building Clang for Cygwin (PR #134494)   via llvm-commits
• [llvm] [TableGen][GISel] Allow isTrivialOperatorNode to import patterns with isStore and a memory VT. (PR #137080)   Craig Topper via llvm-commits
• [llvm] [TableGen][GISel] Allow isTrivialOperatorNode to import patterns with isStore and a memory VT. (PR #137080)   via llvm-commits
• [llvm] [TableGen][GISel] Allow isTrivialOperatorNode to import patterns with isStore and a memory VT. (PR #137080)   via llvm-commits
• [lldb] [llvm] [lldb] Implement CLI support for reverse-continue (PR #132783)   Robert O'Callahan via llvm-commits
• [llvm] f75295f - [gn build] Port 9a8f90dba3f8   LLVM GN Syncbot via llvm-commits
• [llvm] [NVPTX] Support BFloat Store Parameter (PR #137074)   Steffi Stumpos via llvm-commits
• [llvm] Linker: Remove dropTriviallyDeadConstantArrays(). (PR #137081)   Peter Collingbourne via llvm-commits
• [llvm] Linker: Remove dropTriviallyDeadConstantArrays(). (PR #137081)   via llvm-commits
• [llvm] Linker: Remove dropTriviallyDeadConstantArrays(). (PR #137081)   via llvm-commits
• [llvm] 2397180 - [lldb] Implement CLI support for reverse-continue (#132783)   via llvm-commits
• [lldb] [llvm] [lldb] Implement CLI support for reverse-continue (PR #132783)   Jonas Devlieghere via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Jeffrey Byrnes via llvm-commits
• [llvm] [memprof] Dump the number of matched frames (PR #137082)   Kazu Hirata via llvm-commits
• [llvm] [memprof] Dump the number of matched frames (PR #137082)   via llvm-commits
• [llvm] [NVPTX] Support BFloat Store Parameter (PR #137074)   Steffi Stumpos via llvm-commits
• [llvm] [DirectX] Implement Shader Flag Analysis for `UAVsAtEveryStage` (PR #137085)   Deric C. via llvm-commits
• [llvm] [DirectX] Implement Shader Flag Analysis for `UAVsAtEveryStage` (PR #137085)   via llvm-commits
• [clang] [llvm] Reland: [llvm][clang] Allocate a new stack instead of spawning a new thread to get more stack space (PR #136046)   Reid Kleckner via llvm-commits
• [clang] [llvm] Reland: [llvm][clang] Allocate a new stack instead of spawning a new thread to get more stack space (PR #136046)   Reid Kleckner via llvm-commits
• [clang] [llvm] Reland: [llvm][clang] Allocate a new stack instead of spawning a new thread to get more stack space (PR #136046)   Reid Kleckner via llvm-commits
• [llvm] [CmpInstAnalysis] Decompose icmp eq (and x, C) C2 (PR #136367)   Jeffrey Byrnes via llvm-commits
• [llvm] [CmpInstAnalysis] Decompose icmp eq (and x, C) C2 (PR #136367)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Jeffrey Byrnes via llvm-commits
• [llvm] [NFC][LLVM][IR] Adopt vadiadic `isa<>` (PR #137001)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM][IR] Adopt vadiadic `isa<>` (PR #137001)   via llvm-commits
• [llvm] [NFC][LLVM][IR] Adopt vadiadic `isa<>` (PR #137001)   via llvm-commits
• [llvm] [memprof] Dump the number of matched frames (PR #137082)   Teresa Johnson via llvm-commits
• [llvm] [memprof] Dump the number of matched frames (PR #137082)   Snehasish Kumar via llvm-commits
• [llvm] [memprof] Dump the number of matched frames (PR #137082)   Snehasish Kumar via llvm-commits
• [llvm] [memprof] Dump the number of matched frames (PR #137082)   Snehasish Kumar via llvm-commits
• [llvm] [memprof] Move IndexedMemProfReader::deserialize to IndexedemProfData.cpp (NFC) (PR #137089)   Kazu Hirata via llvm-commits
• [llvm] [DirectX] Handle <1 x ...> loads in DXILResourceAccess (PR #137076)   Deric C. via llvm-commits
• [llvm] [memprof] Move IndexedMemProfReader::deserialize to IndexedemProfData.cpp (NFC) (PR #137089)   via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Jeffrey Byrnes via llvm-commits
• [llvm] [DebugInfo][GlobalOpt] Preserve source locs for optimized loads (PR #134828)   Reid Kleckner via llvm-commits
• [llvm] [memprof] Move IndexedMemProfReader::deserialize to IndexedemProfData.cpp (NFC) (PR #137089)   Snehasish Kumar via llvm-commits
• [llvm] Revert "[RISCV] Allow spilling to unused Zcmp Stack (#125959)" (PR #137060)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Remove `AND` mask generated by `( zext ( atomic_load ) )` by replacing the load with `zextload` for orderings not stronger then monotonic. (PR #136502)   Craig Topper via llvm-commits
• [lld] [LLD][COFF] Move delay IAT into its own .didat section. (PR #137100)   via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Nathan Chancellor via llvm-commits
• [llvm] [RISCV] Remove `AND` mask generated by `( zext ( atomic_load ) )` by replacing the load with `zextload` for orderings not stronger then monotonic. (PR #136502)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove `AND` mask generated by `( zext ( atomic_load ) )` by replacing the load with `zextload` for orderings not stronger then monotonic. (PR #136502)   Craig Topper via llvm-commits
• [llvm] 9ad2193 - [X86][NFC] Precommit test for #136520   Evgenii Kudriashov via llvm-commits
• [llvm] Revert "[RISCV] Allow spilling to unused Zcmp Stack (#125959)" (PR #137060)   LLVM Continuous Integration via llvm-commits
• [llvm] b45225f - [Utils][vim] Add missing highlights for disjoint (#136801)   via llvm-commits
• [llvm] [Utils][vim] Add missing highlights for disjoint (PR #136801)   Jim Lin via llvm-commits
• [llvm] 5981be7 - [RISCV] Add Andes A45/AX45 processor definition (#136832)   via llvm-commits
• [clang] [llvm] [RISCV] Add Andes A45/AX45 processor definition (PR #136832)   Jim Lin via llvm-commits
• [llvm] [DebugInfo][ConstraintElimination] Fix debug value loss in replacing comparisons with the speculated constants (PR #136839)   Shan Huang via llvm-commits
• [llvm] [X86][Combine] Ensure single use chain in extract-load combine (PR #136520)   Evgenii Kudriashov via llvm-commits
• [llvm] [memprof] Dump the number of matched frames (PR #137082)   Kazu Hirata via llvm-commits
• [llvm] [memprof] Move IndexedMemProfReader::deserialize to IndexedemProfData.cpp (NFC) (PR #137089)   Kazu Hirata via llvm-commits
• [llvm] [memprof] Move IndexedMemProfReader::deserialize to IndexedemProfData.cpp (NFC) (PR #137089)   Kazu Hirata via llvm-commits
• [llvm] [DebugInfo][ConstraintElimination] Fix debug value loss in replacing comparisons with the speculated constants (PR #136839)   Shan Huang via llvm-commits
• [llvm] [RISCV] Add fixed-length patterns for disjoint or patterns for vwadd[u].v{v,x} (PR #136824)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add fixed-length patterns for disjoint or patterns for vwadd[u].v{v,x} (PR #136824)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add fixed-length patterns for disjoint or patterns for vwadd[u].v{v,x} (PR #136824)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add fixed-length patterns for disjoint or patterns for vwadd[u].v{v,x} (PR #136824)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add fixed-length patterns for disjoint or patterns for vwadd[u].v{v,x} (PR #136824)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add fixed-length patterns for disjoint or patterns for vwadd[u].v{v,x} (PR #136824)   Jim Lin via llvm-commits
• [llvm] [memprof] Move IndexedMemProfReader::deserialize to IndexedemProfData.cpp (NFC) (PR #137089)   Kazu Hirata via llvm-commits
• [llvm] [DebugInfo][ConstraintElimination] Fix debug value loss in replacing comparisons with the speculated constants (PR #136839)   Shan Huang via llvm-commits
• [llvm] [memprof] Dump the number of matched frames (PR #137082)   Kazu Hirata via llvm-commits
• [llvm] [memprof] Dump the number of matched frames (PR #137082)   Kazu Hirata via llvm-commits
• [llvm] [memprof] Dump the number of matched frames (PR #137082)   Kazu Hirata via llvm-commits
• [llvm] [DebugInfo][ConstraintElimination] Fix debug value loss in replacing comparisons with the speculated constants (PR #136839)   Shan Huang via llvm-commits
• [llvm] [SLP] Make getSameOpcode support interchangeable instructions. (PR #133888)   Reid Kleckner via llvm-commits
• [llvm] [DirectX] Implement the ForwardHandleAccesses pass (PR #135378)   LLVM Continuous Integration via llvm-commits
• [llvm] [RegisterCoalescer]: Try inflated RC for coalescing reg->subreg (PR #134438)   Jeffrey Byrnes via llvm-commits
• [llvm] github-automation.py: Add debug output to the commit-request-greeter (PR #137104)   Aiden Grossman via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Pawan Nirpal via llvm-commits
• [compiler-rt] [sanitizer][Darwin] Define TlsSize on arm64 (PR #133989)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer][Darwin] Define TlsSize on arm64 (PR #133989)   via llvm-commits
• [compiler-rt] [llvm] [asan][NFCI] Rename asan_(malloc_)?linux.cpp to ...unix.cpp (PR #132263)   Vitaly Buka via llvm-commits
• [llvm] cb96a3d - [memprof] Dump the number of matched frames (#137082)   via llvm-commits
• [llvm] [memprof] Dump the number of matched frames (PR #137082)   Kazu Hirata via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Sergei Barannikov via llvm-commits
• [llvm] [AMDGPU] Extend wave reduce intrinsics for i32 type (PR #126469)   Pravin Jagtap via llvm-commits
• [llvm] [Offload] Fix missing dependency on `clang-nvlink-wrapper' (PR #137033)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Joshua Batista via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Joshua Batista via llvm-commits
• [clang] [llvm] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Sergei Barannikov via llvm-commits
• [llvm] [CodeGen][NPM] Support CodeGenSCCOrder in pipeline (PR #136818)   Akshat Oke via llvm-commits
• [llvm] [CodeGen][NPM] Support CodeGenSCCOrder in pipeline (PR #136818)   Akshat Oke via llvm-commits
• [llvm] [CodeGen][NPM] Support CodeGenSCCOrder in pipeline (PR #136818)   Akshat Oke via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   via llvm-commits
• [llvm] 054ee17 - [gn build] Port 096ab51de034   LLVM GN Syncbot via llvm-commits
• [llvm] [NVPTX] Add mix precision arith intrinsics (PR #136657)   Rajat Bajpai via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [llvm] [TableGen][RISCV][AArch64] Properly implement isAnyExtLoad/isSignExtLoad/isZeroExtLoad for IsAtomic in SelectionDAG. (PR #137096)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][RISCV][AArch64] Properly implement isAnyExtLoad/isSignExtLoad/isZeroExtLoad for IsAtomic in SelectionDAG. (PR #137096)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][RISCV][AArch64] Properly implement isAnyExtLoad/isSignExtLoad/isZeroExtLoad for IsAtomic in SelectionDAG. (PR #137096)   Sergei Barannikov via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   YunQiang Su via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   YunQiang Su via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][RISCV][AArch64][GISel] Properly implement isAnyExtLoad/isSignExtLoad/isZeroExtLoad for IsAtomic in SelectionDAG. (PR #137096)   Craig Topper via llvm-commits
• [lld] [LLD][COFF] Move delay IAT into its own .didat section. (PR #137100)   via llvm-commits
• [lld] [LLD][COFF] Move delay IAT into its own .didat section. (PR #137100)   via llvm-commits
• [llvm] [Dwarf] Emit `DW_AT_bit_size` for non-byte-sized types (PR #137118)   Yingwei Zheng via llvm-commits
• [llvm] [Dwarf] Emit `DW_AT_bit_size` for non-byte-sized types (PR #137118)   via llvm-commits
• [llvm] [Dwarf] Emit `DW_AT_bit_size` for non-byte-sized types (PR #137118)   via llvm-commits
• [llvm] [CodeGen][NPM] Support CodeGenSCCOrder in pipeline (PR #136818)   Christudasan Devadasan via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   Hristo Hristov via llvm-commits
• [llvm] [TableGen][RISCV][AArch64][GISel] Properly implement isAnyExtLoad/isSignExtLoad/isZeroExtLoad for IsAtomic in SelectionDAG. (PR #137096)   Craig Topper via llvm-commits
• [llvm] [TableGen][RISCV][AArch64][GISel] Properly implement isAnyExtLoad/isSignExtLoad/isZeroExtLoad for IsAtomic in SelectionDAG. (PR #137096)   Craig Topper via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   via llvm-commits
• [llvm] dbb0605 - [SelectionDAG] Add NewSDValueDbgMsg to getAtomic.   Craig Topper via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Pawan Nirpal via llvm-commits
• [llvm] [TableGen][RISCV][AArch64][GISel] Properly implement isAnyExtLoad/isSignExtLoad/isZeroExtLoad for IsAtomic in SelectionDAG. (PR #137096)   Sergei Barannikov via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Pawan Nirpal via llvm-commits
• [llvm] [Dwarf] Emit `DW_AT_bit_size` for non-byte-sized types (PR #137118)   Yingwei Zheng via llvm-commits
• [llvm] [llvm][Support] Add YAMLSchemeGen for producing YAML Schemes from YAMLTraits (PR #133284)   James Henderson via llvm-commits
• [llvm] [X86][GlobalIsel] support G_FABS for f80 (PR #136718)   via llvm-commits
• [llvm] [SelectionDAG][RISCV] Teach computeKnownBits to use range metadata for atomic_load. (PR #137119)   Craig Topper via llvm-commits
• [llvm] [X86][GlobalIsel] support G_FABS for f80 (PR #136718)   via llvm-commits
• [llvm] [ARM][RISCV] Partially revert #101786 (PR #137120)   Sergei Barannikov via llvm-commits
• [llvm] [SelectionDAG][RISCV] Teach computeKnownBits to use range metadata for atomic_load. (PR #137119)   via llvm-commits
• [llvm] [ARM][RISCV] Partially revert #101786 (PR #137120)   via llvm-commits
• [llvm] [SelectionDAG][RISCV] Teach computeKnownBits to use range metadata for atomic_load. (PR #137119)   Craig Topper via llvm-commits
• [lldb] [llvm] [lldb] Prefer `DW_AT_bit_size` over `DW_AT_byte_size` in `GetDIEBitSizeAndSign` (PR #137123)   Yingwei Zheng via llvm-commits
• [lldb] [llvm] [lldb] Prefer `DW_AT_bit_size` over `DW_AT_byte_size` in `GetDIEBitSizeAndSign` (PR #137123)   via llvm-commits
• [lldb] [llvm] [lldb] Prefer `DW_AT_bit_size` over `DW_AT_byte_size` in `GetDIEBitSizeAndSign` (PR #137123)   via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   Yingwei Zheng via llvm-commits
• [llvm] [DebugInfo][LoopDistribute] Salvage debug values using dead instructions in the distributed loops (PR #137124)   Shan Huang via llvm-commits
• [llvm] [DebugInfo][LoopDistribute] Salvage debug values using dead instructions in the distributed loops (PR #137124)   via llvm-commits
• [llvm] [RISCV] Deprecate `riscv.segN.load/store` in favor of their mask variants (PR #137045)   Pengcheng Wang via llvm-commits
• [llvm] [SelectionDAG][RISCV] Teach computeKnownBits to use range metadata for atomic_load. (PR #137119)   Matt Arsenault via llvm-commits
• [llvm] [TableGen][GISel] Allow isTrivialOperatorNode to import patterns with isStore and a memory VT. (PR #137080)   Matt Arsenault via llvm-commits
• [llvm] de81b85 - [AArch64] Allow variadic calls with SVE argument if it is named. (#136833)   via llvm-commits
• [llvm] [AArch64] Allow variadic calls with SVE argument if it is named. (PR #136833)   Sander de Smalen via llvm-commits
• [llvm] [SelectionDAG][RISCV] Teach computeKnownBits to use range metadata for atomic_load. (PR #137119)   Sergei Barannikov via llvm-commits
• [llvm] [SelectionDAG][RISCV] Teach computeKnownBits to use range metadata for atomic_load. (PR #137119)   Sergei Barannikov via llvm-commits
• [llvm] [SelectionDAG][RISCV] Teach computeKnownBits to use range metadata for atomic_load. (PR #137119)   Sergei Barannikov via llvm-commits
• [llvm] [CodeGen][NPM] Support CodeGenSCCOrder in pipeline (PR #136818)   Matt Arsenault via llvm-commits
• [compiler-rt] [ASan] Limits the conditions of the deadlock patch (PR #137127)   via llvm-commits
• [compiler-rt] [ASan] Limits the conditions of the deadlock patch (PR #137127)   via llvm-commits
• [clang] [clang-tools-extra] [flang] [lldb] [llvm] [mlir] [openmp] [polly] [Documentation] Always use SVG for dot-generated doxygen images. (PR #136843)   via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Matt Arsenault via llvm-commits
• [llvm] 7af555e - [ARM][RISCV] Partially revert #101786 (#137120)   via llvm-commits
• [llvm] [ARM][RISCV] Partially revert #101786 (PR #137120)   Sergei Barannikov via llvm-commits
• [compiler-rt] [llvm] [TSan, SanitizerBinaryMetadata] Analyze the capture status for `alloca` rather than arbitrary `Addr` (PR #132756)   via llvm-commits
• [llvm] 886f119 - [AMDGPU] Use variadic isa<>. NFC. (#137016)   via llvm-commits
• [llvm] [AMDGPU] Use variadic isa<>. NFC. (PR #137016)   Jay Foad via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [Clang][C++23] Core language changes from P1467R9 extended floating-point types and standard names. (PR #78503)   A. Jiang via llvm-commits
• [llvm] [ARM][RISCV] Partially revert #101786 (PR #137120)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   via llvm-commits
• [compiler-rt] [llvm] [TSan, SanitizerBinaryMetadata] Analyze the capture status for `alloca` rather than arbitrary `Addr` (PR #132756)   via llvm-commits
• [llvm] [AMDGPU] Use variadic isa<>. NFC. (PR #137016)   LLVM Continuous Integration via llvm-commits
• [llvm] [SystemZ] Add proper mcount handling (PR #135767)   Dominik Steenken via llvm-commits
• [llvm] 15bb1db - [VPlan] Remove ILV::sinkScalarOperands. (#136023)   via llvm-commits
• [llvm] [VPlan] Remove ILV::sinkScalarOperands. (PR #136023)   Florian Hahn via llvm-commits
• [polly] [RemoveDI][Polly] Use iterators instead of instruction pointers to SetInsertPoint (PR #135336)   Karthika Devi C via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Andrei Safronov via llvm-commits
• [llvm] [LoongArch] Fix fp_to_uint/fp_to_sint conversion errors for lasx (PR #137129)   via llvm-commits
• [llvm] [LoongArch] Fix fp_to_uint/fp_to_sint conversion errors for lasx (PR #137129)   via llvm-commits
• [llvm] [LangRef] Clarify the behavior of select with FP poison-generating flags (PR #137131)   Yingwei Zheng via llvm-commits
• [llvm] [LangRef] Clarify the behavior of select with FP poison-generating flags (PR #137131)   via llvm-commits
• [clang] [llvm] [OpenMP] Remove 'libomptarget.devicertl.a' fatbinary and use static library (PR #126143)   Nikita Popov via llvm-commits
• [llvm] [RISCV] Refactor the code for folding logicop and sext/zext (PR #137132)   Jim Lin via llvm-commits
• [llvm] [AArch64][SME] Allow spills of ZT0 around SME ABI routines again (PR #136726)   Sander de Smalen via llvm-commits
• [llvm] [RISCV] Refactor the code for folding logicop and sext/zext (PR #137132)   via llvm-commits
• [llvm] e268f71 - [VPlan] Remove unneeded early continue. (NFC)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] Preserve disjoint or after folding casted bitwise logic (PR #136815)   Jim Lin via llvm-commits
• [llvm] [LangRef] Clarify the behavior of select with FP poison-generating flags (PR #137131)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify the behavior of select with FP poison-generating flags (PR #137131)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Refactor the code for folding logicop and sext/zext (PR #137132)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Fix typo in assertion. NFC (PR #137009)   Luke Lau via llvm-commits
• [llvm] [LangRef] Clarify the behavior of select with FP poison-generating flags (PR #137131)   Yingwei Zheng via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method issue #136550 (PR #137098)   Simon Pilgrim via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method issue #136550 (PR #137098)   Simon Pilgrim via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method issue #136550 (PR #137098)   Simon Pilgrim via llvm-commits
• [llvm] [Xtensa] Implement Xtensa S32C1I Option and atomics lowering. (PR #137134)   Andrei Safronov via llvm-commits
• [compiler-rt] [llvm] [TSan, SanitizerBinaryMetadata] Analyze the capture status for `alloca` rather than arbitrary `Addr` (PR #132756)   Nikita Popov via llvm-commits
• [llvm] [Xtensa] Implement Xtensa S32C1I Option and atomics lowering. (PR #137134)   via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method issue #136550 (PR #137098)   Simon Pilgrim via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Simon Pilgrim via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Dan German via llvm-commits
• [llvm] [Xtensa] Implement Xtensa S32C1I Option and atomics lowering. (PR #137134)   via llvm-commits
• [llvm] [ARM][RISCV] Partially revert #101786 (PR #137120)   LLVM Continuous Integration via llvm-commits
• [llvm] [BOLT][AArch64] Support for pointer authentication (v2) (PR #120064)   Gergely Bálint via llvm-commits
• [flang] [llvm] [mlir] [flang][llvm][OpenMP][OpenACC] Add implicit casts to omp.atomic and acc.atomic (PR #131603)   via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Region Protection Option and several other small Options. (PR #137135)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Region Protection Option and several other small Options. (PR #137135)   via llvm-commits
• [llvm] [LangRef] Clarify the behavior of select with FP poison-generating flags (PR #137131)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify the behavior of select with FP poison-generating flags (PR #137131)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify the behavior of select with FP poison-generating flags (PR #137131)   Nikita Popov via llvm-commits
• [llvm] a3d05e8 - Remove an incorrect assert in MFMASmallGemmSingleWaveOpt. (#130131)   via llvm-commits
• [llvm] Remove an incorrect assert in MFMASmallGemmSingleWaveOpt. (PR #130131)   via llvm-commits
• [llvm] [VPlan] Fix typo in assertion. NFC (PR #137009)   Florian Hahn via llvm-commits
• [llvm] [RISCV] Add fixed-length patterns for disjoint or patterns for vwadd[u].v{v,x} (PR #136824)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] [PeepholeOpt] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Vikash Gupta via llvm-commits
• [llvm] [InstCombine] Refactor the code for folding logicop and sext/zext (PR #137132)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] [PeepholeOpt] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   via llvm-commits
• [llvm] [LV] Improve code using [[maybe_unused]] (PR #137138)   Ramkumar Ramachandra via llvm-commits
• [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - handle 512-bit X86ISD::VPERMI with lower half demanded elts (PR #137139)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Improve code using [[maybe_unused]] (PR #137138)   via llvm-commits
• [llvm] [LV] Improve code using [[maybe_unused]] (PR #137138)   via llvm-commits
• [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - handle 512-bit X86ISD::VPERMI with lower half demanded elts (PR #137139)   via llvm-commits
• [llvm] a2f00e1 - [RISCV] Add fixed-length patterns for disjoint or patterns for vwadd[u].v{v,x} (#136824)   via llvm-commits
• [llvm] [RISCV] Add fixed-length patterns for disjoint or patterns for vwadd[u].v{v,x} (PR #136824)   Luke Lau via llvm-commits
• [llvm] 3883b27 - [VPlan] Fix typo in assertion. NFC (#137009)   via llvm-commits
• [llvm] [VPlan] Fix typo in assertion. NFC (PR #137009)   Luke Lau via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   via llvm-commits
• [llvm] [NFC][LLVM][IR] Adopt vadiadic `isa<>` (PR #137001)   Nikita Popov via llvm-commits
• [llvm] Experimental patch for understanding the pre-RA MachineScheduler (PR #136483)   Jonas Paulsson via llvm-commits
• [llvm] [AMDGPU] [PeepholeOpt] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Vikash Gupta via llvm-commits
• [llvm] [SystemZ] Handle f16 load positive/negative/complement without libcalls. (PR #136286)   Jonas Paulsson via llvm-commits
• [compiler-rt] [llvm] [TSan, SanitizerBinaryMetadata] Analyze the capture status for `alloca` rather than arbitrary `Addr` (PR #132756)   Marco Elver via llvm-commits
• [llvm] [LV] Strip bad FIXME in test (PR #137142)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SystemZ] Handle f16 load positive/negative/complement without libcalls. (PR #136286)   Jonas Paulsson via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support for dispatch construct (Sema & Codegen) support (PR #131838)   via llvm-commits
• [compiler-rt] 59b26ab - [TSan, SanitizerBinaryMetadata] Analyze the capture status for `alloca` rather than arbitrary `Addr` (#132756)   via llvm-commits
• [llvm] [LV] Strip bad FIXME in test (PR #137142)   via llvm-commits
• [llvm] [LV] Improve code using [[maybe_unused]] (NFC) (PR #137138)   Ramkumar Ramachandra via llvm-commits
• [compiler-rt] [llvm] [TSan, SanitizerBinaryMetadata] Analyze the capture status for `alloca` rather than arbitrary `Addr` (PR #132756)   Marco Elver via llvm-commits
• [compiler-rt] [llvm] [TSan, SanitizerBinaryMetadata] Analyze the capture status for `alloca` rather than arbitrary `Addr` (PR #132756)   via llvm-commits
• [llvm] 1ec22fa - [SystemZ] Handle f16 load positive/negative/complement without libcalls. (#136286)   via llvm-commits
• [llvm] [SystemZ] Handle f16 load positive/negative/complement without libcalls. (PR #136286)   Jonas Paulsson via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support for dispatch construct (Sema & Codegen) support (PR #131838)   via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support for dispatch construct (Sema & Codegen) support (PR #131838)   via llvm-commits
• [llvm] [DAGCombiner] Add DAG combine for PARTIAL_REDUCE_MLA when no mul op (PR #131326)   Sander de Smalen via llvm-commits
• [llvm] [DAGCombiner] Add DAG combine for PARTIAL_REDUCE_MLA when no mul op (PR #131326)   Sander de Smalen via llvm-commits
• [llvm] [WIP][X86] combineX86ShufflesRecursively - attempt to combine shuffles with larger types from EXTRACT_SUBVECTOR nodes (PR #133947)   Simon Pilgrim via llvm-commits
• [llvm] 94a14f9 - [SystemZ] Add DAGCombine for FCOPYSIGN to remove rounding. (#136131)   via llvm-commits
• [llvm] [SystemZ] Add DAGCombine for FCOPYSIGN to remove rounding. (PR #136131)   Jonas Paulsson via llvm-commits
• [clang] [llvm] Prefer std::getenv to ::getenv (PR #108529)   Jannick Kremer via llvm-commits
• [llvm] SPIRV: Set NoPHIs property after rewriting them (PR #136327)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Floating Point Option. (PR #136086)   Matt Arsenault via llvm-commits
• [llvm] 66461db - SPIRV: Set NoPHIs property after rewriting them (#136327)   via llvm-commits
• [llvm] SPIRV: Set NoPHIs property after rewriting them (PR #136327)   Matt Arsenault via llvm-commits
• [lld] [lld][ICF] Prevent merging two sections when they point to non-globals (PR #136641)   Peter Smith via llvm-commits
• [llvm] [LangRef] Clarify the behavior of select with FP poison-generating flags (PR #137131)   Yingwei Zheng via llvm-commits
• [llvm] [mlir][bazel] Remove unnecessary dependencies. (PR #136999)   Adrian Kuegel via llvm-commits
• [llvm] [SystemZ] Add DAGCombine for FCOPYSIGN to remove rounding. (PR #136131)   LLVM Continuous Integration via llvm-commits
• [llvm] [LangRef] Clarify the behavior of select with FP poison-generating flags (PR #137131)   Nikita Popov via llvm-commits
• [llvm] [mlir][bazel] Added a target for the CF dialect C API (PR #137146)   Sergei Lebedev via llvm-commits
• [llvm] [LLVM][InstCombine] Enable constant folding for SVE add,and,eor,fadd,fdiv,fsub,orr & sub intrinsics. (PR #136849)   Kerry McLaughlin via llvm-commits
• [llvm] [LangRef] Clarify the behavior of select with FP poison-generating flags (PR #137131)   Matt Arsenault via llvm-commits
• [llvm] [llvm][lit] Omit vendor in triples for "native" feature (PR #136325)   David Spickett via llvm-commits
• [llvm] [llvm][lit] Omit vendor in triples for "native" feature (PR #136325)   David Spickett via llvm-commits
• [llvm] [llvm][lit] Omit vendor in triples for "native" feature (PR #136325)   David Spickett via llvm-commits
• [compiler-rt] [TySan] Fix false positives with derived classes (PR #126260)   via llvm-commits
• [compiler-rt] [TySan] Fix false positives with derived classes (PR #126260)   via llvm-commits
• [flang] [llvm] [mlir] [flang][llvm][OpenMP][OpenACC] Add implicit casts to omp.atomic and acc.atomic (PR #131603)   via llvm-commits
• [llvm] 88083a0 - [X86] SimplifyDemandedVectorEltsForTargetNode - handle 512-bit X86ISD::VPERMI with lower half demanded elts (#137139)   via llvm-commits
• [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - handle 512-bit X86ISD::VPERMI with lower half demanded elts (PR #137139)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Manage instruction metadata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [X86] shouldReduceLoadWidth - don't split loads if we can freely reuse full width legal binop (PR #129695)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Manage instruction metadata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction metadata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Manage instruction metadata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Kristof Beyls via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Kristof Beyls via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Kristof Beyls via llvm-commits
• [llvm] [Xtensa] Implement Xtensa S32C1I Option and atomics lowering. (PR #137134)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa S32C1I Option and atomics lowering. (PR #137134)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa S32C1I Option and atomics lowering. (PR #137134)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa S32C1I Option and atomics lowering. (PR #137134)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa S32C1I Option and atomics lowering. (PR #137134)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa S32C1I Option and atomics lowering. (PR #137134)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa S32C1I Option and atomics lowering. (PR #137134)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa S32C1I Option and atomics lowering. (PR #137134)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa S32C1I Option and atomics lowering. (PR #137134)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa S32C1I Option and atomics lowering. (PR #137134)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Region Protection Option and several other small Options. (PR #137135)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement Xtensa Region Protection Option and several other small Options. (PR #137135)   Matt Arsenault via llvm-commits
• [llvm] [llvm][lit] Omit vendor in triples for "native" feature (PR #136325)   Raul Tambre via llvm-commits
• [llvm] [llvm][lit] Omit vendor in triples for "native" feature (PR #136325)   Raul Tambre via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   YunQiang Su via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   YunQiang Su via llvm-commits
• [llvm] 427b644 - Revert "[LLVM][ISel][AArch64 Remove AArch64ISD::FCM##z nodes. (#135817)"   Paul Walker via llvm-commits
• [llvm] [LLVM][ISel][AArch64 Remove AArch64ISD::FCM##z nodes. (PR #135817)   Paul Walker via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   YunQiang Su via llvm-commits
• [llvm] [mlir] [mlir][gpu] Change GPU modules to globals (PR #135478)   Christian Sigg via llvm-commits
• [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for bitfield extract (PR #132381)   Petar Avramovic via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   via llvm-commits
• [clang] [llvm] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   Alexey Bataev via llvm-commits
• [llvm] [mlir][bazel] Remove unnecessary dependencies. (PR #136999)   Christian Sigg via llvm-commits
• [llvm] [AMDGPU] Classify FLAT instructions as VMEM (PR #137148)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] Classify FLAT instructions as VMEM (PR #137148)   Robert Imschweiler via llvm-commits
• [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for bitfield extract (PR #132381)   Petar Avramovic via llvm-commits
• [llvm] [LoongArch] Fix fp_to_uint/fp_to_sint conversion errors for lasx (PR #137129)   via llvm-commits
• [clang] [llvm] [clang][OpenMP] New OpenMP 6.0 threadset clause (PR #135807)   via llvm-commits
• [llvm] [LoongArch] Fix fp_to_uint/fp_to_sint conversion errors for lasx (PR #137129)   via llvm-commits
• [llvm] [InstCombine] Refactor the code for folding logicop and sext/zext. NFC. (PR #137132)   Jim Lin via llvm-commits
• [clang] [llvm] [libclang/python] Enable packaging libclang bindings (PR #125806)   Jannick Kremer via llvm-commits
• [llvm] [AMDGPU] Classify FLAT instructions as VMEM (PR #137148)   via llvm-commits
• [llvm] [InstCombine] Fold bitcast (extelt (bitcast X), Idx) into bitcast+shufflevector. (PR #136998)   Ricardo Jesus via llvm-commits
• [llvm] [AMDGPU] Classify FLAT instructions as VMEM (PR #137148)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Classify FLAT instructions as VMEM (PR #137148)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Classify FLAT instructions as VMEM (PR #137148)   via llvm-commits
• [llvm] [AMDGPU] Classify FLAT instructions as VMEM (PR #137148)   Jay Foad via llvm-commits
• [clang] [llvm] Prefer std::getenv to ::getenv (PR #108529)   Vassil Vassilev via llvm-commits
• [clang] [llvm] Prefer std::getenv to ::getenv (PR #108529)   Vassil Vassilev via llvm-commits
• [llvm] [AMDGPU][NFC] Added Pre-commit tests for PR#137137 (PR #137150)   Vikash Gupta via llvm-commits
• [llvm] [AMDGPU] Classify FLAT instructions as VMEM (PR #137148)   Jay Foad via llvm-commits
• [llvm] [BOLT][binary-analysis] Fix pac-ret scanner's "major limitation" (PR #136664)   Paschalis Mpeis via llvm-commits
• [llvm] [AMDGPU] [PeepholeOpt] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Vikash Gupta via llvm-commits
• [llvm] [AMDGPU][NFC] Added Pre-commit tests for PR#137137 (PR #137150)   Vikash Gupta via llvm-commits
• [llvm] [AMDGPU] [PeepholeOpt] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Vikash Gupta via llvm-commits
• [llvm] [AMDGPU][NFC] Added Pre-commit tests for PR#137137 (PR #137150)   via llvm-commits
• [llvm] [AMDGPU] [PeepholeOpt] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   via llvm-commits
• [llvm] 6900e90 - [LLVM][TargetParser] Handle -msys targets the same as -cygwin. (#136817)   via llvm-commits
• [llvm] [LLVM][TargetParser] Handle -msys targets the same as -cygwin. (PR #136817)   Martin Storsjö via llvm-commits
• [llvm] [AMDGPU] [PeepholeOpt] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Vikash Gupta via llvm-commits
• [llvm] [Offload] Fix missing dependency on `clang-nvlink-wrapper' (PR #137033)   LLVM Continuous Integration via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Martin Storsjö via llvm-commits
• [llvm] [LLVM][TargetParser] Handle -msys targets the same as -cygwin. (PR #136817)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][SVE] Generate asrd instruction for positive pow-2 divisors … (PR #137151)   Sushant Gokhale via llvm-commits
• [llvm] [AArch64][SVE] Generate asrd instruction for positive pow-2 divisors … (PR #137151)   via llvm-commits
• [llvm] acc335b - [X86] Add build vector test patterns with only 2 unique scalars   Simon Pilgrim via llvm-commits
• [clang] [clang-tools-extra] [flang] [lldb] [llvm] [mlir] [openmp] [polly] [Documentation] Always use SVG for dot-generated doxygen images. (PR #136843)   Aaron Ballman via llvm-commits
• [clang] [clang-tools-extra] [flang] [lldb] [llvm] [mlir] [openmp] [polly] [Documentation] Always use SVG for dot-generated doxygen images. (PR #136843)   Aaron Ballman via llvm-commits
• [llvm] 5d136f9 - [VPlan] Manage instruction metadata in VPlan. (#135272)   via llvm-commits
• [llvm] [VPlan] Manage instruction metadata in VPlan. (PR #135272)   Florian Hahn via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Simon Pilgrim via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Jonas Paulsson via llvm-commits
• [llvm] [InlineSpiller] Check rematerialization before folding operand (PR #134015)   Simon Pilgrim via llvm-commits
• [llvm] [GlobalOpt] Do not promote malloc if there are atomic loads/stores (PR #137158)   Nikita Popov via llvm-commits
• [llvm] [GlobalOpt] Do not promote malloc if there are atomic loads/stores (PR #137158)   via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Sergei Barannikov via llvm-commits
• [llvm] f218cd2 - [IA] Remove unused argument. NFC   Luke Lau via llvm-commits
• [llvm] [AMDGPU] [PeepholeOpt] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Vikash Gupta via llvm-commits
• [llvm] [SLP]Improve reordering of the alternate nodes (PR #136329)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] Remove 'libomptarget.devicertl.a' fatbinary and use static library (PR #126143)   Joseph Huber via llvm-commits
• [llvm] [VPlan] Manage noalias/alias_scope metadata in VPlan. (NFC) (PR #136450)   Florian Hahn via llvm-commits
• [llvm] [LoongArch] Try to widen shuffle mask (PR #136081)   via llvm-commits
• [llvm] [VPlan] Manage noalias/alias_scope metadata in VPlan. (NFC) (PR #136450)   Florian Hahn via llvm-commits
• [llvm] 06d4876 - [VPlan] Replace checking IR loop with checking VPlan predecessors (NFC).   Florian Hahn via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Luke Lau via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Luke Lau via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Luke Lau via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Luke Lau via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Luke Lau via llvm-commits
• [polly] [RemoveDI][Polly] Use iterators instead of instruction pointers to SetInsertPoint (PR #135336)   Karthika Devi C via llvm-commits
• [llvm] 7914464 - [PhaseOrdering][X86] blendv-select.ll - add test coverage for #66513   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Classify FLAT instructions as VMEM (PR #137148)   Robert Imschweiler via llvm-commits
• [llvm] [SLP]Improve reordering of the alternate nodes (PR #136329)   Simon Pilgrim via llvm-commits
• [llvm] IR/Verifier: Allow vector type in atomic load and store (PR #120384)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Add VPPhiAccessors to provide interface for phi recipes (NFC) (PR #129388)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add VPPhiAccessors to provide interface for phi recipes (NFC) (PR #129388)   Luke Lau via llvm-commits
• [clang] [llvm] [mlir] [TableGen] Only store direct superclasses in Record (PR #123072)   Simon Pilgrim via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Pawan Nirpal via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Pawan Nirpal via llvm-commits
• [lldb] [llvm] [lldb] Implement CLI support for reverse-continue (PR #132783)   Leandro Lupori via llvm-commits
• [polly] [RemoveDI][Polly] Use iterators instead of instruction pointers to SetInsertPoint (PR #135336)   Michael Kruse via llvm-commits
• [llvm] [JITLink][i386] Avoid 'i386' name clashing with built-in macro (PR #137063)   Dimitry Andric via llvm-commits
• [llvm] [SPIRV] Stop unconditionally emitting SPV_INTEL_arbitrary_precision_integers when allowed (PR #137167)   Victor Lomuller via llvm-commits
• [llvm] [VPlan] Introduce VPlanConstantFolder (PR #125365)   Luke Lau via llvm-commits
• [llvm] [SPIRV] Stop unconditionally emitting SPV_INTEL_arbitrary_precision_integers when allowed (PR #137167)   via llvm-commits
• [llvm] [AMDGPU] Classify FLAT instructions as VMEM (PR #137148)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] Classify FLAT instructions as VMEM (PR #137148)   Robert Imschweiler via llvm-commits
• [llvm] [Flang][LLVM] Remove leftover CMake for old flang handling (PR #137049)   Michael Kruse via llvm-commits
• [flang] [llvm] [CMake] Support using precompiled headers with ccache in flang (PR #136856)   Kajetan Puchalski via llvm-commits
• [llvm] [Flang][LLVM] Remove leftover CMake for old flang handling (PR #137049)   Joseph Huber via llvm-commits
• [clang] [llvm] [RISCV] Add support for Ziccamoc (PR #136694)   via llvm-commits
• [llvm] [AArch64][SME] Allow spills of ZT0 around SME ABI routines again (PR #136726)   Benjamin Maxwell via llvm-commits
• [llvm] Reland [AMDGPU] Support block load/store for CSR #130013 (PR #137169)   Diana Picus via llvm-commits
• [llvm] Reland [AMDGPU] Support block load/store for CSR #130013 (PR #137169)   via llvm-commits
• [lldb] [llvm] [lldb] Implement CLI support for reverse-continue (PR #132783)   David Spickett via llvm-commits
• [llvm] Reland [AMDGPU] Support block load/store for CSR #130013 (PR #137169)   via llvm-commits
• [llvm] [Flang-rt] Forward `libomp-mod` dependency for non-default runtime builds (PR #137035)   Michael Kruse via llvm-commits
• [llvm] [Flang-rt] Forward `libomp-mod` dependency for non-default runtime builds (PR #137035)   Michael Kruse via llvm-commits
• [llvm] [Flang-rt] Forward `libomp-mod` dependency for non-default runtime builds (PR #137035)   Michael Kruse via llvm-commits
• [llvm] [Flang-rt] Forward `libomp-mod` dependency for non-default runtime builds (PR #137035)   Joseph Huber via llvm-commits
• [llvm] Reland [AMDGPU] Support block load/store for CSR #130013 (PR #137169)   Diana Picus via llvm-commits
• [llvm] [X86][DAGCombiner][SelectionDAG] - Fold Zext Build Vector to Bitcast of widen Build Vector (PR #135010)   Simon Pilgrim via llvm-commits
• [llvm] Reland [AMDGPU] Support block load/store for CSR #130013 (PR #137169)   Diana Picus via llvm-commits
• [llvm] [GlobalOpt] Do not promote malloc if there are atomic loads/stores (PR #137158)   Yingwei Zheng via llvm-commits
• [llvm] [AArch64][SME] Allow spills of ZT0 around SME ABI routines again (PR #136726)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Allow spills of ZT0 around SME ABI routines again (PR #136726)   Benjamin Maxwell via llvm-commits
• [clang] [llvm] [clang][OpenMP][SPIR-V] Fix AS of globals and set the default AS to 4 (PR #135251)   Alexander Kornienko via llvm-commits
• [llvm] [GlobalOpt] Do not promote malloc if there are atomic loads/stores (PR #137158)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Consider FLAT instructions for VMEM hazard detection (PR #137170)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] Consider FLAT instructions for VMEM hazard detection (PR #137170)   via llvm-commits
• [llvm] [LV] Strip bad FIXME in test (PR #137142)   Florian Hahn via llvm-commits
• [llvm] [LV] Strip bad FIXME in test (PR #137142)   Florian Hahn via llvm-commits
• [llvm] [LV] Strip bad FIXME in test (PR #137142)   Florian Hahn via llvm-commits
• [llvm] 8b2d269 - [X86] Add extended test coverage for #135010   Simon Pilgrim via llvm-commits
• [llvm] [LoongArch] Fix fp_to_uint/fp_to_sint conversion errors for lasx (PR #137129)   via llvm-commits
• [llvm] [LoongArch] Fix fp_to_uint/fp_to_sint conversion errors for lasx (PR #137129)   via llvm-commits
• [llvm] [DebugInfo][GlobalOpt] Preserve source locs for optimized loads (PR #134828)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo][GlobalOpt] Preserve source locs for optimized loads (PR #134828)   Stephen Tozer via llvm-commits
• [compiler-rt] [compiler-rt] Don't exclude ubsan-asan tests on Windows/x86_64 (PR #137171)   Martin Storsjö via llvm-commits
• [compiler-rt] [compiler-rt] Don't exclude ubsan-asan tests on Windows/x86_64 (PR #137171)   via llvm-commits
• [llvm] [X86][DAGCombiner][SelectionDAG] - Fold Zext Build Vector to Bitcast of widen Build Vector (PR #135010)   Simon Pilgrim via llvm-commits
• [compiler-rt] [compiler-rt] Only include asan on x86 architectures on Windows (PR #137173)   Martin Storsjö via llvm-commits
• [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [compiler-rt] [compiler-rt] [test] Look for the right file name suffix for arm targets (PR #137174)   Martin Storsjö via llvm-commits
• [compiler-rt] [compiler-rt] Detect arm hardfloat targets via __ARM_PCS_VFP (PR #137175)   Martin Storsjö via llvm-commits
• [compiler-rt] [compiler-rt] [test] Adjust profile tests to allow arm_aapcs_vfpcc (PR #137176)   Martin Storsjö via llvm-commits
• [compiler-rt] [compiler-rt] [test] Adjust profile tests to allow arm_aapcs_vfpcc (PR #137176)   via llvm-commits
• [llvm] Reland [AMDGPU] Support block load/store for CSR #130013 (PR #137169)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] IGLP: Fixes for VMEM load detection and unsigned int handling (PR #135090)   Robert Imschweiler via llvm-commits
• [compiler-rt] [compiler-rt] Only include asan on x86 architectures on Windows (PR #137173)   Martin Storsjö via llvm-commits
• [llvm] d7f3c31 - Reapply "[LLVM][ISel][AArch64 Remove AArch64ISD::FCM##z nodes. (#135817)"   Paul Walker via llvm-commits
• [llvm] [LangRef] No target-specific size limit for atomics (PR #136864)   Michael Kruse via llvm-commits
• [polly] ecdd3fd - [RemoveDI][Polly] Use iterators instead of instruction pointers to SetInsertPoint (#135336)   via llvm-commits
• [polly] [RemoveDI][Polly] Use iterators instead of instruction pointers to SetInsertPoint (PR #135336)   Karthika Devi C via llvm-commits
• [llvm] [LLVM][ISel][AArch64 Remove AArch64ISD::FCM##z nodes. (PR #135817)   Paul Walker via llvm-commits
• [llvm] [AMDGPU] Consider FLAT instructions for VMEM hazard detection (PR #137170)   Matt Arsenault via llvm-commits
• [clang] [llvm] [clang][OpenMP][SPIR-V] Fix AS of globals and set the default AS to 4 (PR #135251)   Alex Voicu via llvm-commits
• [llvm] [BOLT][AArch64] Support for pointer authentication (v2) (PR #120064)   Gergely Bálint via llvm-commits
• [llvm] 224cd50 - [DebugInfo][GlobalOpt] Preserve source locs for optimized loads (#134828)   via llvm-commits
• [llvm] [DebugInfo][GlobalOpt] Preserve source locs for optimized loads (PR #134828)   Stephen Tozer via llvm-commits
• [clang] [llvm] [clang][OpenMP][SPIR-V] Fix AS of globals and set the default AS to 4 (PR #135251)   Alex Voicu via llvm-commits
• [llvm] [LoopInterchange] Relax the legality check to accept more patterns (PR #118267)   Ryotaro Kasuga via llvm-commits
• [llvm] [AMDGPU] Replace dynamic VGPR feature with attribute (PR #133444)   Diana Picus via llvm-commits
• [llvm] 57530c2 - [GlobalOpt] Do not promote malloc if there are atomic loads/stores (#137158)   via llvm-commits
• [llvm] [GlobalOpt] Do not promote malloc if there are atomic loads/stores (PR #137158)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU][NFC] Added Pre-commit tests for PR#137137 (PR #137150)   Matt Arsenault via llvm-commits
• [llvm] [LoopInterchange] Relax the legality check to accept more patterns (PR #118267)   Ryotaro Kasuga via llvm-commits
• [llvm] [AMDGPU][NFC] Added Pre-commit tests for PR#137137 (PR #137150)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFC] Added Pre-commit tests for PR#137137 (PR #137150)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFC] Added Pre-commit tests for PR#137137 (PR #137150)   Matt Arsenault via llvm-commits
• [llvm] f572a59 - [VectorCombine] Ensure canScalarizeAccess handles cases where the index type can't represent all inbounds values   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][SME] Allow spills of ZT0 around SME ABI routines again (PR #136726)   Benjamin Maxwell via llvm-commits
• [llvm] [TableGen][RISCV][AArch64][GISel] Properly implement isAnyExtLoad/isSignExtLoad/isZeroExtLoad for IsAtomic in SelectionDAG. (PR #137096)   Matt Arsenault via llvm-commits
• [llvm] [TableGen][RISCV][AArch64][GISel] Properly implement isAnyExtLoad/isSignExtLoad/isZeroExtLoad for IsAtomic in SelectionDAG. (PR #137096)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Replace dynamic VGPR feature with attribute (PR #133444)   Diana Picus via llvm-commits
• [llvm] [offload][SYCL] Add SYCL Module splitting. (PR #131347)   Maksim Sabianin via llvm-commits
• [llvm] [AArch64][SME] Allow spills of ZT0 around SME ABI routines again (PR #136726)   via llvm-commits
• [llvm] [RISCV] Make xrivosvizip interleave2 and deinterleave2 undef safe (PR #136733)   Luke Lau via llvm-commits
• [llvm] [RISCV] Make xrivosvizip interleave2 and deinterleave2 undef safe (PR #136733)   Luke Lau via llvm-commits
• [llvm] [RISCV] Make xrivosvizip interleave2 and deinterleave2 undef safe (PR #136733)   Luke Lau via llvm-commits
• [llvm] [AArch64][SME] Allow spills of ZT0 around SME ABI routines again (PR #136726)   Benjamin Maxwell via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Sumanth Gundapaneni via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Sumanth Gundapaneni via llvm-commits
• [llvm] [AArch64][SME] Allow spills of ZT0 around SME ABI routines again (PR #136726)   Benjamin Maxwell via llvm-commits
• [llvm] [AMDGPU] Replace dynamic VGPR feature with attribute (PR #133444)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Replace dynamic VGPR feature with attribute (PR #133444)   Shilei Tian via llvm-commits
• [llvm] [X86][SelectionDAG] Fix the Gather's base and index by modifying the Scale value (PR #134979)   Simon Pilgrim via llvm-commits
• [llvm] [X86][SelectionDAG] Fix the Gather's base and index by modifying the Scale value (PR #134979)   Simon Pilgrim via llvm-commits
• [llvm] [Dwarf] Emit `DW_AT_bit_size` for non-byte-sized types (PR #137118)   Tom Tromey via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Sumanth Gundapaneni via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Sumanth Gundapaneni via llvm-commits
• [lldb] [llvm] [lldb] Prefer `DW_AT_bit_size` over `DW_AT_byte_size` in `GetDIEBitSizeAndSign` (PR #137123)   Tom Tromey via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Sumanth Gundapaneni via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Sumanth Gundapaneni via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Sumanth Gundapaneni via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Sumanth Gundapaneni via llvm-commits
• [llvm] [PowerPC] hoist xxspltiw instruction out of the loop with FMA mutation pass. (PR #111696)   zhijian lin via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Sumanth Gundapaneni via llvm-commits
• [llvm] [LoopInterchange] Relax the legality check to accept more patterns (PR #118267)   Ryotaro Kasuga via llvm-commits
• [llvm] [X86][SelectionDAG] Fix the Gather's base and index by modifying the Scale value (PR #134979)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [RISCV] Remove `AND` mask generated by `( zext ( atomic_load ) )` by replacing the load with `zextload` for orderings not stronger then monotonic. (PR #136502)   Jan Górski via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (PR #135788)   Sumanth Gundapaneni via llvm-commits
• [clang] [llvm] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (PR #136842)   Alex Bradbury via llvm-commits
• [llvm] [JITLink][i386] Avoid 'i386' name clashing with built-in macro (PR #137063)   Lang Hames via llvm-commits
• [llvm] 10ea5ee - [X86] pr40891.ll - add X64 test coverage   Simon Pilgrim via llvm-commits
• [flang] [llvm] [CMake] Support using precompiled headers with ccache in flang (PR #136856)   David Truby via llvm-commits
• [compiler-rt] [compiler-rt] Don't exclude ubsan-asan tests on Windows/x86_64 (PR #137171)   Hans Wennborg via llvm-commits
• [compiler-rt] [compiler-rt] [test] Look for the right file name suffix for arm targets (PR #137174)   Hans Wennborg via llvm-commits
• [compiler-rt] [compiler-rt] Detect arm hardfloat targets via __ARM_PCS_VFP (PR #137175)   Hans Wennborg via llvm-commits
• [llvm] [X86][GlobalIsel] support G_FABS for f80 (PR #136718)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalIsel] support G_FABS for f80 (PR #136718)   Evgenii Kudriashov via llvm-commits
• [compiler-rt] [compiler-rt] [test] Adjust profile tests to allow arm_aapcs_vfpcc (PR #137176)   Hans Wennborg via llvm-commits
• [compiler-rt] [compiler-rt] [test] Adjust profile tests to allow arm_aapcs_vfpcc (PR #137176)   Hans Wennborg via llvm-commits
• [llvm] [X86][GlobalIsel] support G_FABS for f80 (PR #136718)   Evgenii Kudriashov via llvm-commits
• [compiler-rt] [compiler-rt] Only include asan on x86 architectures on Windows (PR #137173)   Hans Wennborg via llvm-commits
• [llvm] [AMDGPU] Consider FLAT instructions for VMEM hazard detection (PR #137170)   Robert Imschweiler via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   Matt Arsenault via llvm-commits
• [llvm] [IVDescriptors] Don't require nsz/nnan for (min|max)num. (PR #137003)   Stephen Canon via llvm-commits
• [llvm] [AMDGPU] Classify FLAT instructions as VMEM (PR #137148)   Jay Foad via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [llvm] e3eee9e - [X86] vector-trunc.ll - replace stores to ptr undef with real ptr values   Simon Pilgrim via llvm-commits
• [lldb] [llvm] [lldb] Prefer `DW_AT_bit_size` over `DW_AT_byte_size` in `GetDIEBitSizeAndSign` (PR #137123)   Yingwei Zheng via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   via llvm-commits
• [llvm] [AMDGPU] Consider FLAT instructions for VMEM hazard detection (PR #137170)   Matt Arsenault via llvm-commits
• [llvm] [NFC][LLVM][IR] Adopt vadiadic `isa<>` (PR #137001)   Rahul Joshi via llvm-commits
• [llvm] [AMDGPU] Classify FLAT instructions as VMEM (PR #137148)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Classify FLAT instructions as VMEM (PR #137148)   Robert Imschweiler via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [llvm] ed866d9 - [X86][Combine] Ensure single use chain in extract-load combine (#136520)   via llvm-commits
• [llvm] [X86][Combine] Ensure single use chain in extract-load combine (PR #136520)   Evgenii Kudriashov via llvm-commits
• [llvm] [AMDGPU] Consider FLAT instructions for VMEM hazard detection (PR #137170)   Jay Foad via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [llvm] [Analysis]: Allow inlining recursive call IF recursion depth is 1. (PR #119677)   Hassnaa Hamdi via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [llvm] [AMDGPU] Classify FLAT instructions as VMEM (PR #137148)   Robert Imschweiler via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Luke Lau via llvm-commits
• [clang] [llvm] [clang][OpenMP][SPIR-V] Fix AS of globals and set the default AS to 4 (PR #135251)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Stop unconditionally emitting SPV_INTEL_arbitrary_precision_integers when allowed (PR #137167)   Vyacheslav Levytskyy via llvm-commits
• [clang] [llvm] [clang][OpenMP][SPIR-V] Fix AS of globals and set the default AS to 4 (PR #135251)   Nick Sarnie via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)   Brox Chen via llvm-commits
• [compiler-rt] [compiler-rt] [test] Adjust profile tests to allow arm_aapcs_vfpcc (PR #137176)   Martin Storsjö via llvm-commits
• [llvm] [NVPTX] Support BFloat Store Parameter (PR #137074)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX] Support BFloat Store Parameter (PR #137074)   Justin Fargnoli via llvm-commits
• [llvm] [AMDGPU] Consider FLAT instructions for VMEM hazard detection (PR #137170)   Jay Foad via llvm-commits
• [clang] [llvm] [clang][OpenMP][SPIR-V] Fix AS of globals and set the default AS to 4 (PR #135251)   Nick Sarnie via llvm-commits
• [llvm] [GOFF] Introduce GOFFWriter class (PR #131216)   Kai Nacke via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [compiler-rt] [compiler-rt] [test] Adjust profile tests to allow arm_aapcs_vfpcc (PR #137176)   Martin Storsjö via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Steve O'Brien via llvm-commits
• [llvm] [NVPTX] Remove 'param' variants of nvvm.ptr.* intrinics (PR #137065)   Justin Fargnoli via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Initial defaultmap implementation (PR #135226)   via llvm-commits
• [llvm] [NFC] Add a pre-commit test case for #111696 (PR #136730)   zhijian lin via llvm-commits
• [llvm] 3e605b1 - [NFC] Add a pre-commit test case for #111696 (#136730)   via llvm-commits
• [llvm] [NFC] Add a pre-commit test case for #111696 (PR #136730)   zhijian lin via llvm-commits
• [compiler-rt] Enable build and testing of asan on AIX (PR #137186)   Jake Egan via llvm-commits
• [llvm] [offload][SYCL] Add SYCL Module splitting. (PR #131347)   Maksim Sabianin via llvm-commits
• [compiler-rt] Enable build and testing of asan on AIX (PR #137186)   Jake Egan via llvm-commits
• [clang] [llvm] [DLCov 2/5] Implement DebugLoc coverage tracking (PR #107279)   Stephen Tozer via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Matt Arsenault via llvm-commits
• [lldb] [llvm] Modify the localCache API to require an explicit commit on CachedFile… (PR #136121)   via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Matt Arsenault via llvm-commits
• [llvm] [offload][SYCL] Add SYCL Module splitting. (PR #131347)   Maksim Sabianin via llvm-commits
• [compiler-rt] Enable build and testing of asan on AIX (PR #137186)   via llvm-commits
• [compiler-rt] Enable build and testing of asan on AIX (PR #137186)   via llvm-commits
• [llvm] [offload][SYCL] Add SYCL Module splitting. (PR #131347)   Maksim Sabianin via llvm-commits
• [flang] [llvm] [CMake] Support using precompiled headers with ccache in flang (PR #136856)   Michael Kruse via llvm-commits
• [flang] [llvm] [CMake] Support using precompiled headers with ccache in flang (PR #136856)   Michael Kruse via llvm-commits
• [flang] [llvm] [CMake] Support using precompiled headers with ccache in flang (PR #136856)   Michael Kruse via llvm-commits
• [flang] [llvm] [CMake] Support using precompiled headers with ccache in flang (PR #136856)   Michael Kruse via llvm-commits
• [llvm] IR/Verifier: Allow vector type in atomic load and store (PR #120384)   Matt Arsenault via llvm-commits
• [flang] [llvm] [CMake] Support using precompiled headers with ccache in flang (PR #136856)   Michael Kruse via llvm-commits
• [llvm] [AMDGPU] [PeepholeOpt] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Vikash Gupta via llvm-commits
• [flang] [llvm] [CMake] Support using precompiled headers with ccache in flang (PR #136856)   Kajetan Puchalski via llvm-commits
• [llvm] [offload][SYCL] Add SYCL Module splitting. (PR #131347)   Maksim Sabianin via llvm-commits
• [compiler-rt] Enable build and testing of asan on AIX (PR #137186)   Jake Egan via llvm-commits
• [flang] [llvm] [CMake] Support using precompiled headers with ccache in flang (PR #136856)   Michael Kruse via llvm-commits
• [llvm] [AMDGPU][NFC] Added Pre-commit tests for PR#137137 (PR #137150)   Vikash Gupta via llvm-commits
• [llvm] [AMDGPU][NFC] Added Pre-commit tests for PR#137137 (PR #137150)   Matt Arsenault via llvm-commits
• [lldb] [llvm] Modify the localCache API to require an explicit commit on CachedFile… (PR #136121)   via llvm-commits
• [llvm] [SPIRV] Correctly map OpGenericCastToPtrExplicit builtins (PR #137189)   Victor Lomuller via llvm-commits
• [llvm] [SPIRV] Correctly map OpGenericCastToPtrExplicit builtins (PR #137189)   via llvm-commits
• [compiler-rt] [sanitizer_common] Implement address sanitizer on AIX: interceptors (5/n) (PR #131870)   Jake Egan via llvm-commits
• [compiler-rt] [sanitizer_common][asan] Implement address sanitizer on AIX: interceptors (5/n) (PR #131870)   Jake Egan via llvm-commits
• [clang] [llvm] [RISCV] Add support for Ziccamoc (PR #136694)   via llvm-commits
• [lldb] [llvm] Modify the localCache API to require an explicit commit on CachedFile… (PR #136121)   via llvm-commits
• [compiler-rt] [sanitizer_common] Implement address sanitizer on AIX: add platform specific support (3/n) (PR #131866)   Jake Egan via llvm-commits
• [clang] [llvm] [clang][OpenMP][SPIR-V] Fix AS of globals and set the default AS to 4 (PR #135251)   Alex Voicu via llvm-commits
• [llvm] [RISCV] Add CompressPat for all cases in isCopyInstrImpl (PR #136875)   Alex Bradbury via llvm-commits
• [llvm] [AMDGPU][NFC] Added Pre-commit tests for PR#137137 (PR #137150)   Vikash Gupta via llvm-commits
• [compiler-rt] [TySan] Fix false positives with derived classes (PR #126260)   via llvm-commits
• [compiler-rt] [sanitizer_common] Implement address sanitizer on AIX: add platform specific support (3/n) (PR #131866)   Jake Egan via llvm-commits
• [llvm] [AMDGPU][NFC] Added Pre-commit tests for PR#137137 (PR #137150)   Vikash Gupta via llvm-commits
• [lldb] [llvm] Modify the localCache API to require an explicit commit on CachedFile… (PR #136121)   via llvm-commits
• [llvm] AMDGPU: Remove amdhsa_code_object_version module flags from most tests (PR #136363)   Matt Arsenault via llvm-commits
• [flang] [llvm] [CMake] Support using precompiled headers with ccache in flang (PR #136856)   Kajetan Puchalski via llvm-commits
• [llvm] [MC] Use StringTable for MCSchedClassDesc names (PR #137012)   Jay Foad via llvm-commits
• [clang] [llvm] [clang][OpenMP][SPIR-V] Fix AS of globals and set the default AS to 4 (PR #135251)   Nick Sarnie via llvm-commits
• [clang] [llvm] [clang][OpenMP][SPIR-V] Fix AS of globals and set the default AS to 4 (PR #135251)   Nick Sarnie via llvm-commits
• [llvm] [MC] Use StringTable for MCSchedClassDesc names (PR #137012)   Jay Foad via llvm-commits
• [compiler-rt] Enable build and testing of asan on AIX (PR #137186)   Jake Egan via llvm-commits
• [compiler-rt] [sanitizer_common][asan] Implement address sanitizer on AIX: add platform specific support (3/n) (PR #131866)   Jake Egan via llvm-commits
• [llvm] 0fcc9ff - [CMake] Support using precompiled headers with ccache in flang (#136856)   via llvm-commits
• [flang] [llvm] [CMake] Support using precompiled headers with ccache in flang (PR #136856)   Kajetan Puchalski via llvm-commits
• [compiler-rt] [sanitizer_common][asan] Implement address sanitizer on AIX: add platform specific support (3/n) (PR #131866)   Jake Egan via llvm-commits
• [llvm] d43ce35 - [TableGen][GISel] Allow isTrivialOperatorNode to import patterns with isStore and a memory VT. (#137080)   via llvm-commits
• [llvm] [TableGen][GISel] Allow isTrivialOperatorNode to import patterns with isStore and a memory VT. (PR #137080)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add branch folding before branch relaxation (PR #134760)   Mikhail R. Gadelha via llvm-commits
• [llvm] AMDGPU: Remove amdhsa_code_object_version module flags from most tests (PR #136363)   Shilei Tian via llvm-commits
• [llvm] [NFC][LLVM][IR] Adopt vadiadic `isa<>` (PR #137001)   Rahul Joshi via llvm-commits
• [llvm] 4f5cfa8 - AMDGPU: Remove amdhsa_code_object_version module flags from most tests (#136363)   via llvm-commits
• [llvm] AMDGPU: Remove amdhsa_code_object_version module flags from most tests (PR #136363)   Matt Arsenault via llvm-commits
• [llvm] [TableGen][RISCV][AArch64][GISel] Properly implement isAnyExtLoad/isSignExtLoad/isZeroExtLoad for IsAtomic in SelectionDAG. (PR #137096)   Craig Topper via llvm-commits
• [llvm] [NVPTX] Support BFloat Store Parameter (PR #137074)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Support BFloat Store Parameter (PR #137074)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Support BFloat Store Parameter (PR #137074)   Alex MacLean via llvm-commits
• [llvm] [NFC][LLVM][IR] Adopt vadiadic `isa<>` (PR #137001)   Rahul Joshi via llvm-commits
• [lld] [lld][ICF] Prevent merging two sections when they point to non-globals (PR #136641)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU][NFC] Added Pre-commit tests for PR#137137 (PR #137150)   Krzysztof Drewniak via llvm-commits
• [llvm] [LangRef] Clarify the behavior of select with FP poison-generating flags (PR #137131)   John Regehr via llvm-commits
• [llvm] [PowerPC] hoist xxspltiw instruction out of the loop with FMA mutation pass. (PR #111696)   zhijian lin via llvm-commits
• [llvm] [PowerPC] hoist xxspltiw instruction out of the loop with FMA mutation pass. (PR #111696)   zhijian lin via llvm-commits
• [llvm] [TableGen][RISCV][AArch64][GISel] Properly implement isAnyExtLoad/isSignExtLoad/isZeroExtLoad for IsAtomic in SelectionDAG. (PR #137096)   Craig Topper via llvm-commits
• [llvm] [RISCV] Make xrivosvizip interleave2 and deinterleave2 undef safe (PR #136733)   Philip Reames via llvm-commits
• [compiler-rt] Enable build and testing of asan on AIX (PR #137186)   Jake Egan via llvm-commits
• [llvm] b278aa3 - [RISCV] Make xrivosvizip interleave2 and deinterleave2 undef safe (#136733)   via llvm-commits
• [llvm] [RISCV] Make xrivosvizip interleave2 and deinterleave2 undef safe (PR #136733)   Philip Reames via llvm-commits
• [llvm] a903c7b - [PowerPC] Intrinsics and tests for dmr insert/extract (#135653)   via llvm-commits
• [llvm] [PowerPC] Intrinsics and tests for dmr insert/extract (PR #135653)   via llvm-commits
• [llvm] 2ca071b - [TableGen][RISCV][AArch64][GISel] Properly implement isAnyExtLoad/isSignExtLoad/isZeroExtLoad for IsAtomic in SelectionDAG. (#137096)   via llvm-commits
• [llvm] [AMDGPU] [PeepholeOpt] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] [PeepholeOpt] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] [PeepholeOpt] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Krzysztof Drewniak via llvm-commits
• [llvm] [TableGen][RISCV][AArch64][GISel] Properly implement isAnyExtLoad/isSignExtLoad/isZeroExtLoad for IsAtomic in SelectionDAG. (PR #137096)   Craig Topper via llvm-commits
• [compiler-rt] [TySan] Fix false positives with derived classes (PR #126260)   Florian Hahn via llvm-commits
• [compiler-rt] [TySan] Fix false positives with derived classes (PR #126260)   Florian Hahn via llvm-commits
• [compiler-rt] [TySan] Fix false positives with derived classes (PR #126260)   Florian Hahn via llvm-commits
• [compiler-rt] [TySan] Fix false positives with derived classes (PR #126260)   Florian Hahn via llvm-commits
• [llvm] AMDGPU: Add range to wavefrontsize intrinsic declaration (PR #136303)   Matt Arsenault via llvm-commits
• [compiler-rt] [TySan] Fix false positives with derived classes (PR #126260)   Florian Hahn via llvm-commits
• [llvm] [PowerPC] hoist xxspltiw instruction out of the loop with FMA mutation pass. (PR #111696)   zhijian lin via llvm-commits
• [llvm] [RISCV] Add `2^N + 2^M` expanding pattern for mul (PR #137195)   Iris Shi via llvm-commits
• [llvm] [RISCV] Add `2^N + 2^M` expanding pattern for mul (PR #137195)   via llvm-commits
• [llvm] [SelectionDAG][RISCV] Teach computeKnownBits to use range metadata for atomic_load. (PR #137119)   Craig Topper via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Jonathan Thackray via llvm-commits
• [compiler-rt] [asan] Enable build and testing of asan on AIX (PR #137186)   Jake Egan via llvm-commits
• [llvm] [CGP] Despeculate ctlz/cttz with "illegal" integer types (PR #137197)   Sergei Barannikov via llvm-commits
• [llvm] [AMDGPU][NFC] Added Pre-commit tests for PR#137137 (PR #137150)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (PR #136759)   Jonathan Thackray via llvm-commits
• [llvm] [CGP] Despeculate ctlz/cttz with "illegal" integer types (PR #137197)   via llvm-commits
• [clang] [llvm] [SROA] Vector promote some memsets (PR #133301)   via llvm-commits
• [llvm] [CGP] Despeculate ctlz/cttz with "illegal" integer types (PR #137197)   Sergei Barannikov via llvm-commits
• [compiler-rt] [TySan] Fix false positives with derived classes (PR #126260)   via llvm-commits
• [llvm] [CGP] Despeculate ctlz/cttz with "illegal" integer types (PR #137197)   Sergei Barannikov via llvm-commits
• [clang] [llvm] [mlir] [TableGen] Only store direct superclasses in Record (PR #123072)   Jay Foad via llvm-commits
• [compiler-rt] [TySan] Fix false positives with derived classes (PR #126260)   via llvm-commits
• [lldb] [llvm] [lldb] Implement CLI support for reverse-continue (PR #132783)   David Spickett via llvm-commits
• [llvm] [AMDGPU] Replace dynamic VGPR feature with attribute (PR #133444)   Matt Arsenault via llvm-commits
• [llvm] [CmpInstAnalysis] Decompose icmp eq (and x, C) C2 (PR #136367)   Jeffrey Byrnes via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Philip Reames via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [llvm] [DirectX] Implement Shader Flag Analysis for `UAVsAtEveryStage` (PR #137085)   Deric C. via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Philip Reames via llvm-commits
• [llvm] [LLVM][ISel][AArch64 Remove AArch64ISD::FCM##z nodes. (PR #135817)   via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Philip Reames via llvm-commits
• [llvm] [RISCV] Initial codegen support for zvqdotq extension (PR #137039)   Philip Reames via llvm-commits
• [llvm] [RISCV] Initial codegen support for zvqdotq extension (PR #137039)   Philip Reames via llvm-commits
• [llvm] [RISCV] Initial codegen support for zvqdotq extension (PR #137039)   Philip Reames via llvm-commits
• [llvm] [llvm] Implement address sanitizer on AIX (2/n) (PR #129926)   Jake Egan via llvm-commits
• [llvm] [RISCV] Initial codegen support for zvqdotq extension (PR #137039)   Philip Reames via llvm-commits
• [clang] [llvm] [mlir] [TableGen] Only store direct superclasses in Record (PR #123072)   Jay Foad via llvm-commits
• [llvm] [RISCV] Initial codegen support for zvqdotq extension (PR #137039)   Philip Reames via llvm-commits
• [llvm] [DebugInfo] Propagate source loc from invoke to replacement branch (PR #137206)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo] Propagate source loc from invoke to replacement branch (PR #137206)   via llvm-commits
• [lld] [lld][ICF] Prevent merging two sections when they point to non-globals (PR #136641)   Peter Smith via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Craig Topper via llvm-commits
• [clang] [llvm] DO NOT MERGE: Identify places that need reserve. (PR #136543)   Jakub Kuderski via llvm-commits
• [clang] [llvm] DO NOT MERGE: Identify places that need reserve. (PR #136543)   Jakub Kuderski via llvm-commits
• [clang] [llvm] DO NOT MERGE: Identify places that need reserve. (PR #136543)   Jakub Kuderski via llvm-commits
• [clang] [llvm] DO NOT MERGE: Identify places that need reserve. (PR #136543)   Jakub Kuderski via llvm-commits
• [clang] [llvm] DO NOT MERGE: Identify places that need reserve. (PR #136543)   Jakub Kuderski via llvm-commits
• [clang] [llvm] DO NOT MERGE: Identify places that need reserve. (PR #136543)   Jakub Kuderski via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Akhilesh Moorthy via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Akhilesh Moorthy via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Luke Lau via llvm-commits
• [llvm] [DebugInfo] Propagate source loc from invoke to replacement branch (PR #137206)   Orlando Cazalet-Hyams via llvm-commits
• [clang] [llvm] Minimal support of floating-point operand bundles (PR #135658)   Serge Pavlov via llvm-commits
• [llvm] [AArch64][GlobalISel] Adopt some Ld* patterns to reduce codegen regressions (PR #135492)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] 0ab330b - [ms] [llvm-ml] Add support for `@CatStr` built-in function symbol (#130781)   via llvm-commits
• [llvm] [ms] [llvm-ml] Add support for `@CatStr` built-in function symbol (PR #130781)   Eric Astor via llvm-commits
• [compiler-rt] [compiler-rt] Only include asan on x86 architectures on Windows (PR #137173)   Vitaly Buka via llvm-commits
• [llvm] [AArch64][GlobalISel] Adopt some Ld* patterns to reduce codegen regressions (PR #135492)   Vladislav Dzhidzhoev via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   Hristo Hristov via llvm-commits
• [llvm] [DAG] visitCONCAT_VECTORS - relax legality checks (PR #137210)   Matt Arsenault via llvm-commits
• [llvm] [utils] update_llc_test_checks --downstream-target-handler-path option (PR #135879)   via llvm-commits
• [compiler-rt] [ASan] Limits the conditions of the deadlock patch (PR #137127)   Vitaly Buka via llvm-commits
• [compiler-rt] [ASan] Limits the conditions of the deadlock patch (PR #137127)   Vitaly Buka via llvm-commits
• [compiler-rt] [ASan] Limits the conditions of the deadlock patch (PR #137127)   Vitaly Buka via llvm-commits
• [compiler-rt] fe90b9d - [ASan] Limits the conditions of the deadlock patch (#137127)   via llvm-commits
• [compiler-rt] [ASan] Limits the conditions of the deadlock patch (PR #137127)   Vitaly Buka via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Sergei Barannikov via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Philip Reames via llvm-commits
• [compiler-rt] [asan] Implement address sanitizer on AIX: memory mapping (6/6) (PR #136874)   Jake Egan via llvm-commits
• [llvm] [NVPTX] Support BFloat Store Parameter (PR #137074)   Steffi Stumpos via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   Hristo Hristov via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of ShaderVisibility to DescriptorTable (PR #136751)   Finn Plummer via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Matt Arsenault via llvm-commits
• [compiler-rt] [asan] Implement address sanitizer on AIX: memory mapping (6/6) (PR #136874)   Jake Egan via llvm-commits
• [compiler-rt] [sanitizer_common][asan] Implement address sanitizer on AIX: interceptors (5/n) (PR #131870)   Jake Egan via llvm-commits
• [compiler-rt] [sanitizer_common][asan] Implement address sanitizer on AIX: interceptors (5/n) (PR #131870)   Jake Egan via llvm-commits
• [compiler-rt] [asan] Implement address sanitizer on AIX: memory mapping (6/6) (PR #136874)   Jake Egan via llvm-commits
• [compiler-rt] [ASan] Limits the conditions of the deadlock patch (PR #137127)   LLVM Continuous Integration via llvm-commits
• [llvm] update_test_checks: Relax DIFile filename checks (PR #135692)   Scott Linder via llvm-commits
• [llvm] [flang][cuda][rt] Track asynchronous allocation stream for deallocation (PR #137073)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Craig Topper via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of ShaderVisibility to DescriptorTable (PR #136751)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of ShaderVisibility to DescriptorTable (PR #136751)   Finn Plummer via llvm-commits
• [llvm] e78b763 - update_test_checks: Relax DIFile filename checks (#135692)   via llvm-commits
• [llvm] update_test_checks: Relax DIFile filename checks (PR #135692)   Scott Linder via llvm-commits
• [llvm] [CGP] Despeculate ctlz/cttz with "illegal" integer types (PR #137197)   Sergei Barannikov via llvm-commits
• [llvm] [NVPTX] Support BFloat Store Parameter (PR #137074)   Alex MacLean via llvm-commits
• [llvm] [IVDescriptors] Don't require nsz/nnan for (min|max)num. (PR #137003)   Andy Kaylor via llvm-commits
• [llvm] [Sink] Allow sinking of loads to distant blocks (PR #135986)   via llvm-commits
• [llvm] [Sink] Allow sinking of loads to distant blocks (PR #135986)   via llvm-commits
• [llvm] [Dwarf] Emit `DW_AT_bit_size` for non-byte-sized types (PR #137118)   David Blaikie via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Philip Reames via llvm-commits
• [llvm] update_test_checks: Relax DIFile filename checks (PR #135692)   LLVM Continuous Integration via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   Anshil Gandhi via llvm-commits
• [llvm] [InstCombine] Iterative replacement in PtrReplacer (PR #137215)   via llvm-commits
• [compiler-rt] [compiler-rt] [test] Look for the right file name suffix for arm targets (PR #137174)   Petr Hosek via llvm-commits
• [clang] [clang-tools-extra] [flang] [lldb] [llvm] [mlir] [openmp] [polly] [Documentation] Always use SVG for dot-generated doxygen images. (PR #136843)   Petr Hosek via llvm-commits
• [llvm] [llvm] Implement address sanitizer on AIX (2/n) (PR #129926)   Jake Egan via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Don't rely on use_empty for constants (PR #137218)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Don't rely on use_empty for constants (PR #137218)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Don't rely on use_empty for constants (PR #137218)   Matt Arsenault via llvm-commits
• [lld] [LLD][COFF] Move delay IAT into its own .didat section. (PR #137100)   via llvm-commits
• [llvm] Attributor: Don't rely on use_empty for constants (PR #137218)   via llvm-commits
• [llvm] [DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks (PR #136205)   LLVM Continuous Integration via llvm-commits
• [llvm] [NVPTX] Support BFloat Store Parameter (PR #137074)   Steffi Stumpos via llvm-commits
• [lld] [LLD][COFF] Move delay IAT into its own .didat section. (PR #137100)   via llvm-commits
• [llvm] 6e3b16b - [AArch64][GlobalISel] Fix EXTRACT_SUBREG reg classes in patterns to generate MULL. (#136083)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix EXTRACT_SUBREG reg classes in patterns to generate MULL. (PR #136083)   David Green via llvm-commits
• [llvm] [DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks (PR #136205)   LLVM Continuous Integration via llvm-commits
• [llvm] 2bc6f9d - [TableGen] Only store direct superclasses in Record (#123072)   via llvm-commits
• [clang] [llvm] [mlir] [TableGen] Only store direct superclasses in Record (PR #123072)   Jay Foad via llvm-commits
• [llvm] d6bb786 - [DebugInfo] Propagate source loc from invoke to replacement branch (#137206)   via llvm-commits
• [llvm] [DebugInfo] Propagate source loc from invoke to replacement branch (PR #137206)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks (PR #136205)   LLVM Continuous Integration via llvm-commits
• [llvm] [DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks (PR #136205)   LLVM Continuous Integration via llvm-commits
• [llvm] [DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks (PR #136205)   LLVM Continuous Integration via llvm-commits
• [llvm] [DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks (PR #136205)   LLVM Continuous Integration via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   via llvm-commits
• [llvm] 92dc18b - [DebugInfo] Fix build failure introduced by 1143a04f.   Vladislav Dzhidzhoev via llvm-commits
• [llvm] 10f6c3e - [DAG] visitCONCAT_VECTORS - relax legality checks (#137210)   via llvm-commits
• [llvm] [DAG] visitCONCAT_VECTORS - relax legality checks (PR #137210)   Simon Pilgrim via llvm-commits
• [llvm] [Dwarf] Emit `DW_AT_bit_size` for non-byte-sized types (PR #137118)   Tom Tromey via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fix a couple of unhandled DWARF situations leading to a crash (PR #137221)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fix a couple of unhandled DWARF situations leading to a crash (PR #137221)   via llvm-commits
• [llvm] [NVPTX] Support BFloat Store Parameter (PR #137074)   Nikolay Panchenko via llvm-commits
• [llvm] f427890 - [SLP]Fix PHI comparator to make it follow weak strict ordering restriction   Alexey Bataev via llvm-commits
• [llvm] [SLP] Make getSameOpcode support interchangeable instructions. (PR #133888)   Alexey Bataev via llvm-commits
• [llvm] [NVPTX][NFC] Refactoring and cleanup in NVPTXISelLowering (PR #137222)   Alex MacLean via llvm-commits
• [llvm] [NVPTX][NFC] Refactoring and cleanup in NVPTXISelLowering (PR #137222)   via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for parsing DWARF / CodeView SourceLanguage (PR #137223)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for parsing DWARF / CodeView SourceLanguage (PR #137223)   via llvm-commits
• [llvm] [SLP] Make getSameOpcode support interchangeable instructions. (PR #133888)   via llvm-commits
• [lld] [LLD][COFF] Move delay IAT into its own .didat section. (PR #137100)   via llvm-commits
• [llvm] [SLP]Improve reordering of the alternate nodes (PR #136329)   Alexey Bataev via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Sergei Barannikov via llvm-commits
• [lld] [LLD][COFF] Move delay IAT into its own .didat section. (PR #137100)   via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Improve DWARF parsing capabilities (PR #137228)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Improve DWARF parsing capabilities (PR #137228)   via llvm-commits
• [clang] [llvm] [HLSL] Implement the `faceforward` intrinsic (PR #135878)   Kaitlin Peng via llvm-commits
• [compiler-rt] [sanitizer_common] Implement address sanitizer on AIX: add platform specific functionality (4/n) (PR #131868)   Jake Egan via llvm-commits
• [clang] [llvm] [HLSL] Implement the `faceforward` intrinsic (PR #135878)   Kaitlin Peng via llvm-commits
• [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)   Matt Arsenault via llvm-commits
• [clang] [llvm] [HLSL] Implement the `faceforward` intrinsic (PR #135878)   Kaitlin Peng via llvm-commits
• [clang] [llvm] [HLSL] Implement the `faceforward` intrinsic (PR #135878)   Kaitlin Peng via llvm-commits
• [clang] [llvm] [HLSL] Implement the `faceforward` intrinsic (PR #135878)   Kaitlin Peng via llvm-commits
• [llvm] [SPIRV] Add explicit layout (PR #135789)   Steven Perron via llvm-commits
• [llvm] 7cce38b - [VPlan] Remove dead SE argument from handleUncountableEarlyExit (NFC).   Florian Hahn via llvm-commits
• [llvm] [LangRef] No target-specific size limit for atomics (PR #136864)   Eli Friedman via llvm-commits
• [compiler-rt] [HWASan] Fix symbol indexing (PR #135967)   Stefan Bossbaly via llvm-commits
• [llvm] [BOLT] Run PatchEntries pass before LongJmp (PR #137236)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Run PatchEntries pass before LongJmp (PR #137236)   via llvm-commits
• [compiler-rt] [HWASan] Fix symbol indexing (PR #135967)   Florian Mayer via llvm-commits
• [compiler-rt] [HWASan] Fix symbol indexing (PR #135967)   Florian Mayer via llvm-commits
• [llvm] [IVDescriptors] Don't require nsz/nnan for (min|max)num. (PR #137003)   Matt Arsenault via llvm-commits
• [llvm] f261f14 - [SelectionDAG][RISCV] Teach computeKnownBits to use range metadata for atomic_load. (#137119)   via llvm-commits
• [llvm] [SelectionDAG][RISCV] Teach computeKnownBits to use range metadata for atomic_load. (PR #137119)   Craig Topper via llvm-commits
• [llvm] Revert "[DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks" (PR #137237)   David Blaikie via llvm-commits
• [llvm] [HLSL] Analyze updateCounter usage (PR #135669)   Sarah Spall via llvm-commits
• [llvm] dd9f92c - Revert "[DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks" (#137237)   via llvm-commits
• [llvm] Revert "[DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks" (PR #137237)   David Blaikie via llvm-commits
• [llvm] Revert "[DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks" (PR #137237)   via llvm-commits
• [llvm] [CmpInstAnalysis] Decompose icmp eq (and x, C) C2 (PR #136367)   Jeffrey Byrnes via llvm-commits
• [llvm] f12fb2f - [HLSL] Analyze updateCounter usage (#135669)   via llvm-commits
• [llvm] c007c46 - [NVPTX] Support BFloat Store Parameter (#137074)   via llvm-commits
• [llvm] [NVPTX] Support BFloat Store Parameter (PR #137074)   Nikolay Panchenko via llvm-commits
• [llvm] Revert "Revert "[DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks"" (PR #137243)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] bea3b92 - Revert "Revert "[DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks"" (#137243)   via llvm-commits
• [llvm] Revert "Revert "[DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks"" (PR #137243)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] Revert "Revert "[DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks"" (PR #137243)   via llvm-commits
• [compiler-rt] [NFC][UBSAN] Fix minimal UBSAN test names (PR #137244)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][CFI] Add minimal runtime check for CFI (PR #137245)   Vitaly Buka via llvm-commits
• [llvm] [Offload] Override linker for device build (PR #137246)   Joseph Huber via llvm-commits
• [llvm] [Offload] Override linker for device build (PR #137246)   Joseph Huber via llvm-commits
• [llvm] [CMake] Fix the check for Windows vs ccache (PR #137238)   Kajetan Puchalski via llvm-commits
• [compiler-rt] [NFC][UBSAN] Fix minimal UBSAN test names (PR #137244)   via llvm-commits
• [compiler-rt] [NFC][CFI] Add minimal runtime check for CFI (PR #137245)   via llvm-commits
• [llvm] [Offload] Override linker for device build (PR #137246)   via llvm-commits
• [llvm] [CMake] Fix the check for Windows vs ccache (PR #137238)   Kajetan Puchalski via llvm-commits
• [compiler-rt] [NFC][CFI] Add minimal runtime check for CFI (PR #137245)   via llvm-commits
• [llvm] [SPIRV] Add explicit layout (PR #135789)   Steven Perron via llvm-commits
• [compiler-rt] [NFC][UBSAN] Fix minimal UBSAN test names (PR #137244)   Thurston Dang via llvm-commits
• [flang] [llvm] [flang] Use precompiled headers in Frontend, Lower, Parser, Semantics and Evaluate (PR #131137)   Kajetan Puchalski via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [clang] [llvm] [HLSL] Run finalize linkage pass for all targets (PR #134260)   Steven Perron via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [llvm] Revert "Revert "[DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks"" (PR #137243)   David Blaikie via llvm-commits
• [llvm] [Sink] Allow sinking of loads to distant blocks (PR #135986)   via llvm-commits
• [compiler-rt] 9f74d51 - [NFC][UBSAN] Fix minimal UBSAN test names (#137244)   via llvm-commits
• [compiler-rt] [NFC][UBSAN] Fix minimal UBSAN test names (PR #137244)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][CFI] Add minimal runtime check for CFI (PR #137245)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][CFI] Add minimal runtime check for CFI (PR #137245)   Vitaly Buka via llvm-commits
• [llvm] [DirectX] Handle <1 x ...> loads in DXILResourceAccess (PR #137076)   Justin Bogner via llvm-commits
• [llvm] 8baa212 - [DirectX] Handle <1 x ...> loads in DXILResourceAccess (#137076)   via llvm-commits
• [llvm] [DirectX] Handle <1 x ...> loads in DXILResourceAccess (PR #137076)   Justin Bogner via llvm-commits
• [compiler-rt] [NFC][CFI] Add minimal runtime check for CFI (PR #137245)   Florian Mayer via llvm-commits
• [compiler-rt] [NFC][CFI] Add minimal runtime check for CFI (PR #137245)   Florian Mayer via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [llvm] Clarify conditions of `lit` exiting with exit code 1 (PR #136190)   via llvm-commits
• [llvm] [BOLT][NFCI] Emit uniform diagnostics in DataAggregator (PR #136530)   Amir Ayupov via llvm-commits
• [llvm] 08efca9 - [LLVM][Cygwin] Fix shared library name (#136599)   via llvm-commits
• [llvm] [LLVM][Cygwin] Fix shared library name (PR #136599)   Martin Storsjö via llvm-commits
• [llvm] Clarify conditions of `lit` exiting with exit code 1 (PR #136190)   via llvm-commits
• [llvm] [InstCombine] Combine and->cmp->sel->or-disjoint into and->mul (PR #135274)   Jeffrey Byrnes via llvm-commits
• [llvm] [InstCombine] Combine and->cmp->sel->or-disjoint into and->mul (PR #135274)   Jeffrey Byrnes via llvm-commits
• [llvm] [InstCombine] Combine and->cmp->sel->or-disjoint into and->mul (PR #135274)   Jeffrey Byrnes via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [llvm] b649b35 - [HLSL] Adding support for Root Constants in LLVM Metadata (#135085)   via llvm-commits
• [llvm] Revert "[DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks" (PR #137237)   LLVM Continuous Integration via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [clang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for parsing DWARF / CodeView SourceLanguage (PR #137223)   Javier Lopez-Gomez via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Jonas Paulsson via llvm-commits
• [clang] [llvm] [HLSL] Implement the `faceforward` intrinsic (PR #135878)   Farzon Lotfi via llvm-commits
• [llvm] [LLVM][TargetParser] Handle -msys targets the same as -cygwin. (PR #136817)   Mateusz Mikuła via llvm-commits
• [llvm] [mlir] [mlir][gpu] Change GPU modules to globals (PR #135478)   Fabian Mora via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Jonas Paulsson via llvm-commits
• [llvm] [NFC][LLVM][IR] Adopt vadiadic `isa<>` (PR #137001)   Rahul Joshi via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Jonas Paulsson via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of DescriptorRangeFlags (PR #136775)   Finn Plummer via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Liam Semeria via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Liam Semeria via llvm-commits
• [llvm] [BOLT][NFCI] Switch heatmap to using parsed basic/branch events (PR #136531)   Amir Ayupov via llvm-commits
• [llvm] [NVPTX][NFC] Refactoring and cleanup in NVPTXISelLowering (PR #137222)   Artem Belevich via llvm-commits
• [llvm] [NVPTX][NFC] Refactoring and cleanup in NVPTXISelLowering (PR #137222)   Artem Belevich via llvm-commits
• [llvm] [NVPTX][NFC] Refactoring and cleanup in NVPTXISelLowering (PR #137222)   Artem Belevich via llvm-commits
• [llvm] [NVPTX][NFC] Refactoring and cleanup in NVPTXISelLowering (PR #137222)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Support BFloat Store Parameter (PR #137074)   Artem Belevich via llvm-commits
• [llvm] 67cbfb9 - [HLSL] Implement the `faceforward` intrinsic (#135878)   via llvm-commits
• [clang] [llvm] [HLSL] Implement the `faceforward` intrinsic (PR #135878)   Kaitlin Peng via llvm-commits
• [llvm] [NVPTX][NFC] Refactoring and cleanup in NVPTXISelLowering (PR #137222)   Alex MacLean via llvm-commits
• [llvm] Revert "[DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks" (PR #137237)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [NFC][UBSAN] Fix minimal UBSAN test names (PR #137244)   LLVM Continuous Integration via llvm-commits
• [llvm] [NVPTX] Support BFloat Store Parameter (PR #137074)   Steffi Stumpos via llvm-commits
• [llvm] [HLSL][NFC] Rename getBindingMap to getResourceMap (PR #137256)   Helena Kotas via llvm-commits
• [llvm] [RISCV] Add codegen tests for `vector.(de)interleave3/5/7` on FP scalable vectors (PR #137257)   Min-Yih Hsu via llvm-commits
• [llvm] [HLSL][NFC] Rename getBindingMap to getResourceMap (PR #137256)   via llvm-commits
• [llvm] [HLSL][NFC] Rename getBindingMap to getResourceMap (PR #137256)   via llvm-commits
• [llvm] [HLSL] Implement DXILResourceBindingAnalysis (PR #137258)   Helena Kotas via llvm-commits
• [llvm] [flang][rt] Attempt to support some complex pow on the device (PR #135741)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [RISCV] Add codegen tests for `vector.(de)interleave3/5/7` on FP scalable vectors (PR #137257)   Craig Topper via llvm-commits
• [llvm] [HLSL] Implement DXILResourceBindingAnalysis (PR #137258)   Helena Kotas via llvm-commits
• [llvm] [HLSL] Implement DXILResourceBindingAnalysis (PR #137258)   via llvm-commits
• [llvm] [HLSL] Implement DXILResourceBindingAnalysis (PR #137258)   via llvm-commits
• [llvm] [HLSL] Implement DXILResourceBindingAnalysis (PR #137258)   via llvm-commits
• [llvm] [NVPTX] Support BFloat Store Parameter (PR #137074)   Artem Belevich via llvm-commits
• [llvm] [DirectX] Adding support for Root Descriptors in obj2yaml/yaml2obj (PR #137259)   via llvm-commits
• [llvm] [DirectX] Adding support for Root Descriptors in obj2yaml/yaml2obj (PR #137259)   via llvm-commits
• [llvm] [DirectX] Adding support for Root Descriptors in obj2yaml/yaml2obj (PR #137259)   via llvm-commits
• [llvm] [DirectX] Adding support for Root Descriptors in obj2yaml/yaml2obj (PR #137259)   via llvm-commits
• [llvm] [DirectX] Adding support for Root Descriptors in obj2yaml/yaml2obj (PR #137259)   via llvm-commits
• [llvm] 768d3ba - github-automation.py: Add debug output to the commit-request-greeter (#137104)   via llvm-commits
• [llvm] github-automation.py: Add debug output to the commit-request-greeter (PR #137104)   Tom Stellard via llvm-commits
• [llvm] [RISCV] Add branch folding before branch relaxation (PR #134760)   Mikhail R. Gadelha via llvm-commits
• [llvm] [RISCV] Add branch folding before branch relaxation (PR #134760)   Mikhail R. Gadelha via llvm-commits
• [clang] [llvm] [DLCov 2/5] Implement DebugLoc coverage tracking (PR #107279)   Scott Manley via llvm-commits
• [llvm] [DirectX] Adding support for Root Descriptors in obj2yaml/yaml2obj (PR #137259)   via llvm-commits
• [llvm] [NVPTX][NFC] Refactoring and cleanup in NVPTXISelLowering (PR #137222)   Alex MacLean via llvm-commits
• [llvm] [NVPTX][NFC] Refactoring and cleanup in NVPTXISelLowering (PR #137222)   Alex MacLean via llvm-commits
• [llvm] [RISCV] Add codegen tests for `vector.(de)interleave3/5/7` on FP scalable vectors (PR #137257)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Add codegen tests for `vector.(de)interleave3/5/7` on FP scalable vectors (PR #137257)   Min-Yih Hsu via llvm-commits
• [llvm] [NVPTX][NFC] Refactoring and cleanup in NVPTXISelLowering (PR #137222)   Artem Belevich via llvm-commits
• [compiler-rt] [NFC][UBSAN] Fix minimal UBSAN test names (PR #137244)   LLVM Continuous Integration via llvm-commits
• [llvm] [NVPTX][NFC] Refactoring and cleanup in NVPTXISelLowering (PR #137222)   Artem Belevich via llvm-commits
• [llvm] [LSV] Insert casts to vectorize mismatched types (PR #134436)   Anshil Gandhi via llvm-commits
• [llvm] [NFC][LLVM] Refactor MachineInstr operand accessors (PR #137261)   Rahul Joshi via llvm-commits
• [llvm] [HLSL][NFC] Rename getBindingMap to getResourceMap (PR #137256)   Ashley Coleman via llvm-commits
• [llvm] [RISCV] Add codegen tests for `vector.(de)interleave3/5/7` on FP scalable vectors (PR #137257)   Craig Topper via llvm-commits
• [llvm] [WebAssembly] Enable a limited amount of stackification for debug code (PR #136510)   Derek Schuff via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   via llvm-commits
• [llvm] [RISCV] Add `2^N + 2^M` expanding pattern for mul (PR #137195)   Max Graey via llvm-commits
• [llvm] [RISCV] Add `2^N + 2^M` expanding pattern for mul (PR #137195)   Craig Topper via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Liam Semeria via llvm-commits
• [llvm] [NVPTX][NFC] Refactoring and cleanup in NVPTXISelLowering (PR #137222)   Alex MacLean via llvm-commits
• [llvm] [NVPTX][NFC] Refactoring and cleanup in NVPTXISelLowering (PR #137222)   Alex MacLean via llvm-commits
• [llvm] [NFC][LLVM] Refactor MachineInstr operand accessors (PR #137261)   Craig Topper via llvm-commits
• [llvm] [bazel] Depend on full Utility library in lldb (PR #137265)   Keith Smiley via llvm-commits
• [llvm] [bazel] Depend on full Utility library in lldb (PR #137265)   Keith Smiley via llvm-commits
• [llvm] Revert "[DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks" (PR #137237)   LLVM Continuous Integration via llvm-commits
• [llvm] Revert "[DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks" (PR #137237)   LLVM Continuous Integration via llvm-commits
• [llvm] Revert "[DebugInfo][DWARF] Emit DW_AT_abstract_origin for concrete/inlined DW_TAG_lexical_blocks" (PR #137237)   LLVM Continuous Integration via llvm-commits
• [llvm] [mlir] [mlir][gpu] Change GPU modules to globals (PR #135478)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] fdbf073 - Revert "[DLCov] Implement DebugLoc coverage tracking (#107279)"   Stephen Tozer via llvm-commits
• [clang] [llvm] [DLCov 2/5] Implement DebugLoc coverage tracking (PR #107279)   Stephen Tozer via llvm-commits
• [llvm] workflows/commit-access-greeter: Add pull-request read permissions (PR #137268)   Tom Stellard via llvm-commits
• [llvm] workflows/commit-access-greeter: Add pull-request read permissions (PR #137268)   via llvm-commits
• [llvm] 7122d9c - [RISCV] Add codegen tests for `vector.(de)interleave3/5/7` on FP scalable vectors (#137257)   via llvm-commits
• [llvm] [RISCV] Add codegen tests for `vector.(de)interleave3/5/7` on FP scalable vectors (PR #137257)   Min-Yih Hsu via llvm-commits
• [llvm] [LLVM][Cygwin] Fix shared library name (PR #136599)   LLVM Continuous Integration via llvm-commits
• [llvm] [NVPTX][NFC] Refactoring and cleanup in NVPTXISelLowering (PR #137222)   Artem Belevich via llvm-commits
• [llvm] [NVPTX][NFC] Refactoring and cleanup in NVPTXISelLowering (PR #137222)   Artem Belevich via llvm-commits
• [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)   Brox Chen via llvm-commits
• [llvm] [NFC][LLVM] Refactor MachineInstr operand accessors (PR #137261)   Rahul Joshi via llvm-commits
• [llvm] workflows/commit-access-greeter: Add pull-request read permissions (PR #137268)   Aiden Grossman via llvm-commits
• [llvm] workflows/commit-access-greeter: Add pull-request read permissions (PR #137268)   Tom Stellard via llvm-commits
• [llvm] [GlobalISel] Enhance iPTR type support in SDAG patterns (PR #111503)   Evgenii Kudriashov via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Joshua Batista via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [llvm] [SelectionDAG][Targets] Replace atomic_load_8/atomic_load_16 with atomic_load_*ext_8/atomic_load_*ext_16 where possible. (PR #137279)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][Targets] Replace atomic_load_8/atomic_load_16 with atomic_load_*ext_8/atomic_load_*ext_16 where possible. (PR #137279)   via llvm-commits
• [llvm] [SelectionDAG][Targets] Replace atomic_load_8/atomic_load_16 with atomic_load_*ext_8/atomic_load_*ext_16 where possible. (PR #137279)   via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [compiler-rt] [NFC][CFI] Add minimal runtime test for CFI (PR #137245)   Qinkun Bao via llvm-commits
• [llvm] f0c61d2 - CodeGen: Add ISD::AssertNoFPClass (#135946)   via llvm-commits
• [llvm] CodeGen: Add ISD::AssertNoFPClass (PR #135946)   YunQiang Su via llvm-commits
• [llvm] RISC-V: Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)   YunQiang Su via llvm-commits
• [llvm] RISC-V: Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)   YunQiang Su via llvm-commits
• [llvm] [VPlan] Add VPInstruction::StepVector and use it in VPWidenIntOrFpInductionRecipe (PR #129508)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add VPInstruction::StepVector and use it in VPWidenIntOrFpInductionRecipe (PR #129508)   Luke Lau via llvm-commits
• [llvm] [Coroutines] Create C++ noop coroutine with default function attributes (PR #134878)   Eli Friedman via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [llvm] AMDGPU: Add range to wavefrontsize intrinsic declaration (PR #136303)   Shilei Tian via llvm-commits
• [llvm] [VPlan] Add VPInstruction::StepVector and use it in VPWidenIntOrFpInductionRecipe (PR #129508)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG][Targets] Replace atomic_load_8/atomic_load_16 with atomic_load_*ext_8/atomic_load_*ext_16 where possible. (PR #137279)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][Targets] Replace atomic_load_8/atomic_load_16 with atomic_load_*ext_8/atomic_load_*ext_16 where possible. (PR #137279)   Craig Topper via llvm-commits
• [llvm] [LoongArch] Try to widen shuffle mask (PR #136081)   via llvm-commits
• [llvm] [LoongArch] Fix fp_to_uint/fp_to_sint conversion errors for lasx (PR #137129)   via llvm-commits
• [llvm] [LoongArch] Fix fp_to_uint/fp_to_sint conversion errors for lasx (PR #137129)   via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Luke Lau via llvm-commits
• [llvm] [Coroutines] Create C++ noop coroutine with default function attributes (PR #134878)   Chuanqi Xu via llvm-commits
• [llvm] [CGP] Despeculate ctlz/cttz with "illegal" integer types (PR #137197)   Phoebe Wang via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Pawan Nirpal via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Brox Chen via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Liam Semeria via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Brox Chen via llvm-commits
• [llvm] [ms] [llvm-ml] Allow PTR casting of registers to their own size (PR #132751)   Phoebe Wang via llvm-commits
• [llvm] [LoongArch] Try to widen shuffle mask (PR #136081)   via llvm-commits
• [llvm] [RISCV] Sink vp.splat operands of VP intrinsic. (PR #133245)   via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   via llvm-commits
• [llvm] 7a42427 - Revert "[X86][APX] Support peephole optimization with CCMP instruction (#129994)" (#136796)   via llvm-commits
• [llvm] Revert "[X86][APX] Support peephole optimization with CCMP instruction (#129994)" (PR #136796)   Feng Zou via llvm-commits
• [llvm] 462bf47 - [InstCombine] Refactor the code for folding logicop and sext/zext. NFC. (#137132)   via llvm-commits
• [llvm] [InstCombine] Refactor the code for folding logicop and sext/zext. NFC. (PR #137132)   Jim Lin via llvm-commits
• [llvm] [LoongArch] Fix fp_to_uint/fp_to_sint conversion errors for lasx (PR #137129)   via llvm-commits
• [llvm] ea698c4 - [NVPTX][NFC] Refactoring and cleanup in NVPTXISelLowering (#137222)   via llvm-commits
• [llvm] [NVPTX][NFC] Refactoring and cleanup in NVPTXISelLowering (PR #137222)   Alex MacLean via llvm-commits
• [llvm] [Offload] Deprecate `openmp` and `offload` projects builds (PR #136314)   Johannes Doerfert via llvm-commits
• [llvm] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Johannes Doerfert via llvm-commits
• [llvm] [ConstraintElim] Fix poison check before adding intrinsic facts (PR #136291)   Iris Shi via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   A. Jiang via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   A. Jiang via llvm-commits
• [llvm] [LoongArch] Try to widen shuffle mask (PR #136081)   via llvm-commits
• [llvm] [LoongArch] Fix fp_to_uint/fp_to_sint conversion errors for lasx (PR #137129)   via llvm-commits
• [llvm] [LLVM][Cygwin] Fix shared library name (PR #136599)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Akhilesh Moorthy via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Akhilesh Moorthy via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Akhilesh Moorthy via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Akhilesh Moorthy via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Akhilesh Moorthy via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Akhilesh Moorthy via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Akhilesh Moorthy via llvm-commits
• [clang] [llvm] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (PR #136842)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (PR #136842)   Pengcheng Wang via llvm-commits
• [llvm] [InstCombine] Refactor the code for folding logicop and sext/zext. NFC. (PR #137132)   LLVM Continuous Integration via llvm-commits
• [llvm] Fix comments on module getLargeDataThreshold/setLargeDataThreshold (PR #137283)   YAMAMOTO Takashi via llvm-commits
• [llvm] Fix comments on module getLargeDataThreshold/setLargeDataThreshold (PR #137283)   via llvm-commits
• [llvm] Fix comments on module getLargeDataThreshold/setLargeDataThreshold (PR #137283)   YAMAMOTO Takashi via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [clang] [llvm] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (PR #136842)   Craig Topper via llvm-commits
• [llvm] Revert "[X86][APX] Support peephole optimization with CCMP instruction (#129994)" (PR #136796)   LLVM Continuous Integration via llvm-commits
• [llvm] [Dwarf] Emit `DW_AT_bit_size` for non-byte-sized types (PR #137118)   Yingwei Zheng via llvm-commits
• [llvm] [LangRef] Clarify the behavior of select with FP poison-generating flags (PR #137131)   Yingwei Zheng via llvm-commits
• [llvm] [mlir][bazel] Added a target for the CF dialect C API (PR #137146)   Jacques Pienaar via llvm-commits
• [llvm] [mlir][bazel] Added a target for the CF dialect C API (PR #137146)   Jacques Pienaar via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Austin Kerbow via llvm-commits
• [llvm] [Sink] Allow sinking of loads to distant blocks (PR #135986)   via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [llvm] [CGP] Despeculate ctlz/cttz with "illegal" integer types (PR #137197)   Sergei Barannikov via llvm-commits
• [llvm] [InstCombine] Preserve disjoint or after folding casted bitwise logic (PR #136815)   Jim Lin via llvm-commits
• [llvm] [SelectionDAG][Targets] Replace atomic_load_8/atomic_load_16 with atomic_load_*ext_8/atomic_load_*ext_16 where possible. (PR #137279)   Sergei Barannikov via llvm-commits
• [llvm] [CGP] Despeculate ctlz/cttz with "illegal" integer types (PR #137197)   Sergei Barannikov via llvm-commits
• [llvm] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] [SelectionDAG][Targets] Replace atomic_load_8/atomic_load_16 with atomic_load_*ext_8/atomic_load_*ext_16 where possible. (PR #137279)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Preserve disjoint or after folding casted bitwise logic (PR #136815)   Jim Lin via llvm-commits
• [llvm] [CGP] Despeculate ctlz/cttz with "illegal" integer types (PR #137197)   Phoebe Wang via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [clang] [llvm] [WIP] Clang ABI Types (PR #133080)   via llvm-commits
• [llvm] [CGP] Despeculate ctlz/cttz with "illegal" integer types (PR #137197)   Sergei Barannikov via llvm-commits
• [llvm] [llvm-c] Add `LLVMConstDataArray` and `LLVMGetRawDataValues` (PR #129440)   Quinton Miller via llvm-commits
• [llvm] [CGP] Despeculate ctlz/cttz with "illegal" integer types (PR #137197)   Sergei Barannikov via llvm-commits
• [llvm] [CGP] Despeculate ctlz/cttz with "illegal" integer types (PR #137197)   Sergei Barannikov via llvm-commits
• [llvm] 38ad926 - [LangRef] Clarify the behavior of select with FP poison-generating flags (#137131)   via llvm-commits
• [llvm] [LangRef] Clarify the behavior of select with FP poison-generating flags (PR #137131)   Yingwei Zheng via llvm-commits
• [llvm] 9c2190e - [RISCV] Add support for Ziccamoc (#136694)   via llvm-commits
• [clang] [llvm] [RISCV] Add support for Ziccamoc (PR #136694)   Liao Chunyu via llvm-commits
• [llvm] [SelectionDAG][Targets] Replace atomic_load_8/atomic_load_16 with atomic_load_*ext_8/atomic_load_*ext_16 where possible. (PR #137279)   Sergei Barannikov via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   YunQiang Su via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   YunQiang Su via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Feng Zou via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [llvm] 46f9117 - [CodeGen] Fix -Wunused-variable in SelectionDAG.cpp (NFC)   Jie Fu via llvm-commits
• [llvm] Clarify conditions of `lit` exiting with exit code 1 (PR #136190)   James Henderson via llvm-commits
• [llvm] [CGP] Despeculate ctlz/cttz with "illegal" integer types (PR #137197)   Phoebe Wang via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Vikash Gupta via llvm-commits
• [llvm] [CGP] Despeculate ctlz/cttz with "illegal" integer types (PR #137197)   Sergei Barannikov via llvm-commits
• [llvm] [InstCombine] Preserve the sign bit of NaN in `SimplifyDemandedUseFPClass` (PR #137287)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Vikash Gupta via llvm-commits
• [llvm] [InstCombine] Preserve the sign bit of NaN in `SimplifyDemandedUseFPClass` (PR #137287)   via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Vikash Gupta via llvm-commits
• [llvm] [InstCombine] Preserve disjoint or after folding casted bitwise logic (PR #136815)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Vikash Gupta via llvm-commits
• [llvm] [InstCombine] Preserve disjoint or after folding casted bitwise logic (PR #136815)   Yingwei Zheng via llvm-commits
• [llvm] [X86][SelectionDAG] Fix the Gather's base and index by modifying the Scale value (PR #134979)   Rohit Aggarwal via llvm-commits
• [lldb] [llvm] [lldb] Implement CLI support for reverse-continue (PR #132783)   Pavel Labath via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Vikash Gupta via llvm-commits
• [llvm] 71329c6 - [AArch64][GlobalISel] Add test coverage for sub1.ll. NFC   David Green via llvm-commits
• [llvm] [X86][SelectionDAG] Fix the Gather's base and index by modifying the Scale value (PR #134979)   Rohit Aggarwal via llvm-commits
• [llvm] [X86][SelectionDAG] Fix the Gather's base and index by modifying the Scale value (PR #134979)   Rohit Aggarwal via llvm-commits
• [llvm] [X86][DAGCombiner][SelectionDAG] - Fold Zext Build Vector to Bitcast of widen Build Vector (PR #135010)   Rohit Aggarwal via llvm-commits
• [llvm] [X86][DAGCombiner][SelectionDAG] - Fold Zext Build Vector to Bitcast of widen Build Vector (PR #135010)   Rohit Aggarwal via llvm-commits
• [llvm] [X86][DAGCombiner][SelectionDAG] - Fold Zext Build Vector to Bitcast of widen Build Vector (PR #135010)   Rohit Aggarwal via llvm-commits
• [llvm] [RISCV] Add `2^N + 2^M` expanding pattern for mul (PR #137195)   Iris Shi via llvm-commits
• [llvm] [RISCV] Add `2^N + 2^M` expanding pattern for mul (PR #137195)   Iris Shi via llvm-commits
• [llvm] [GlobalISel] Clear nsw flags when converting sub to add. (PR #137288)   David Green via llvm-commits
• [llvm] [GlobalISel] Clear nsw flags when converting sub to add. (PR #137288)   via llvm-commits
• [llvm] [AMDGPU] Implement IR expansion for frem instruction (PR #130988)   Frederik Harwath via llvm-commits
• [llvm] [RISCV] Add `2^N + 2^M` expanding pattern for mul (PR #137195)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Implement IR expansion for frem instruction (PR #130988)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] Implement IR expansion for frem instruction (PR #130988)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] Implement IR expansion for frem instruction (PR #130988)   Frederik Harwath via llvm-commits
• [llvm] [InstCombine] Preserve disjoint or after folding casted bitwise logic (PR #136815)   Jim Lin via llvm-commits
• [llvm] [InstCombine] Preserve disjoint or after folding casted bitwise logic (PR #136815)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Preserve disjoint or after folding casted bitwise logic (PR #136815)   Nikita Popov via llvm-commits
• [llvm] [CodeGen][Pass] Add `TargetPassBuilder` (PR #137290)   via llvm-commits
• [llvm] [InstCombine] Preserve the sign bit of NaN in `SimplifyDemandedUseFPClass` (PR #137287)   Nikita Popov via llvm-commits
• [compiler-rt] [NFC][CFI] Add minimal runtime test for CFI (PR #137245)   Vitaly Buka via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Nikita Popov via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   Hristo Hristov via llvm-commits
• [llvm] [LoongArch] Fix fp_to_uint/fp_to_sint conversion errors for lasx (PR #137129)   via llvm-commits
• [llvm] [InstCombine][DebugInfo] Update debug value uses in `freelyInvertAllUsersOf` (PR #137013)   Yingwei Zheng via llvm-commits
• [llvm] [LoongArch] Fix fp_to_uint/fp_to_sint conversion errors for lasx (PR #137129)   via llvm-commits
• [llvm] [CMake] Fix the check for Windows vs ccache (PR #137238)   Petr Hosek via llvm-commits
• [llvm] [llvm-c] Add `LLVMConstDataArray` and `LLVMGetRawDataValues` (PR #129440)   Nikita Popov via llvm-commits
• [llvm] [llvm-c] Add `LLVMConstDataArray` and `LLVMGetRawDataValues` (PR #129440)   Nikita Popov via llvm-commits
• [llvm] [llvm-c] Add `LLVMConstDataArray` and `LLVMGetRawDataValues` (PR #129440)   Nikita Popov via llvm-commits
• [llvm] Fix comments on module getLargeDataThreshold/setLargeDataThreshold (PR #137283)   Nikita Popov via llvm-commits
• [llvm] [IR] Fix comments on module getLargeDataThreshold/setLargeDataThreshold (NFC) (PR #137283)   Nikita Popov via llvm-commits
• [llvm] 79316f9 - [IR] Fix comments on module getLargeDataThreshold/setLargeDataThreshold (NFC) (#137283)   via llvm-commits
• [llvm] [IR] Fix comments on module getLargeDataThreshold/setLargeDataThreshold (NFC) (PR #137283)   Nikita Popov via llvm-commits
• [llvm] 2168455 - [AMDGPU][SplitModule] Do not create empty modules (#135761)   via llvm-commits
• [llvm] [AMDGPU][SplitModule] Do not create empty modules (PR #135761)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Implement IR expansion for frem instruction (PR #130988)   Frederik Harwath via llvm-commits
• [llvm] [InstCombine] Preserve the sign bit of NaN in `SimplifyDemandedUseFPClass` (PR #137287)   Yingwei Zheng via llvm-commits
• [llvm] [VPlan] Manage noalias/alias_scope metadata in VPlan. (NFC) (PR #136450)   via llvm-commits
• [llvm] Linker: Remove dropTriviallyDeadConstantArrays(). (PR #137081)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Implement IR expansion for frem instruction (PR #130988)   Frederik Harwath via llvm-commits
• [llvm] ffbd6ba - [CMake] Fix the check for Windows vs ccache (#137238)   via llvm-commits
• [llvm] [CMake] Fix the check for Windows vs ccache (PR #137238)   Martin Storsjö via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Phoebe Wang via llvm-commits
• [llvm] [llvm-c] Add `LLVMConstDataArray` and `LLVMGetRawDataValues` (PR #129440)   Quinton Miller via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Phoebe Wang via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Phoebe Wang via llvm-commits
• [llvm] [GlobalISel] Diagnose inline assembly constraint lowering errors (PR #135782)   Pierre van Houtryve via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Phoebe Wang via llvm-commits
• [llvm] [AArch64][SME] Split SMECallAttrs out of SMEAttrs (NFC) (PR #137239)   Benjamin Maxwell via llvm-commits
• [llvm] 86cca00 - [llvm-c] Add `LLVMConstDataArray` and `LLVMGetRawDataValues` (#129440)   via llvm-commits
• [llvm] [llvm-c] Add `LLVMConstDataArray` and `LLVMGetRawDataValues` (PR #129440)   Nikita Popov via llvm-commits
• [llvm] [LLVM-C] Support debug info for enumerators of arbitrary sizes (PR #76735)   Nikita Popov via llvm-commits
• [llvm] [LoongArch] Fix fp_to_uint/fp_to_sint conversion errors for lasx (PR #137129)   via llvm-commits
• [llvm] [mlir] [mlir][gpu] Change GPU modules to globals (PR #135478)   Christian Sigg via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Lane (NFC). (PR #137030)   via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Lane (NFC). (PR #137030)   via llvm-commits
• [llvm] dadea96 - AMDGPU: Add range to wavefrontsize intrinsic declaration (#136303)   via llvm-commits
• [llvm] AMDGPU: Add range to wavefrontsize intrinsic declaration (PR #136303)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add noundef to mbcnt intrinsic returns (PR #136304)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][Pass] Add `TargetPassBuilder` (PR #137290)   via llvm-commits
• [llvm] [GlobalISel] Clear nsw flags when converting sub to add. (PR #137288)   Nikita Popov via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   via llvm-commits
• [llvm] [BOLT] Run PatchEntries pass before LongJmp (PR #137236)   Paschalis Mpeis via llvm-commits
• [llvm] [NFC] Clarify the syntax of passes flag (PR #136175)   Nabeel Omer via llvm-commits
• [llvm] [AMDGPU][SplitModule] Do not create empty modules (PR #135761)   LLVM Continuous Integration via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [llvm] [GlobalISel] Diagnose inline assembly constraint lowering errors (PR #135782)   Pierre van Houtryve via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Remove Named flag from OperatorInfo::Member entries (PR #136862)   Michael Buch via llvm-commits
• [llvm] [SelectionDAG][Targets] Replace atomic_load_8/atomic_load_16 with atomic_load_*ext_8/atomic_load_*ext_16 where possible. (PR #137279)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Diagnose inline assembly constraint lowering errors (PR #135782)   Pierre van Houtryve via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Add Named flag to "pm" operator (PR #136862)   Michael Buch via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Add Named flag to "pm" operator (PR #136862)   Michael Buch via llvm-commits
• [llvm] [InstCombine] Preserve the sign bit of NaN in `SimplifyDemandedUseFPClass` (PR #137287)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Preserve the sign bit of NaN in `SimplifyDemandedUseFPClass` (PR #137287)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Preserve the sign bit of NaN in `SimplifyDemandedUseFPClass` (PR #137287)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Preserve the sign bit of NaN in `SimplifyDemandedUseFPClass` (PR #137287)   Yingwei Zheng via llvm-commits
• [llvm] [X86] shouldReduceLoadWidth - don't split loads if we can freely reuse full width legal binop (PR #129695)   Simon Pilgrim via llvm-commits
• [llvm] [LLVM-C] Support debug info for enumerators of arbitrary sizes (PR #76735)   Quinton Miller via llvm-commits
• [llvm] 4955c3c - [LV] Strip bad FIXME in test (#137142)   via llvm-commits
• [llvm] [LV] Strip bad FIXME in test (PR #137142)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Split GEPs with multiple variable indices (PR #137297)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Split GEPs with multiple variable indices (PR #137297)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Split GEPs with multiple variable indices (PR #137297)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Split GEPs with multiple variable indices (PR #137297)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Split GEPs with multiple variable indices (PR #137297)   Nikita Popov via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   YunQiang Su via llvm-commits
• [llvm] Clarify ban evasion policy (PR #137298)   Kristof Beyls via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   YunQiang Su via llvm-commits
• [llvm] [LV] Fix MinBWs in WidenIntrinsic case (PR #137005)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix MinBWs in WidenIntrinsic case (PR #137005)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix MinBWs in WidenIntrinsic case (PR #137005)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix MinBWs in WidenIntrinsic case (PR #137005)   Florian Hahn via llvm-commits
• [llvm] a267225 - [lldb][Mangled] Retrieve and cache demangled name info (#131836)   Michael Buch via llvm-commits
• [llvm] [WIP][X86] combineX86ShufflesRecursively - attempt to combine shuffles with larger types from EXTRACT_SUBVECTOR nodes (PR #133947)   Simon Pilgrim via llvm-commits
• [llvm] [RISCV] Add `2^N + 2^M` expanding pattern for mul (PR #137195)   Iris Shi via llvm-commits
• [llvm] [RISCV] Expand constant multiplication for targets without M extension (PR #137195)   Iris Shi via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Feng Zou via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Feng Zou via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Feng Zou via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Feng Zou via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Feng Zou via llvm-commits
• [llvm] 8caba9a - [InstCombine] Drop integral/non-integral check prefixes from test (NFC)   Nikita Popov via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   via llvm-commits
• [llvm] [RISCV] Expand constant multiplication for targets without M extension (PR #137195)   Iris Shi via llvm-commits
• [llvm] [InstCombine] Preserve disjoint or after folding casted bitwise logic (PR #136815)   Jim Lin via llvm-commits
• [compiler-rt] 34660eb - [compiler-rt] Don't exclude ubsan-asan tests on Windows/x86_64 (#137171)   via llvm-commits
• [compiler-rt] [compiler-rt] Don't exclude ubsan-asan tests on Windows/x86_64 (PR #137171)   Martin Storsjö via llvm-commits
• [llvm] [LV] Fix MinBWs in WidenIntrinsic case (PR #137005)   Ramkumar Ramachandra via llvm-commits
• [compiler-rt] 6559330 - [compiler-rt] Only include asan on x86 architectures on Windows (#137173)   via llvm-commits
• [compiler-rt] [compiler-rt] Only include asan on x86 architectures on Windows (PR #137173)   Martin Storsjö via llvm-commits
• [compiler-rt] b338796 - [compiler-rt] [test] Look for the right file name suffix for arm targets (#137174)   via llvm-commits
• [compiler-rt] [compiler-rt] [test] Look for the right file name suffix for arm targets (PR #137174)   Martin Storsjö via llvm-commits
• [compiler-rt] 2de001d - [compiler-rt] Detect arm hardfloat targets via __ARM_PCS_VFP (#137175)   via llvm-commits
• [compiler-rt] [compiler-rt] Detect arm hardfloat targets via __ARM_PCS_VFP (PR #137175)   Martin Storsjö via llvm-commits
• [compiler-rt] 3e56f5f - [compiler-rt] [test] Adjust profile tests to allow arm_aapcs_vfpcc (#137176)   via llvm-commits
• [compiler-rt] [compiler-rt] [test] Adjust profile tests to allow arm_aapcs_vfpcc (PR #137176)   Martin Storsjö via llvm-commits
• [llvm] [AMDGPU] Support bottom-up postRA scheduing. (PR #135295)   Harrison Hao via llvm-commits
• [llvm] [RISCV] Expand constant multiplication for targets without M extension (PR #137195)   Iris Shi via llvm-commits
• [llvm] [SystemZ] Add proper mcount handling (PR #135767)   Dominik Steenken via llvm-commits
• [llvm] [SystemZ] Add proper mcount handling (PR #135767)   Dominik Steenken via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Feng Zou via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Feng Zou via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Add Named flag to "pm" operator (PR #136862)   Michael Buch via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Feng Zou via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Feng Zou via llvm-commits
• [llvm] Reland [AMDGPU] Support block load/store for CSR #130013 (PR #137169)   Diana Picus via llvm-commits
• [llvm] [SystemZ] Add proper mcount handling (PR #135767)   Dominik Steenken via llvm-commits
• [llvm] [X86][DAGCombiner][SelectionDAG] - Fold Zext Build Vector to Bitcast of widen Build Vector (PR #135010)   Rohit Aggarwal via llvm-commits
• [llvm] [AMDGPU] Replace dynamic VGPR feature with attribute (PR #133444)   Diana Picus via llvm-commits
• [llvm] [SystemZ] Add proper mcount handling (PR #135767)   Dominik Steenken via llvm-commits
• [llvm] 5bad5d8 - Reland [AMDGPU] Support block load/store for CSR #130013 (#137169)   via llvm-commits
• [llvm] Reland [AMDGPU] Support block load/store for CSR #130013 (PR #137169)   Diana Picus via llvm-commits
• [llvm] [CMake] Fix the check for Windows vs ccache (PR #137238)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Introduce VPlanConstantFolder (PR #125365)   Ramkumar Ramachandra via llvm-commits
• [llvm] 194da37 - [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (#135768)   via llvm-commits
• [flang] [llvm] [flang] Use precompiled headers in Frontend, Lower, Parser, Semantics and Evaluate (PR #131137)   Kajetan Puchalski via llvm-commits
• [llvm] [Mips] Do not emit instruction teq if divisor is non-zero immediate value in FastISel implementation (PR #135768)   YunQiang Su via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Phoebe Wang via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Dmitry Vasilyev via llvm-commits
• [llvm] [AMDGPU] Replace dynamic VGPR feature with attribute (PR #133444)   Diana Picus via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Phoebe Wang via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Disable pauth and ldgm as unsupported instructions fixed (PR #136868)   Lakshay Kumar via llvm-commits
• [llvm] [InstCombine][DebugInfo] Update debug value uses in `freelyInvertAllUsersOf` (PR #137013)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [InstCombine][DebugInfo] Update debug value uses in `freelyInvertAllUsersOf` (PR #137013)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [InstCombine][DebugInfo] Update debug value uses in `freelyInvertAllUsersOf` (PR #137013)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [InstCombine][DebugInfo] Update debug value uses in `freelyInvertAllUsersOf` (PR #137013)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [InstCombine][DebugInfo] Update debug value uses in `freelyInvertAllUsersOf` (PR #137013)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [AMDGPU] Replace dynamic VGPR feature with attribute (PR #133444)   via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Disable pauth and ldgm as unsupported instructions fixed (PR #136868)   Lakshay Kumar via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Disable pauth and ldgm as unsupported instructions fixed (PR #136868)   Lakshay Kumar via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Phoebe Wang via llvm-commits
• [llvm] [SystemZ] Implement .machine (push|pop) directives (PR #137302)   Dominik Steenken via llvm-commits
• [llvm] [SystemZ] Implement .machine (push|pop) directives (PR #137302)   via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Disable pauth and ldgm as unsupported instructions fixed (PR #136868)   Abhilash Majumder via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Tim Gymnich via llvm-commits
• [compiler-rt] 0670675 - [TySan] Fix false positives with derived classes (#126260)   via llvm-commits
• [compiler-rt] [TySan] Fix false positives with derived classes (PR #126260)   via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Phoebe Wang via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Lane (NFC). (PR #137030)   Florian Hahn via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Phoebe Wang via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Lane (NFC). (PR #137030)   Florian Hahn via llvm-commits
• [llvm] a4d1a9d - [AMDGPU] Remove unused variables in SILowerSGPRSpills.cpp (NFC)   Jie Fu via llvm-commits
• [llvm] SelectionDAG: Support nofpclass with zero/pzero/nzero (PR #137305)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support nofpclass with zero/pzero/nzero (PR #137305)   via llvm-commits
• [llvm] [SystemZ] Implement .machine (push|pop) directives (PR #137302)   Dominik Steenken via llvm-commits
• [llvm] [SLP] Make getSameOpcode support interchangeable instructions. (PR #133888)   Mikael Holmén via llvm-commits
• [llvm] [GlobalISel] Add `combine` action for C++ combine rules (PR #135941)   Pierre van Houtryve via llvm-commits
• [llvm] c792b25 - [GlobalISel] Add `combine` action for C++ combine rules (#135941)   via llvm-commits
• [llvm] [GlobalISel] Add `combine` action for C++ combine rules (PR #135941)   Pierre van Houtryve via llvm-commits
• [llvm] [Coroutines] Create C++ noop coroutine with default function attributes (PR #134878)   Victor Campos via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kiran Chandramohan via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kiran Chandramohan via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kiran Chandramohan via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kiran Chandramohan via llvm-commits
• [llvm] [MIPS]Remove unnecessary SLL instructions on MIPS64el (PR #109386)   via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for parsing DWARF / CodeView SourceLanguage (PR #137223)   Javier Lopez-Gomez via llvm-commits
• [llvm] [X86][DAGCombiner][SelectionDAG] - Fold Zext Build Vector to Bitcast of widen Build Vector (PR #135010)   Rohit Aggarwal via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Disable pauth and ldgm as unsupported instructions fixed (PR #136868)   via llvm-commits
• [llvm] 96ec17d - [LLVM][InstCombine] Enable constant folding for SVE add,and,eor,fadd,fdiv,fsub,orr & sub intrinsics. (#136849)   via llvm-commits
• [llvm] [LLVM][InstCombine] Enable constant folding for SVE add,and,eor,fadd,fdiv,fsub,orr & sub intrinsics. (PR #136849)   Paul Walker via llvm-commits
• [llvm] SelectionDAG: Support nofpclass(nan/qnan/snan/nzero) in arguments (PR #130051)   YunQiang Su via llvm-commits
• [compiler-rt] [llvm] [TySan] Add option to outline instrumentation (PR #120582)   via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fix a couple of unhandled DWARF situations leading to a crash (PR #137221)   Javier Lopez-Gomez via llvm-commits
• [llvm] [SystemZ] Implement .machine (push|pop) directives (PR #137302)   Dominik Steenken via llvm-commits
• [llvm] RISC-V: Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)   YunQiang Su via llvm-commits
• [compiler-rt] [compiler-rt] [test] Look for the right file name suffix for arm targets (PR #137174)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_AT_byte_size and DW_TAG_module (PR #137228)   Javier Lopez-Gomez via llvm-commits
• [llvm] [RISCV] Select (add x, C) -> (sub x, -C) if -C cheaper to materialize (PR #137309)   Piotr Fusik via llvm-commits
• [llvm] [RISCV] Select (add x, C) -> (sub x, -C) if -C cheaper to materialize (PR #137309)   via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Lane (NFC). (PR #137030)   via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Lane (NFC). (PR #137030)   via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Lane (NFC). (PR #137030)   via llvm-commits
• [llvm] [Offload] Add check-offload-unit for liboffload unittests (PR #137312)   Callum Fare via llvm-commits
• [llvm] [Offload] Add check-offload-unit for liboffload unittests (PR #137312)   via llvm-commits
• [llvm] [Offload] Add check-offload-unit for liboffload unittests (PR #137312)   via llvm-commits
• [llvm] [InstCombine][DebugInfo] Update debug value uses in `freelyInvertAllUsersOf` (PR #137013)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Tim Gymnich via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Dmitry Vasilyev via llvm-commits
• [llvm] [Offload] Add check-offload-unit for liboffload unittests (PR #137312)   Callum Fare via llvm-commits
• [llvm] IR: Remove uselist for constantdata (PR #137313)   Matt Arsenault via llvm-commits
• [llvm] IR: Remove uselist for constantdata (PR #137313)   Matt Arsenault via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for parsing DWARF / CodeView SourceLanguage (PR #137223)   Javier Lopez-Gomez via llvm-commits
• [llvm] IR: Remove uselist for constantdata (PR #137313)   via llvm-commits
• [llvm] IR: Remove uselist for constantdata (PR #137313)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine][DebugInfo] Update debug value uses in `freelyInvertAllUsersOf` (PR #137013)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine][DebugInfo] Update debug value uses in `freelyInvertAllUsersOf` (PR #137013)   Yingwei Zheng via llvm-commits
• [llvm] [Offload] Adding missing Offload unit tests for event entry points (PR #137315)   Callum Fare via llvm-commits
• [llvm] [Offload] Adding missing Offload unit tests for event entry points (PR #137315)   via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Pierre van Houtryve via llvm-commits
• [compiler-rt] [compiler-rt] [test] Look for the right file name suffix for arm targets (PR #137174)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine][DebugInfo] Update debug value uses in `freelyInvertAllUsersOf` (PR #137013)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [InstCombine][DebugInfo] Update debug value uses in `freelyInvertAllUsersOf` (PR #137013)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [InstCombine][DebugInfo] Update debug value uses in `freelyInvertAllUsersOf` (PR #137013)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [AMDGPU] Replace dynamic VGPR feature with attribute (PR #133444)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SME] Split SMECallAttrs out of SMEAttrs (NFC) (PR #137239)   Benjamin Maxwell via llvm-commits
• [llvm] Reland [AMDGPU] Support block load/store for CSR #130013 (PR #137169)   LLVM Continuous Integration via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [llvm] [AMDGPU] Replace dynamic VGPR feature with attribute (PR #133444)   Matt Arsenault via llvm-commits
• [llvm] [X86] foldMemoryOperandCustom - attempt to load-fold with a VEXTRACTF128/I128 into a regular load (PR #137316)   Simon Pilgrim via llvm-commits
• [llvm] [X86] foldMemoryOperandCustom - attempt to load-fold with a VEXTRACTF128/I128 into a regular load (PR #137316)   via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SME] Split SMECallAttrs out of SMEAttrs (NFC) (PR #137239)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SVE] Generate asrd instruction for positive pow-2 divisors … (PR #137151)   Paul Walker via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Matt Arsenault via llvm-commits
• [llvm] Clarify ban evasion policy (PR #137298)   Aaron Ballman via llvm-commits
• [llvm] [CMake][NFC] Remove libc and compiler-rt from LLVM_ALL_PROJECTS to av… (PR #137317)   Wang Qiang via llvm-commits
• [llvm] [CMake][NFC] Remove libc and compiler-rt from LLVM_ALL_PROJECTS to av… (PR #137317)   Wang Qiang via llvm-commits
• [llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)   Matt Arsenault via llvm-commits
• [llvm] DAGCombiner: Support fmaximum/fminimum and fmaximumnum/fminimumnum (PR #137318)   YunQiang Su via llvm-commits
• [llvm] DAGCombiner: Support fmaximum/fminimum and fmaximumnum/fminimumnum (PR #137318)   via llvm-commits
• [llvm] [InstCombine] Combine and->cmp->sel->or-disjoint into and->mul (PR #135274)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Combine and->cmp->sel->or-disjoint into and->mul (PR #135274)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Combine and->cmp->sel->or-disjoint into and->mul (PR #135274)   Matt Arsenault via llvm-commits
• [llvm] DAGCombiner: Support fmaximum/fminimum and fmaximumnum/fminimumnum (PR #137318)   YunQiang Su via llvm-commits
• [clang] [llvm] [Clang][C++23] Core language changes from P1467R9 extended floating-point types and standard names. (PR #78503)   via llvm-commits
• [llvm] [LLVM][GlobalISel] Ensure G_{F}CONSTANT only store references to scalar Constant{Int,FP}. (PR #137319)   Paul Walker via llvm-commits
• [llvm] [LLVM][GlobalISel] Ensure G_{F}CONSTANT only store references to scalar Constant{Int,FP}. (PR #137319)   via llvm-commits
• [llvm] [AMDGPU] Replace dynamic VGPR feature with attribute (PR #133444)   Diana Picus via llvm-commits
• [llvm] [InstCombine][DebugInfo] Update debug value uses in `freelyInvertAllUsersOf` (PR #137013)   Yingwei Zheng via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   Matt Arsenault via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Replace dynamic VGPR feature with attribute (PR #133444)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Replace dynamic VGPR feature with attribute (PR #133444)   Diana Picus via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [llvm] [LLVM][GlobalISel] Ensure G_{F}CONSTANT only store references to scalar Constant{Int,FP}. (PR #137319)   Matt Arsenault via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Expand constant multiplication for targets without M extension (PR #137195)   Iris Shi via llvm-commits
• [llvm] [AMDGPU] Replace dynamic VGPR feature with attribute (PR #133444)   Diana Picus via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [llvm] [DA] do not handle array accesses of different offsets (PR #123436)   Sjoerd Meijer via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fix a couple of unhandled DWARF situations leading to a crash (PR #137221)   Javier Lopez-Gomez via llvm-commits
• [llvm] [AArch64][SVE] Generate asrd instruction for positive pow-2 divisors … (PR #137151)   Sushant Gokhale via llvm-commits
• [clang] [clang-tools-extra] [flang] [lldb] [llvm] [mlir] [openmp] [polly] [Documentation] Always use SVG for dot-generated doxygen images. (PR #136843)   via llvm-commits
• [llvm] [RISCV] Expand constant multiplication for targets without M extension (PR #137195)   Iris Shi via llvm-commits
• [llvm] [LLVM-C] Support debug info for enumerators of arbitrary sizes (PR #76735)   Nikita Popov via llvm-commits
• [llvm] [AArch64][SME] Allow spills of ZT0 around SME ABI routines again (PR #136726)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Allow spills of ZT0 around SME ABI routines again (PR #136726)   Sander de Smalen via llvm-commits
• [llvm] [RISCV] Expand constant multiplication for targets without M extension (PR #137195)   Iris Shi via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Simon Pilgrim via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Simon Pilgrim via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Simon Pilgrim via llvm-commits
• [llvm] [CodeGen] Expansion of scalable vector reductions (PR #129214)   David Green via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Pawan Nirpal via llvm-commits
• [llvm] [RISCV] Expand constant multiplication for targets without M extension (PR #137195)   via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Simon Pilgrim via llvm-commits
• [lld] [wasm-ld] Refactor WasmSym from static globals to per-link context (PR #134970)   Vassil Vassilev via llvm-commits
• [lld] [wasm-ld] Refactor WasmSym from static globals to per-link context (PR #134970)   Vassil Vassilev via llvm-commits
• [llvm] [VPlan] Manage noalias/alias_scope metadata in VPlan. (NFC) (PR #136450)   Florian Hahn via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Pawan Nirpal via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Disable pauth and ldgm as unsupported instructions fixed (PR #136868)   David Green via llvm-commits
• [llvm] [InstCombine] Preserve disjoint or after folding casted bitwise logic (PR #136815)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Pre-Commit Tests (PR #137322)   via llvm-commits
• [llvm] 8c7a2ce - [AArch64][SME] Allow spills of ZT0 around SME ABI routines again (#136726)   via llvm-commits
• [llvm] [AArch64][SME] Allow spills of ZT0 around SME ABI routines again (PR #136726)   Benjamin Maxwell via llvm-commits
• [llvm] [InstCombine] [X86] pblendvb intrinsics must be replaced by select when possible (PR #137322)   via llvm-commits
• [llvm] [InstCombine] [X86] pblendvb intrinsics must be replaced by select when possible (PR #137322)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Tim Gymnich via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Tim Gymnich via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Tim Gymnich via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Tim Gymnich via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Tim Gymnich via llvm-commits
• [llvm] [NFC][LLVM] Refactor MachineInstr operand accessors (PR #137261)   Rahul Joshi via llvm-commits
• [clang] [llvm] [clang][CodeGen][AA] Add `!llvm.errno.tbaa` gathering int-compatible TBAA nodes (PR #125258)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] [X86] pblendvb intrinsics must be replaced by select when possible (PR #137322)   via llvm-commits
• [llvm] [ms] [llvm-ml] Allow PTR casting of registers to their own size (PR #132751)   Eric Astor via llvm-commits
• [lld] [wasm-ld] Refactor WasmSym from static globals to per-link context (PR #134970)   Anutosh Bhat via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Evgenii Kudriashov via llvm-commits
• [llvm] [InstCombine] Support ptrtoint of gep folds for chain of geps (PR #137323)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] [X86] pblendvb intrinsics must be replaced by select when possible (PR #137322)   via llvm-commits
• [llvm] [InstCombine] Support ptrtoint of gep folds for chain of geps (PR #137323)   via llvm-commits
• [llvm] [InstCombine] Support ptrtoint of gep folds for chain of geps (PR #137323)   Nikita Popov via llvm-commits
• [llvm] [CGP] Despeculate ctlz/cttz with "illegal" integer types (PR #137197)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] [X86] pblendvb intrinsics must be replaced by select when possible (PR #137322)   via llvm-commits
• [llvm] [GlobalISel] Diagnose inline assembly constraint lowering errors (PR #135782)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Diagnose inline assembly constraint lowering errors (PR #135782)   Matt Arsenault via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Matt Arsenault via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Matt Arsenault via llvm-commits
• [llvm] Reland [AMDGPU] Support block load/store for CSR #130013 (PR #137169)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][SVE] Generate asrd instruction for positive pow-2 divisors … (PR #137151)   Sushant Gokhale via llvm-commits
• [llvm] [AArch64][SVE] Generate asrd instruction for positive pow-2 divisors … (PR #137151)   Sushant Gokhale via llvm-commits
• [llvm] [AArch64][SME] Split SMECallAttrs out of SMEAttrs (NFC) (PR #137239)   Benjamin Maxwell via llvm-commits
• [llvm] [AMDGPU] Replace dynamic VGPR feature with attribute (PR #133444)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SME] Split SMECallAttrs out of SMEAttrs (NFC) (PR #137239)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Split SMECallAttrs out of SMEAttrs (PR #137239)   Benjamin Maxwell via llvm-commits
• [llvm] AMDGPU: Use poison in some lowering contexts (PR #137325)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use poison in some lowering contexts (PR #137325)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use poison in some lowering contexts (PR #137325)   via llvm-commits
• [llvm] AMDGPU: Use poison in some lowering contexts (PR #137325)   Matt Arsenault via llvm-commits
• [llvm] [Offload] Add check-offload-unit for liboffload unittests (PR #137312)   Joseph Huber via llvm-commits
• [llvm] [Offload] Add check-offload-unit for liboffload unittests (PR #137312)   Joseph Huber via llvm-commits
• [llvm] IR: Remove uselist for constantdata (PR #137313)   Nikita Popov via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [llvm] AMDGPU: Use poison in some lowering contexts (PR #137325)   Shilei Tian via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [llvm] Reland "[SelectionDAG] Introducing a new ISD::POISON SDNode to represent the poison value in the IR." (PR #135056)   Martin Storsjö via llvm-commits
• [llvm] [AArch64][SME] Split SMECallAttrs out of SMEAttrs (PR #137239)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Split SMECallAttrs out of SMEAttrs (PR #137239)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Split SMECallAttrs out of SMEAttrs (PR #137239)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Split SMECallAttrs out of SMEAttrs (PR #137239)   via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Evgenii Kudriashov via llvm-commits
• [llvm] b3529ed - [IRMover] Remove unnecessary pointer bitcast (NFC)   Nikita Popov via llvm-commits
• [llvm] 715b1d5 - [NFC] Clarify the syntax of passes flag (#136175)   via llvm-commits
• [llvm] [NFC] Clarify the syntax of passes flag (PR #136175)   via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Matt Arsenault via llvm-commits
• [llvm] [SLP] Make getSameOpcode support interchangeable instructions. (PR #133888)   Alexey Bataev via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Jay Foad via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Jay Foad via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Jay Foad via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Jay Foad via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Element (NFC). (PR #137030)   Florian Hahn via llvm-commits
• [llvm] [MachineCopyPropagation] Recognise and delete no-op moves produced after forwarded uses (PR #129889)   Martin Storsjö via llvm-commits
• [llvm] [SystemZ] Add proper mcount handling (PR #135767)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Add proper mcount handling (PR #135767)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Add proper mcount handling (PR #135767)   Ulrich Weigand via llvm-commits
• [llvm] [RISCV] Widen i1 AnyOf reductions (PR #134898)   Philip Reames via llvm-commits
• [llvm] [SystemZ] Implement .machine (push|pop) directives (PR #137302)   Ulrich Weigand via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   Akash Dutta via llvm-commits
• [llvm] [Flang][LLVM] Remove leftover CMake for old flang handling (PR #137049)   Michael Kruse via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   Akash Dutta via llvm-commits
• [llvm] [IRMover] Remove Visited set in type mapping (NFC) (PR #137329)   Nikita Popov via llvm-commits
• [llvm] [Offload] Add check-offload-unit for liboffload unittests (PR #137312)   Callum Fare via llvm-commits
• [llvm] AMDGPU: Allow operand folding between loop body and its preheader (PR #137022)   Akash Dutta via llvm-commits
• [llvm] [IRMover] Remove Visited set in type mapping (NFC) (PR #137329)   via llvm-commits
• [llvm] [Offload] Add check-offload-unit for liboffload unittests (PR #137312)   Joseph Huber via llvm-commits
• [clang] [llvm] [AArch64] Add FEAT_FPAC to supported CPUs (PR #137330)   via llvm-commits
• [llvm] [LLVM][CodeGen][X86] Add ConstantInt/FP based vector support to MachineInstr fixup and printing code. (PR #137331)   Paul Walker via llvm-commits
• [clang] [llvm] [AArch64] Add FEAT_FPAC to supported CPUs (PR #137330)   via llvm-commits
• [llvm] [AArch64][SME] Split SMECallAttrs out of SMEAttrs (PR #137239)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Split SMECallAttrs out of SMEAttrs (PR #137239)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Split SMECallAttrs out of SMEAttrs (PR #137239)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Split SMECallAttrs out of SMEAttrs (PR #137239)   Sander de Smalen via llvm-commits
• [llvm] [LLVM][CodeGen][X86] Add ConstantInt/FP based vector support to MachineInstr fixup and printing code. (PR #137331)   via llvm-commits
• [llvm] [CGP] Despeculate ctlz/cttz with "illegal" integer types (PR #137197)   Sergei Barannikov via llvm-commits
• [llvm] 1ff931e - [X86][NFC] Add sitofp and fptosi tests for x87 mode (#136860)   via llvm-commits
• [llvm] [X86][NFC] - Add sitofp and fptosi tests for x87 mode (PR #136860)   Evgenii Kudriashov via llvm-commits
• [llvm] [RISCV] Remove `AND` mask generated by `( zext ( atomic_load ) )` by replacing the load with `zextload` for orderings not stronger then monotonic. (PR #136502)   Jan Górski via llvm-commits
• [llvm] [X86] foldMemoryOperandCustom - attempt to load-fold with a VEXTRACTF128/I128 into a regular load (PR #137316)   Phoebe Wang via llvm-commits
• [llvm] [MachineCopyPropagation] Recognise and delete no-op moves produced after forwarded uses (PR #129889)   Martin Storsjö via llvm-commits
• [llvm] [NFC][LLVM] Refactor MachineInstr operand accessors (PR #137261)   Rahul Joshi via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Tom Eccles via llvm-commits
• [llvm] [NFC][LLVM] Refactor MachineInstr operand accessors (PR #137261)   Rahul Joshi via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Tom Eccles via llvm-commits
• [llvm] [NFC][LLVM] Refactor MachineInstr operand accessors (PR #137261)   Rahul Joshi via llvm-commits
• [llvm] [InstCombine] [X86] pblendvb intrinsics must be replaced by select when possible (PR #137322)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] [X86] pblendvb intrinsics must be replaced by select when possible (PR #137322)   Simon Pilgrim via llvm-commits
• [llvm] [CGP] Despeculate ctlz/cttz with "illegal" integer types (PR #137197)   Sergei Barannikov via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Nathan Chancellor via llvm-commits
• [llvm] [NFC][LLVM] Refactor MachineInstr operand accessors (PR #137261)   Sergei Barannikov via llvm-commits
• [llvm] [X86] foldMemoryOperandCustom - attempt to load-fold with a VEXTRACTF128/I128 into a regular load (PR #137316)   Simon Pilgrim via llvm-commits
• [llvm] AMDGPU: Use poison in some lowering contexts (PR #137325)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Tim Gymnich via llvm-commits
• [llvm] ee2aba7 - AMDGPU: Use poison in some lowering contexts (#137325)   via llvm-commits
• [llvm] AMDGPU: Use poison in some lowering contexts (PR #137325)   Matt Arsenault via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   Matt Arsenault via llvm-commits
• [llvm] c39cc9f - [LV] Add tests for maximumnum/minimumnum reductions.   Florian Hahn via llvm-commits
• [llvm] [X86] foldMemoryOperandCustom - attempt to load-fold with a VEXTRACTF128/I128 into a regular load (PR #137316)   Simon Pilgrim via llvm-commits
• [llvm] [ms] [llvm-ml] Allow PTR casting of registers to their own size (PR #132751)   Phoebe Wang via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Tim Gymnich via llvm-commits
• [llvm] 9f94e36 - [X86] vector-shuffle-combining-ssse3.ll - add tests showing the failure to merge logical shifts with non-uniform shift amounts into shuffles   Simon Pilgrim via llvm-commits
• [llvm] [IVDescriptors] Don't require nsz/nnan for (min|max)num. (PR #137003)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Element (NFC). (PR #137030)   Florian Hahn via llvm-commits
• [libcxx] [llvm] Add C++23 stacktrace (P0881R7) (PR #136528)   via llvm-commits
• [llvm] LowerMatrixIntrinsics: Use use_empty instead of hasNUses(0) (PR #137334)   Matt Arsenault via llvm-commits
• [llvm] LowerMatrixIntrinsics: Use use_empty instead of hasNUses(0) (PR #137334)   Matt Arsenault via llvm-commits
• [llvm] [IVDescriptors] Support reductions with minimumnum/maximumnum. (PR #137335)   Florian Hahn via llvm-commits
• [llvm] LowerMatrixIntrinsics: Use use_empty instead of hasNUses(0) (PR #137334)   Matt Arsenault via llvm-commits
• [lld] [LLD][COFF] add __{data,bss}_{start,end}__ symbols for Cygwin support (PR #136180)   Martin Storsjö via llvm-commits
• [llvm] [IVDescriptors] Support reductions with minimumnum/maximumnum. (PR #137335)   via llvm-commits
• [llvm] [IVDescriptors] Support reductions with minimumnum/maximumnum. (PR #137335)   via llvm-commits
• [llvm] LowerMatrixIntrinsics: Use use_empty instead of hasNUses(0) (PR #137334)   via llvm-commits
• [llvm] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] SLPVectorizer: Use use_empty instead of hasNUses(0) (PR #137336)   Matt Arsenault via llvm-commits
• [llvm] [IVDescriptors] Support reductions with minimumnum/maximumnum. (PR #137335)   via llvm-commits
• [llvm] SLPVectorizer: Use use_empty instead of hasNUses(0) (PR #137336)   Matt Arsenault via llvm-commits
• [llvm] SLPVectorizer: Use use_empty instead of hasNUses(0) (PR #137336)   Matt Arsenault via llvm-commits
• [llvm] ARM: Use use_empty instead of hasNUses(0) (PR #137337)   Matt Arsenault via llvm-commits
• [llvm] ARM: Use use_empty instead of hasNUses(0) (PR #137337)   Matt Arsenault via llvm-commits
• [llvm] SLPVectorizer: Use use_empty instead of hasNUses(0) (PR #137336)   via llvm-commits
• [llvm] ARM: Use use_empty instead of hasNUses(0) (PR #137337)   Matt Arsenault via llvm-commits
• [llvm] ARM: Use use_empty instead of hasNUses(0) (PR #137337)   via llvm-commits
• [llvm] [Flang][LLVM] Remove leftover CMake for old flang handling (PR #137049)   Joseph Huber via llvm-commits
• [llvm] LowerMatrixIntrinsics: Use use_empty instead of hasNUses(0) (PR #137334)   Florian Hahn via llvm-commits
• [llvm] [NFC][LLVM] Refactor MachineInstr operand accessors (PR #137261)   Rahul Joshi via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Element (NFC). (PR #137030)   Florian Hahn via llvm-commits
• [llvm] [NFC][LLVM] Refactor MachineInstr operand accessors (PR #137261)   Rahul Joshi via llvm-commits
• [llvm] [polly] IR: Remove uselist for constantdata (PR #137313)   Matt Arsenault via llvm-commits
• [llvm] [X86] foldMemoryOperandCustom - attempt to load-fold with a VEXTRACTF128/I128 into a regular load (PR #137316)   Phoebe Wang via llvm-commits
• [lldb] [llvm] [lldb] Prefer `DW_AT_bit_size` over `DW_AT_byte_size` in `GetDIEBitSizeAndSign` (PR #137123)   Tom Tromey via llvm-commits
• [llvm] [LLVM][CodeGen][X86] Add ConstantInt/FP based vector support to MachineInstr fixup and printing code. (PR #137331)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][CodeGen][X86] Add ConstantInt/FP based vector support to MachineInstr fixup and printing code. (PR #137331)   Matt Arsenault via llvm-commits
• [llvm] [MachineCopyPropagation] Recognise and delete no-op moves produced after forwarded uses (PR #129889)   David Green via llvm-commits
• [llvm] [AMDGPU] Support alloca in AS0 (PR #136584)   Shilei Tian via llvm-commits
• [llvm] [AArch64][SME] Split SMECallAttrs out of SMEAttrs (PR #137239)   Benjamin Maxwell via llvm-commits
• [llvm] [offload][SYCL] Add SYCL Module splitting. (PR #131347)   Maksim Sabianin via llvm-commits
• [llvm] [Offload] Ensure all `llvm::Error`s are handled (PR #137339)   Ross Brunton via llvm-commits
• [llvm] [Offload] Ensure all `llvm::Error`s are handled (PR #137339)   via llvm-commits
• [llvm] [ms] [llvm-ml] Allow PTR casting of registers to their own size (PR #132751)   Eric Astor via llvm-commits
• [llvm] SLPVectorizer: Use use_empty instead of hasNUses(0) (PR #137336)   Alexey Bataev via llvm-commits
• [llvm] [MachineCopyPropagation] Recognise and delete no-op moves produced after forwarded uses (PR #129889)   Martin Storsjö via llvm-commits
• [llvm] [Offload] Ensure all `llvm::Error`s are handled (PR #137339)   via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_AT_byte_size and DW_TAG_module (PR #137228)   Javier Lopez-Gomez via llvm-commits
• [llvm] [AArch64][SME] Split SMECallAttrs out of SMEAttrs (PR #137239)   Benjamin Maxwell via llvm-commits
• [llvm] [Offload] Ensure all `llvm::Error`s are handled (PR #137339)   Ross Brunton via llvm-commits
• [llvm] [Offload] Ensure all `llvm::Error`s are handled (PR #137339)   Ross Brunton via llvm-commits
• [llvm] [Offload] Ensure all `llvm::Error`s are handled (PR #137339)   Joseph Huber via llvm-commits
• [llvm] [Offload] Ensure all `llvm::Error`s are handled (PR #137339)   Joseph Huber via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [clang] [llvm] Add support for flag output operand "=@cc" for SystemZ. (PR #125970)   Ulrich Weigand via llvm-commits
• [llvm] [Offload] Ensure all `llvm::Error`s are handled (PR #137339)   Joseph Huber via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] [LLVM][Reassociate] Extend ConvertShiftToMul to allow for ConstantInt vectors. (PR #137340)   Paul Walker via llvm-commits
• [llvm] ARM: Use use_empty instead of hasNUses(0) (PR #137337)   Tim Gymnich via llvm-commits
• [llvm] [LLVM][Reassociate] Extend ConvertShiftToMul to allow for ConstantInt vectors. (PR #137340)   via llvm-commits
• [lld] [lld][ICF] Prevent merging two sections when they point to non-globals (PR #136641)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Philip Reames via llvm-commits
• [lld] 9cbbb74 - [wasm-ld] Refactor WasmSym from static globals to per-link context (#134970)   via llvm-commits
• [lld] [wasm-ld] Refactor WasmSym from static globals to per-link context (PR #134970)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Philip Reames via llvm-commits
• [llvm] [LLVM][CodeGen][X86] Add ConstantInt/FP based vector support to MachineInstr fixup and printing code. (PR #137331)   Paul Walker via llvm-commits
• [lld] [lld] NFC. Rename function to better reflect its implementation (PR #136625)   Fangrui Song via llvm-commits
• [llvm] [Offload] Ensure all `llvm::Error`s are handled (PR #137339)   Callum Fare via llvm-commits
• [llvm] AMDGPU: Use poison in some lowering contexts (PR #137325)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   Florian Hahn via llvm-commits
• [llvm] [Offload] Ensure all `llvm::Error`s are handled (PR #137339)   Ross Brunton via llvm-commits
• [llvm] [Offload] Ensure all `llvm::Error`s are handled (PR #137339)   Ross Brunton via llvm-commits
• [llvm] [mlir] [mlir][gpu] Change GPU modules to globals (PR #135478)   Fabian Mora via llvm-commits
• [llvm] [AArch64][SVE] Generate asrd instruction for positive pow-2 divisors … (PR #137151)   Paul Walker via llvm-commits
• [llvm] [Offload] Ensure all `llvm::Error`s are handled (PR #137339)   Ross Brunton via llvm-commits
• [llvm] [AArch64][SVE] Generate asrd instruction for positive pow-2 divisors … (PR #137151)   Paul Walker via llvm-commits
• [llvm] [AArch64][SVE] Generate asrd instruction for positive pow-2 divisors … (PR #137151)   Paul Walker via llvm-commits
• [llvm] llvm-reduce: Add values to return reduction (PR #132686)   Matt Arsenault via llvm-commits
• [llvm] [SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (PR #101786)   Sergei Barannikov via llvm-commits
• [llvm] [ms] [llvm-ml] Allow PTR casting of registers to their own size (PR #132751)   Fangrui Song via llvm-commits
• [llvm] [ms] [llvm-ml] Allow PTR casting of registers to their own size (PR #132751)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for SpacemiT-X60 (PR #137343)   Mikhail R. Gadelha via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for SpacemiT-X60 (PR #137343)   via llvm-commits
• [llvm] [IVDescriptors] Don't require nsz/nnan for (min|max)num. (PR #137003)   Matt Arsenault via llvm-commits
• [llvm] [ms] [llvm-ml] Allow PTR casting of registers to their own size (PR #132751)   Eric Astor via llvm-commits
• [llvm] [RISCV] Expand constant multiplication for targets without M extension (PR #137195)   Iris Shi via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Nikita Popov via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Philip Reames via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Nikita Popov via llvm-commits
• [llvm] 9062a38 - [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (#136708)   via llvm-commits
• [llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)   Philip Reames via llvm-commits
• [llvm] [IVDescriptors] Don't require nsz/nnan for (min|max)num. (PR #137003)   Matt Arsenault via llvm-commits
• [llvm] [NFC][LLVM] Refactor MachineInstr operand accessors (PR #137261)   Sergei Barannikov via llvm-commits
• [llvm] [NFC][LLVM] Refactor MachineInstr operand accessors (PR #137261)   Sergei Barannikov via llvm-commits
• [llvm] Clarify ban evasion policy (PR #137298)   Stella Stamenova via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Matt Arsenault via llvm-commits
• [llvm] [MachineLICM] Recognize registers clobbered at EH landing pad entry (PR #122446)   Ulrich Weigand via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Nikita Popov via llvm-commits
• [llvm] [MachineLICM] Recognize registers clobbered at EH landing pad entry (PR #122446)   Matt Arsenault via llvm-commits
• [llvm] [MachineLICM] Recognize registers clobbered at EH landing pad entry (PR #122446)   Matt Arsenault via llvm-commits
• [llvm] [MachineLICM] Recognize registers clobbered at EH landing pad entry (PR #122446)   Matt Arsenault via llvm-commits
• [llvm] [InstrRef] Preserve debug instr num in aarch64-ldst-opt. (PR #136009)   Jeremy Morse via llvm-commits
• [llvm] [InstrRef] Preserve debug instr num in aarch64-ldst-opt. (PR #136009)   Jeremy Morse via llvm-commits
• [llvm] [InstrRef] Preserve debug instr num in aarch64-ldst-opt. (PR #136009)   Jeremy Morse via llvm-commits
• [llvm] [InstrRef] Preserve debug instr num in aarch64-ldst-opt. (PR #136009)   Jeremy Morse via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Matt Arsenault via llvm-commits
• [llvm] [X86] foldMemoryOperandCustom - attempt to load-fold with a VEXTRACTF128/I128 into a regular load (PR #137316)   Simon Pilgrim via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   David Spickett via llvm-commits
• [llvm] [NFC][LLVM] Refactor MachineInstr operand accessors (PR #137261)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM] Refactor MachineInstr operand accessors (PR #137261)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM] Refactor MachineInstr operand accessors (PR #137261)   Rahul Joshi via llvm-commits
• [llvm] [Offload] Override linker for device build (PR #137246)   Jan Patrick Lehr via llvm-commits
• [llvm] c6915cd - [IRMover] Remove Visited set in type mapping (NFC) (#137329)   via llvm-commits
• [llvm] [IRMover] Remove Visited set in type mapping (NFC) (PR #137329)   Nikita Popov via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Matt Arsenault via llvm-commits
• [llvm] LowerMatrixIntrinsics: Use use_empty instead of hasNUses(0) (PR #137334)   Matt Arsenault via llvm-commits
• [llvm] bdc523f - LowerMatrixIntrinsics: Use use_empty instead of hasNUses(0) (#137334)   via llvm-commits
• [llvm] [IR] Relax convergence requirements on call (PR #135794)   Matt Arsenault via llvm-commits
• [llvm] LowerMatrixIntrinsics: Use use_empty instead of hasNUses(0) (PR #137334)   Matt Arsenault via llvm-commits
• [llvm] [Offload] Override linker for device build (PR #137246)   Sylvestre Ledru via llvm-commits
• [llvm] ARM: Use use_empty instead of hasNUses(0) (PR #137337)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] [X86] pblendvb intrinsics must be replaced by select when possible (PR #137322)   via llvm-commits
• [llvm] SLPVectorizer: Use use_empty instead of hasNUses(0) (PR #137336)   Matt Arsenault via llvm-commits
• [llvm] ARM: Use use_empty instead of hasNUses(0) (PR #137337)   Matt Arsenault via llvm-commits
• [llvm] 4ea2278 - SLPVectorizer: Use use_empty instead of hasNUses(0) (#137336)   via llvm-commits
• [llvm] SLPVectorizer: Use use_empty instead of hasNUses(0) (PR #137336)   Matt Arsenault via llvm-commits
• [llvm] [NFC][LLVM] Refactor MachineInstr operand accessors (PR #137261)   Sergei Barannikov via llvm-commits
• [llvm] df21288 - [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Element (NFC). (#137030)   via llvm-commits
• [llvm] [VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Element (NFC). (PR #137030)   Florian Hahn via llvm-commits
• [llvm] ARM: Use use_empty instead of hasNUses(0) (PR #137337)   Matt Arsenault via llvm-commits
• [llvm] Use isa instead of !dyn_cast (PR #137344)   Matt Arsenault via llvm-commits
• [llvm] Use isa instead of !dyn_cast (PR #137344)   Matt Arsenault via llvm-commits
• [llvm] Use isa instead of !dyn_cast (PR #137344)   Matt Arsenault via llvm-commits
• [llvm] Use isa instead of !dyn_cast (PR #137344)   via llvm-commits
• [llvm] BypassSlowDivision: Use use_empty instead of hasNUses(0) (PR #137345)   Matt Arsenault via llvm-commits
• [llvm] BypassSlowDivision: Use use_empty instead of hasNUses(0) (PR #137345)   Matt Arsenault via llvm-commits
• [llvm] BypassSlowDivision: Use use_empty instead of hasNUses(0) (PR #137345)   Matt Arsenault via llvm-commits
• [llvm] SimplifyIndVar: Use use_empty instead of hasNUses(0) (PR #137346)   Matt Arsenault via llvm-commits
• [llvm] BypassSlowDivision: Use use_empty instead of hasNUses(0) (PR #137345)   via llvm-commits
• [llvm] SimplifyIndVar: Use use_empty instead of hasNUses(0) (PR #137346)   Matt Arsenault via llvm-commits
• [llvm] SimplifyIndVar: Use use_empty instead of hasNUses(0) (PR #137346)   Matt Arsenault via llvm-commits
• [llvm] 50a767a - ARM: Use use_empty instead of hasNUses(0) (#137337)   via llvm-commits
• [llvm] ARM: Use use_empty instead of hasNUses(0) (PR #137337)   Matt Arsenault via llvm-commits
• [llvm] ARM: Remove unnecessary use_empty check (PR #137338)   Matt Arsenault via llvm-commits
• [llvm] SimplifyIndVar: Use use_empty instead of hasNUses(0) (PR #137346)   via llvm-commits
• [llvm] InlineFunction: Use use_empty instead of hasNUses(0) (PR #137347)   Matt Arsenault via llvm-commits
• [llvm] ARM: Remove unnecessary use_empty check (PR #137338)   Matt Arsenault via llvm-commits
• [llvm] InlineFunction: Use use_empty instead of hasNUses(0) (PR #137347)   Matt Arsenault via llvm-commits
• [llvm] InlineFunction: Use use_empty instead of hasNUses(0) (PR #137347)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Correctly detect X reg from w reg in isCopyImpl (PR #137348)   David Green via llvm-commits
• [llvm] InlineFunction: Use use_empty instead of hasNUses(0) (PR #137347)   via llvm-commits
• [llvm] [InstCombine] Combine and->cmp->sel->or-disjoint into and->mul (PR #135274)   Jeffrey Byrnes via llvm-commits
• [llvm] [InstCombine] Combine and->cmp->sel->or-disjoint into and->mul (PR #135274)   Jeffrey Byrnes via llvm-commits
• [llvm] [AArch64] Correctly detect X reg from w reg in isCopyImpl (PR #137348)   via llvm-commits
• [llvm] [SLP] Simplify buildTree() and callees (NFC) (PR #135766)   Gaëtan Bossu via llvm-commits
• [llvm] [MachineCopyPropagation] Recognise and delete no-op moves produced after forwarded uses (PR #129889)   David Green via llvm-commits
• [llvm] [CMake] Fix the check for Windows vs ccache (PR #137238)   LLVM Continuous Integration via llvm-commits
• [llvm] 6b3289f - ARM: Remove unnecessary use_empty check (#137338)   via llvm-commits
• [llvm] ARM: Remove unnecessary use_empty check (PR #137338)   Matt Arsenault via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   Brad King via llvm-commits
• [llvm] [MachineLICM] Recognize registers clobbered at EH landing pad entry (PR #122446)   Ulrich Weigand via llvm-commits
• [llvm] [MachineLICM] Recognize registers clobbered at EH landing pad entry (PR #122446)   Ulrich Weigand via llvm-commits
• [llvm] [X86] getFauxShuffleMask - generalise logical shifts to work with non-uniform shift amounts (PR #137349)   Simon Pilgrim via llvm-commits
• [llvm] LowerMatrixIntrinsics: Use use_empty instead of hasNUses(0) (PR #137334)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] getFauxShuffleMask - generalise logical shifts to work with non-uniform shift amounts (PR #137349)   via llvm-commits
• [lld] [lld][ICF] Prevent merging two sections when they point to non-globals (PR #136641)   Peter Smith via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [llvm] [LLVM][InstCombine] Enable constant folding for SVE asr,lsl and lsr intrinsics. (PR #137350)   Paul Walker via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   Aiden Grossman via llvm-commits
• [llvm] [LLVM][InstCombine] Enable constant folding for SVE asr,lsl and lsr intrinsics. (PR #137350)   via llvm-commits
• [llvm] [LLVM][InstCombine] Enable constant folding for SVE asr,lsl and lsr intrinsics. (PR #137350)   via llvm-commits
• [llvm] [CodeGen] Expansion of scalable vector reductions (PR #129214)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SVE] Generate asrd instruction for positive pow-2 divisors … (PR #137151)   Sushant Gokhale via llvm-commits
• [llvm] [AArch64] Correctly detect X reg from w reg in isCopyImpl (PR #137348)   Oliver Stannard via llvm-commits
• [llvm] [AArch64][SVE] Generate asrd instruction for positive pow-2 divisors … (PR #137151)   Sushant Gokhale via llvm-commits
• [llvm] [LLVM][CodeGen][X86] Add ConstantInt/FP based vector support to MachineInstr fixup and printing code. (PR #137331)   Simon Pilgrim via llvm-commits
• [llvm] llvm-reduce: Add values to return reduction (PR #132686)   Matt Arsenault via llvm-commits
• [llvm] llvm-reduce: Add values to return reduction (PR #132686)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][CodeGen][X86] Add ConstantInt/FP based vector support to MachineInstr fixup and printing code. (PR #137331)   Matt Arsenault via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Johannes Doerfert via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] [NFC][LLVM] Refactor MachineInstr operand accessors (PR #137261)   Rahul Joshi via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] [LLVM][CodeGen][X86] Add ConstantInt/FP based vector support to MachineInstr fixup and printing code. (PR #137331)   Paul Walker via llvm-commits
• [llvm] Reland [AMDGPU] Support block load/store for CSR #130013 (PR #137169)   LLVM Continuous Integration via llvm-commits
• [llvm] [LSV] Insert casts to vectorize mismatched types (PR #134436)   Anshil Gandhi via llvm-commits
• [llvm] [IVDescriptors] Don't require nsz/nnan for (min|max)num. (PR #137003)   David Green via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] [LSV] Insert casts to vectorize mismatched types (PR #134436)   Anshil Gandhi via llvm-commits
• [llvm] [LLVM][CodeGen][X86] Add ConstantInt/FP based vector support to MachineInstr fixup and printing code. (PR #137331)   Paul Walker via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Nikita Popov via llvm-commits
• [llvm] [LLVM][CodeGen][X86] Add ConstantInt/FP based vector support to MachineInstr fixup and printing code. (PR #137331)   Paul Walker via llvm-commits
• [llvm] AMDGPU: Use poison in some lowering contexts (PR #137325)   LLVM Continuous Integration via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] [LLVM-C] Support debug info for enumerators of arbitrary sizes (PR #76735)   Quinton Miller via llvm-commits
• [llvm] [NFC][LLVM] Refactor MachineInstr operand accessors (PR #137261)   Rahul Joshi via llvm-commits
• [llvm] [HLSL][NFC] Rename getBindingMap to getResourceMap (PR #137256)   Justin Bogner via llvm-commits
• [llvm] [LSV] Insert casts to vectorize mismatched types (PR #134436)   Anshil Gandhi via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] 5dc2d66 - [SelectionDAG][Targets] Replace atomic_load_8/atomic_load_16 with atomic_load_*ext_8/atomic_load_*ext_16 where possible. (#137279)   via llvm-commits
• [llvm] [SelectionDAG][Targets] Replace atomic_load_8/atomic_load_16 with atomic_load_*ext_8/atomic_load_*ext_16 where possible. (PR #137279)   Craig Topper via llvm-commits
• [llvm] [LSV] Insert casts to vectorize mismatched types (PR #134436)   Anshil Gandhi via llvm-commits
• [llvm] [CodeGen] Expansion of scalable vector reductions (PR #129214)   David Green via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Disable pauth and ldgm as unsupported instructions fixed (PR #136868)   Aiden Grossman via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Shengchen Kan via llvm-commits
• [llvm] [MachineLICM] Recognize registers clobbered at EH landing pad entry (PR #122446)   Sergei Barannikov via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for SpacemiT-X60 (PR #137343)   Craig Topper via llvm-commits
• [llvm] [IVDescriptors] Don't require nsz/nnan for (min|max)num. (PR #137003)   Florian Hahn via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [compiler-rt] [compiler-rt] Make sure __clzdi2 doesn't call itself recursively on sparc64 (PR #136737)   via llvm-commits
• [llvm] [IVDescriptors] Don't require nsz/nnan for (min|max)num. (PR #137003)   Florian Hahn via llvm-commits
• [llvm] [MachineLICM] Recognize registers clobbered at EH landing pad entry (PR #122446)   Sergei Barannikov via llvm-commits
• [llvm] [MachineLICM] Recognize registers clobbered at EH landing pad entry (PR #122446)   Sergei Barannikov via llvm-commits
• [llvm] [MachineLICM] Recognize registers clobbered at EH landing pad entry (PR #122446)   Sergei Barannikov via llvm-commits
• [llvm] [MachineLICM] Recognize registers clobbered at EH landing pad entry (PR #122446)   Sergei Barannikov via llvm-commits
• [llvm] [RISCV] Remove `AND` mask generated by `( zext ( atomic_load ) )` by replacing the load with `zextload` for orderings not stronger then monotonic. (PR #136502)   Craig Topper via llvm-commits
• [llvm] [NFC][Sink] Change dynamic checks to asserts (PR #137354)   via llvm-commits
• [llvm] [NFC][Sink] Change runtime checks to asserts (PR #137354)   via llvm-commits
• [llvm] [NFC][Sink] Change runtime checks to asserts (PR #137354)   via llvm-commits
• [llvm] [NFC][Sink] Change runtime checks to asserts (PR #137354)   via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] bd4a7aa - [Offload] Deprecate `openmp` and `offload` projects builds (#136314)   via llvm-commits
• [llvm] [Offload] Deprecate `openmp` and `offload` projects builds (PR #136314)   Joseph Huber via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for SpacemiT-X60 (PR #137343)   Alex Bradbury via llvm-commits
• [compiler-rt] [compiler-rt] Make sure __clzdi2 doesn't call itself recursively on sparc64 (PR #136737)   Sergei Barannikov via llvm-commits
• [compiler-rt] [compiler-rt] Make sure __clzdi2 doesn't call itself recursively on sparc64 (PR #136737)   Sergei Barannikov via llvm-commits
• [llvm] [Offload] Ensure all `llvm::Error`s are handled (PR #137339)   Joseph Huber via llvm-commits
• [llvm] [OpenMP] Replace most GPU helpers with ones from <gpuintrin.h> (PR #125771)   Joseph Huber via llvm-commits
• [clang] [llvm] [OpenMP] Do not emit default thread limits of 128 (PR #87558)   Joseph Huber via llvm-commits
• [llvm] [IVDescriptors] Don't require nsz/nnan for (min|max)num. (PR #137003)   David Green via llvm-commits
• [llvm] [NFC][Sink] Change runtime checks to asserts (PR #137354)   Shilei Tian via llvm-commits
• [llvm] [IVDescriptors] Don't require nsz/nnan for (min|max)num. (PR #137003)   David Green via llvm-commits
• [llvm] Clarify ban evasion policy (PR #137298)   Jonas Devlieghere via llvm-commits
• [llvm] [LLVM] Automatically strip `-fno-lifetime-dse` from compile_commands.json (PR #124623)   Joseph Huber via llvm-commits
• [llvm] [NVPTX] Fix failing tests on incompatible PTX version (PR #111988)   Joseph Huber via llvm-commits
• [llvm] [CodeGen] Use `TRI->regunits()` (NFC) (PR #137356)   Sergei Barannikov via llvm-commits
• [llvm] [CodeGen] Use `TRI::regunits()` (NFC) (PR #137356)   Sergei Barannikov via llvm-commits
• [llvm] [ARM] Fix printing of 'pop' alias. (PR #67181)   via llvm-commits
• [llvm] [ARM] Fix printing of 'pop' alias. (PR #67181)   via llvm-commits
• [llvm] [Offload] Ensure all `llvm::Error`s are handled (PR #137339)   Ross Brunton via llvm-commits
• [llvm] [ARM] Add writeback information to STC and LDC instructions. (PR #67180)   via llvm-commits
• [llvm] [ARM] Add writeback information to STC and LDC instructions. (PR #67180)   via llvm-commits
• [llvm] [CodeGen] Use `TRI::regunits()` (NFC) (PR #137356)   via llvm-commits
• [llvm] [RISCV] Select (add x, C) -> (sub x, -C) if -C cheaper to materialize (PR #137309)   Craig Topper via llvm-commits
• [llvm] [IR] Require that global value initializers are sized (PR #137358)   Nikita Popov via llvm-commits
• [llvm] [IR] Require that global value initializers are sized (PR #137358)   via llvm-commits
• [llvm] [IR] Require that global value initializers are sized (PR #137358)   via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Disable pauth and ldgm as unsupported instructions fixed (PR #136868)   Lakshay Kumar via llvm-commits
• [llvm] [IR] Require that global value initializers are sized (PR #137358)   via llvm-commits
• [llvm] [CodeGen] Use `TRI::regunits()` (NFC) (PR #137356)   Matt Arsenault via llvm-commits
• [llvm] InlineFunction: Use use_empty instead of hasNUses(0) (PR #137347)   Nikita Popov via llvm-commits
• [llvm] SimplifyIndVar: Use use_empty instead of hasNUses(0) (PR #137346)   Nikita Popov via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Akhilesh Moorthy via llvm-commits
• [llvm] [RISCV] Select (add x, C) -> (sub x, -C) if -C cheaper to materialize (PR #137309)   Piotr Fusik via llvm-commits
• [llvm] [LV][LAA][NFC]Add a test with non-power-of-2 store-load forward distance, NFC (PR #136710)   Alexey Bataev via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for SpacemiT-X60 (PR #137343)   Mikhail R. Gadelha via llvm-commits
• [llvm] [SelectionDAG][Targets] Replace atomic_load_8/atomic_load_16 with atomic_load_*ext_8/atomic_load_*ext_16 where possible. (PR #137279)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][Sink] Change runtime checks to asserts (PR #137354)   Nikita Popov via llvm-commits
• [llvm] [NFC][Sink] Change runtime checks to asserts (PR #137354)   Nikita Popov via llvm-commits
• [llvm] [NFC][Sink] Change runtime checks to asserts (PR #137354)   Nikita Popov via llvm-commits
• [llvm] [NFC][LLVM][MI] Refactor MI Printer code. (PR #137361)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM][MI] Refactor MI Printer (PR #137361)   Rahul Joshi via llvm-commits
• [llvm] [AMDGPU][Scheduler] Refactor ArchVGPR rematerialization during scheduling (PR #125885)   Jeffrey Byrnes via llvm-commits
• [llvm] [NFC][LLVM][MI] Refactor MI Printer (PR #137361)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM][MI] Refactor MI Printer (PR #137361)   Rahul Joshi via llvm-commits
• [llvm] [AMDGPU][Scheduler] Refactor ArchVGPR rematerialization during scheduling (PR #125885)   Jeffrey Byrnes via llvm-commits
• [llvm] cf766f5 - InlineFunction: Use use_empty instead of hasNUses(0) (#137347)   via llvm-commits
• [llvm] InlineFunction: Use use_empty instead of hasNUses(0) (PR #137347)   Matt Arsenault via llvm-commits
• [llvm] a214084 - BypassSlowDivision: Use use_empty instead of hasNUses(0) (#137345)   via llvm-commits
• [llvm] BypassSlowDivision: Use use_empty instead of hasNUses(0) (PR #137345)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for SpacemiT-X60 (PR #137343)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for SpacemiT-X60 (PR #137343)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for SpacemiT-X60 (PR #137343)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for SpacemiT-X60 (PR #137343)   Philip Reames via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] [SLP] Simplify buildTree() and callees (NFC) (PR #135766)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Simplify buildTree() and callees (NFC) (PR #135766)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Simplify buildTree() and callees (NFC) (PR #135766)   Alexey Bataev via llvm-commits
• [llvm] [AMDGPU] Fix undefined scc register in successor block of SI_KILL terminators (PR #134718)   via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Min-Yih Hsu via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   YunQiang Su via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Scheduler] Refactor ArchVGPR rematerialization during scheduling (PR #125885)   Jeffrey Byrnes via llvm-commits
• [llvm] [RISCV] Remove `AND` mask generated by `( zext ( atomic_load ) )` by replacing the load with `zextload` for orderings not stronger then monotonic. (PR #136502)   Jan Górski via llvm-commits
• [llvm] [Arch64][SVE] Lower svrev_* to llvm.vector.reverse and fold svrev(svrev(x)) -> x (PR #116422)   Jorge Botto via llvm-commits
• [llvm] 559a50c - SimplifyIndVar: Use use_empty instead of hasNUses(0) (#137346)   via llvm-commits
• [llvm] SimplifyIndVar: Use use_empty instead of hasNUses(0) (PR #137346)   Matt Arsenault via llvm-commits
• [llvm] 91865ac - Use isa instead of !dyn_cast (#137344)   via llvm-commits
• [llvm] Use isa instead of !dyn_cast (PR #137344)   Matt Arsenault via llvm-commits
• [llvm] [NVPTX] Remove 'param' variants of nvvm.ptr.* intrinics (PR #137065)   Artem Belevich via llvm-commits
• [llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)   YunQiang Su via llvm-commits
• [lld] [lld] NFC. Rename function to better reflect its implementation (PR #136625)   Pranav Kant via llvm-commits
• [llvm] [MachineLICM] Recognize registers clobbered at EH landing pad entry (PR #122446)   Ulrich Weigand via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Min-Yih Hsu via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Min-Yih Hsu via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Min-Yih Hsu via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Min-Yih Hsu via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Min-Yih Hsu via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Min-Yih Hsu via llvm-commits
• [llvm] [MachineCopyPropagation] Recognise and delete no-op moves produced after forwarded uses (PR #129889)   Martin Storsjö via llvm-commits
• [llvm] [MachineLICM] Recognize registers clobbered at EH landing pad entry (PR #122446)   Ulrich Weigand via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Min-Yih Hsu via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Min-Yih Hsu via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   via llvm-commits
• [llvm] [RISCV] Remove `AND` mask generated by `( zext ( atomic_load ) )` by replacing the load with `zextload` for orderings not stronger then monotonic. (PR #136502)   Craig Topper via llvm-commits
• [llvm] [RISCV] Select (add x, C) -> (sub x, -C) if -C cheaper to materialize (PR #137309)   Craig Topper via llvm-commits
• [llvm] [IVDescriptors] Don't require nsz/nnan for (min|max)num. (PR #137003)   Florian Hahn via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Pawan Nirpal via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   via llvm-commits
• [llvm] [polly] IR: Remove uselist for constantdata (PR #137313)   Eli Friedman via llvm-commits
• [llvm] 683c3b8 - [RISCV] Allocate Feature Bits for Zilsd/Zclsd/Zcmp (#135197)   via llvm-commits
• [compiler-rt] [llvm] [RISCV] Allocate Feature Bits for Zilsd/Zclsd/Zcmp (PR #135197)   Sam Elliott via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Pawan Nirpal via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Pawan Nirpal via llvm-commits
• [llvm] [IR] Require that global value initializers are sized (PR #137358)   Eli Friedman via llvm-commits
• [llvm] 3e4e365 - [DirectX] Fix shader flag version-checking logic to match DXC (#136787)   via llvm-commits
• [llvm] [DirectX] Fix shader flag version-checking logic to match DXC (PR #136787)   Deric C. via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Dmitry Vasilyev via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [llvm] [DirectX] Implement Shader Flag Analysis for `UAVsAtEveryStage` (PR #137085)   Deric C. via llvm-commits
• [llvm] Clarify `lit`'s definition of failure and conditions when it exits with exit code 1 (PR #136190)   via llvm-commits
• [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)   Brox Chen via llvm-commits
• [llvm] [IVDescriptors] Don't require nsz/nnan for (min|max)num. (PR #137003)   David Green via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Disable pauth and ldgm as unsupported instructions fixed (PR #136868)   Aiden Grossman via llvm-commits
• [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)   via llvm-commits
• [llvm] Clarify `lit`'s definition of failure and conditions when it exits with exit code 1 (PR #136190)   via llvm-commits
• [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)   Brox Chen via llvm-commits
• [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)   Brox Chen via llvm-commits
• [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)   Brox Chen via llvm-commits
• [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)   Brox Chen via llvm-commits
• [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)   Brox Chen via llvm-commits
• [lldb] [llvm] Modify the localCache API to require an explicit commit on CachedFile… (PR #136121)   via llvm-commits
• [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)   Brox Chen via llvm-commits
• [llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)   Min-Yih Hsu via llvm-commits
• [llvm] Clarify `lit`'s definition of failure and conditions when it exits with exit code 1 (PR #136190)   via llvm-commits
• [llvm] [Dwarf] Emit `DW_AT_bit_size` for non-byte-sized types (PR #137118)   David Blaikie via llvm-commits
• [llvm] [NFC][Sink] Change runtime checks to asserts (PR #137354)   via llvm-commits
• [llvm] [Dwarf] Emit `DW_AT_bit_size` for non-byte-sized types (PR #137118)   David Blaikie via llvm-commits
• [llvm] [NFC][LLVM] Refactor MachineInstr operand accessors (PR #137261)   Rahul Joshi via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Liam Semeria via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   Nikita Popov via llvm-commits
• [llvm] [PowerPC] Add dense math half-precision floating-point outer-product accumulate to DMR instructions (PR #133272)   via llvm-commits
• [compiler-rt] [NFC][CFI] Add minimal runtime test for CFI (PR #137245)   Vitaly Buka via llvm-commits
• [llvm] Reland [AMDGPU] Support block load/store for CSR #130013 (PR #137169)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for SpacemiT-X60 (PR #137343)   Pengcheng Wang via llvm-commits
• [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)   Brox Chen via llvm-commits
• [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)   Brox Chen via llvm-commits
• [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)   Brox Chen via llvm-commits
• [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)   Brox Chen via llvm-commits
• [compiler-rt] 0383e54 - [NFC][CFI] Add minimal runtime test for CFI (#137245)   via llvm-commits
• [compiler-rt] [NFC][CFI] Add minimal runtime test for CFI (PR #137245)   Vitaly Buka via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   Nikita Popov via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)   Brox Chen via llvm-commits
• [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)   Brox Chen via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Joshua Batista via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode (PR #137377)   Matt Arsenault via llvm-commits
• [llvm] [NFC][Sink] Change runtime checks to asserts (PR #137354)   via llvm-commits
• [llvm] c4d84e1 - [VPlan] Use replaceSuccessor/replacePredecessor in insertBlock (NFC).   Florian Hahn via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for SpacemiT-X60 (PR #137343)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for SpacemiT-X60 (PR #137343)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for SpacemiT-X60 (PR #137343)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for SpacemiT-X60 (PR #137343)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for SpacemiT-X60 (PR #137343)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for SpacemiT-X60 (PR #137343)   Min-Yih Hsu via llvm-commits
• [llvm] [NFC][Sink] Change runtime checks to asserts (PR #137354)   via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Matt Arsenault via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Joshua Batista via llvm-commits
• [compiler-rt] [NFC][CFI] Add minimal runtime test for CFI (PR #137245)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][Sink] Change runtime checks to asserts (PR #137354)   Nikita Popov via llvm-commits
• [compiler-rt] [NFC][CFI] Fix test from #137245 (PR #137390)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][CFI] Fix test from #137245 (PR #137390)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][CFI] Fix test from #137245 (PR #137390)   via llvm-commits
• [llvm] [HLSL][NFC] Rename getBindingMap to getResourceMap (PR #137256)   Helena Kotas via llvm-commits
• [compiler-rt] [NFC][CFI] Fix test from #137245 (PR #137390)   Vitaly Buka via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [compiler-rt] 012cf4f - [NFC][CFI] Fix test from #137245 (#137390)   via llvm-commits
• [compiler-rt] [NFC][CFI] Fix test from #137245 (PR #137390)   Vitaly Buka via llvm-commits
• [llvm] fecf074 - [HLSL][RootSignature] Add parsing of DescriptorRangeFlags (#136775)   via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of DescriptorRangeFlags (PR #136775)   Finn Plummer via llvm-commits
• [llvm] [HLSL][NFC] Rename getBindingMap to getResourceMap (PR #137256)   Helena Kotas via llvm-commits
• [compiler-rt] [NFC][CFI] Add minimal runtime test for CFI (PR #137245)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Automatic conversion from wave32 to wave64 (PR #137376)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of remaining Descriptor Table params (PR #137038)   Finn Plummer via llvm-commits
• [clang] [llvm] [HLSL][RootSignature] Add parsing of remaining Descriptor Table params (PR #137038)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Implement Shader Flag Analysis for `UAVsAtEveryStage` (PR #137085)   Deric C. via llvm-commits
• [llvm] [AArch64][SVE] Generate asrd instruction for positive pow-2 divisors … (PR #137151)   Paul Walker via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Justin Bogner via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Justin Bogner via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Justin Bogner via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Justin Bogner via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Justin Bogner via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Justin Bogner via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Justin Bogner via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Justin Bogner via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Justin Bogner via llvm-commits
• [llvm] [HLSL][NFC] Rename getBindingMap to getResourceMap and update pass name (PR #137256)   Helena Kotas via llvm-commits
• [llvm] Reland [AMDGPU] Support block load/store for CSR #130013 (PR #137169)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for SpacemiT-X60 (PR #137343)   Craig Topper via llvm-commits
• [llvm] IR/Verifier: Allow vector type in atomic load and store (PR #120384)   via llvm-commits
• [llvm] IR/Verifier: Allow vector type in atomic load and store (PR #120384)   via llvm-commits
• [llvm] IR/Verifier: Allow vector type in atomic load and store (PR #120384)   via llvm-commits
• [llvm] [IVDescriptors] Don't require nsz/nnan for (min|max)num. (PR #137003)   Matt Arsenault via llvm-commits
• [compiler-rt] test: get rid of redundant TODO tag in fuzz tests (PR #137395)   via llvm-commits
• [compiler-rt] test: get rid of redundant TODO tag in fuzz tests (PR #137395)   via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   via llvm-commits
• [compiler-rt] test: get rid of redundant TODO tag in fuzz tests (PR #137395)   via llvm-commits
• [clang] [llvm] [LLVM][Clang][Cygwin] Fix building Clang for Cygwin (PR #134494)   Martin Storsjö via llvm-commits
• [compiler-rt] doc: get rid of redundant TODO tag in FuzzedDataProvider.h (PR #137395)   via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Dmitry Vasilyev via llvm-commits
• [llvm] [NFC][Sink] Change runtime checks to asserts (PR #137354)   Nikita Popov via llvm-commits
• [compiler-rt] [NFC][CFI] Add minimal runtime test for CFI (PR #137245)   LLVM Continuous Integration via llvm-commits
• [llvm] bd96fa7 - [ItaniumDemangle][NFC] Add getter to ObjCProtoName::getProtocol   Michael Buch via llvm-commits
• [llvm] Warn on misuse of DiagnosticInfo classes that hold Twines (PR #137397)   Justin Bogner via llvm-commits
• [llvm] Stop abusing Twine in DiagnosticInfo (PR #136371)   Justin Bogner via llvm-commits
• [llvm] Stop abusing Twine in DiagnosticInfo (PR #136371)   Justin Bogner via llvm-commits
• [llvm] Warn on misuse of DiagnosticInfo classes that hold Twines (PR #137397)   via llvm-commits
• [llvm] Warn on misuse of DiagnosticInfo classes that hold Twines (PR #137397)   via llvm-commits
• [llvm] Warn on misuse of DiagnosticInfo classes that hold Twines (PR #137397)   via llvm-commits
• [llvm] [mlir] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Matt Arsenault via llvm-commits
• [llvm] [NFC] Move all checks for unsafe instructions into one function (PR #137398)   via llvm-commits
• [llvm] [NFC] Move all checks for unsafe instructions into one function (PR #137398)   via llvm-commits
• [llvm] [DirectX] Legalize i8 allocas (PR #137399)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Legalize i8 allocas (PR #137399)   via llvm-commits
• [llvm] f9d4e7e - [NFC][Sink] Change runtime checks to asserts (#137354)   via llvm-commits
• [llvm] [NFC][Sink] Change runtime checks to asserts (PR #137354)   Nikita Popov via llvm-commits
• [llvm] [DirectX] Legalize i8 allocas (PR #137399)   via llvm-commits
• [llvm] [RISCV] Deprecate `riscv.segN.load/store` in favor of their mask variants (PR #137045)   Min-Yih Hsu via llvm-commits
• [llvm] [DirectX] Legalize i8 allocas (PR #137399)   Farzon Lotfi via llvm-commits
• [llvm] [NFC][LLVM][CodeGen] Refactor MIR Printer (PR #137361)   Rahul Joshi via llvm-commits
• [compiler-rt] doc: get rid of redundant TODO tag in FuzzedDataProvider.h (PR #137395)   Vitaly Buka via llvm-commits
• [compiler-rt] 8cd628f - doc: get rid of redundant TODO tag in FuzzedDataProvider.h (#137395)   via llvm-commits
• [compiler-rt] doc: get rid of redundant TODO tag in FuzzedDataProvider.h (PR #137395)   Vitaly Buka via llvm-commits
• [compiler-rt] doc: get rid of redundant TODO tag in FuzzedDataProvider.h (PR #137395)   via llvm-commits
• [compiler-rt] [sanitizer_common] Remove interceptors for deprecated struct termio (PR #137403)   Tom Stellard via llvm-commits
• [llvm] [TableGen][SelectionDAG][GISel] Support IsNonExtLoad for IsAtomic PatFrags. (PR #137401)   Matt Arsenault via llvm-commits
• [compiler-rt] [sanitizer_common] Remove interceptors for deprecated struct termio (PR #137403)   via llvm-commits
• [llvm] [AMDGPU] Fix undefined scc register in successor block of SI_KILL terminators (PR #134718)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix undefined scc register in successor block of SI_KILL terminators (PR #134718)   Matt Arsenault via llvm-commits
• [llvm] [DirectX] Adding support for Root Descriptors in obj2yaml/yaml2obj (PR #137259)   via llvm-commits
• [llvm] [libc][bazel] Fix BUILD.bazel after 5ff2774. (PR #137404)   Alexey Samsonov via llvm-commits
• [llvm] [libc][bazel] Fix BUILD.bazel after 5ff2774. (PR #137404)   via llvm-commits
• [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)   Matt Arsenault via llvm-commits
• [llvm] [DirectX] Adding support for Root Descriptors in obj2yaml/yaml2obj (PR #137259)   via llvm-commits
• [llvm] [libc][bazel] Fix BUILD.bazel after 5ff2774. (PR #137404)   Augie Fackler via llvm-commits
• [compiler-rt] [compiler-rt] Make sure __clzdi2 doesn't call itself recursively on sparc64 (PR #136737)   via llvm-commits
• [llvm] [NFC][LLVM][CodeGen] Refactor MIR Printer (PR #137361)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM][CodeGen] Refactor MIR Printer (PR #137361)   Rahul Joshi via llvm-commits
• [llvm] [BOLT][RelVTable] Skip special handling on non virtual function pointer relocations (PR #137406)   YongKang Zhu via llvm-commits
• [llvm] [RISCV] Remove`riscv.segN.load/store` in favor of their mask variants (PR #137045)   Min-Yih Hsu via llvm-commits
• [llvm] [BOLT][RelVTable] Skip special handling on non virtual function pointer relocations (PR #137406)   via llvm-commits
• [llvm] [RISCV] Remove`riscv.segN.load/store` in favor of their mask variants (PR #137045)   Min-Yih Hsu via llvm-commits
• [llvm] [BOLT][RelVTable] Skip special handling on non virtual function pointer relocations (PR #137406)   YongKang Zhu via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Joshua Batista via llvm-commits
• [llvm] c530bf2 - [gn] port 9c830cef3d7c2f   Nico Weber via llvm-commits
• [llvm] d4898b5 - [gn] port d555b9f9a017050 (LanguageCPlusPlusProperties tblgen)   Nico Weber via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Joshua Batista via llvm-commits
• [llvm] Reland [AMDGPU] Support block load/store for CSR #130013 (PR #137169)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Fix undefined scc register in successor block of SI_KILL terminators (PR #134718)   via llvm-commits
• [llvm] [NFC][LLVM][CodeGen] Refactor MIR Printer (PR #137361)   Rahul Joshi via llvm-commits
• [llvm] [llvm] Fixed ItaniumDemangle.h compiled by MSVC (PR #137409)   Dmitry Vasilyev via llvm-commits
• [llvm] [llvm] Fixed ItaniumDemangle.h compiled by MSVC (PR #137409)   via llvm-commits
• [llvm] [DirectX] Adding support for Root Descriptors in obj2yaml/yaml2obj (PR #137259)   via llvm-commits
• [llvm] [DirectX] Adding support for Root Descriptors in obj2yaml/yaml2obj (PR #137259)   via llvm-commits
• [llvm] [IVDescriptors] Support reductions with minimumnum/maximumnum. (PR #137335)   Matt Arsenault via llvm-commits
• [llvm] [IVDescriptors] Support reductions with minimumnum/maximumnum. (PR #137335)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Fixed ItaniumDemangle.h compiled by MSVC (PR #137409)   Michael Buch via llvm-commits
• [llvm] [CodeGen][NPM] Update BranchFolderLegacy make tail merge configurable via flag (PR #135277)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Fixed ItaniumDemangle.h compiled by MSVC (PR #137409)   Michael Buch via llvm-commits
• [llvm] [AMDGPU] Fix undefined scc register in successor block of SI_KILL terminators (PR #134718)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix undefined scc register in successor block of SI_KILL terminators (PR #134718)   Matt Arsenault via llvm-commits
• [compiler-rt] [sanitizer_common] Remove interceptors for deprecated struct termio (PR #137403)   Vitaly Buka via llvm-commits
• [clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)   Sam Elliott via llvm-commits
• [clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)   Sam Elliott via llvm-commits
• [clang] [lld] [llvm] [mlir] [NFC] Use more isa and isa_and_nonnull instead dyn_cast for predicates (PR #137393)   Jeremy Kun via llvm-commits
• [llvm] [DataLayout] Introduce DataLayout::getPointerAddressSize(AS) (PR #137412)   Alexander Richardson via llvm-commits
• [clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)   Craig Topper via llvm-commits
• [compiler-rt] [sanitizer_common] Remove interceptors for deprecated struct termio (PR #137403)   Tom Stellard via llvm-commits
• [llvm] [BOLT] Optimize the codegen of createLoadImmediate for AArch64. (PR #137413)   Rodrigo Rocha via llvm-commits
• [llvm] [BOLT] Optimize the codegen of createLoadImmediate for AArch64. (PR #137413)   via llvm-commits
• [llvm] [MemProf] Add v4 which contains CalleeGuids to CallSiteInfo. (PR #137394)   Kazu Hirata via llvm-commits
• [llvm] 871c6c9 - [gn] port 08efca9c2c2b   Nico Weber via llvm-commits
• [llvm] remove 'movt' if there is no user of it (PR #136735)   via llvm-commits
• [llvm] [AMDGPU] remove move instruction if there is no user of it (PR #136735)   via llvm-commits
• [llvm] [AMDGPU] remove move instruction if there is no user of it (PR #136735)   via llvm-commits
• [clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)   Sam Elliott via llvm-commits
• [clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)   Sam Elliott via llvm-commits
• [llvm] [MemProf] Add v4 which contains CalleeGuids to CallSiteInfo. (PR #137394)   Snehasish Kumar via llvm-commits
• [llvm] d294105 - [gn build] Port 5bad5d84a15a   LLVM GN Syncbot via llvm-commits
• [llvm] dd05413 - [gn build] Port ea443eeb2ab8   LLVM GN Syncbot via llvm-commits
• [llvm] [llvm] Fixed ItaniumDemangle.h compiled by MSVC (PR #137409)   Dmitry Vasilyev via llvm-commits
• [llvm] [llvm] Fixed ItaniumDemangle.h compiled by MSVC (PR #137409)   Dmitry Vasilyev via llvm-commits
• [llvm] [DataLayout] Introduce DataLayout::getPointerAddressSize(AS) (PR #137412)   Alexander Richardson via llvm-commits
• [llvm] Add the new test cases for gather scalar (PR #137416)   Rohit Aggarwal via llvm-commits
• [llvm] [DataLayout] Introduce DataLayout::getPointerAddressSize(AS) (PR #137412)   Alexander Richardson via llvm-commits
• [llvm] Add the new test cases for gather scalar (PR #137416)   via llvm-commits
• [llvm] Add the new test cases for gather scalar (PR #137416)   Rohit Aggarwal via llvm-commits
• [compiler-rt] [NFC][CFI] Fix test from #137245 (PR #137420)   Vitaly Buka via llvm-commits
• [compiler-rt] 0f73e89 - [NFC][CFI] Fix test from #137245 (#137420)   via llvm-commits
• [compiler-rt] [NFC][CFI] Fix test from #137245 (PR #137420)   Vitaly Buka via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Justin Bogner via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Justin Bogner via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Justin Bogner via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Justin Bogner via llvm-commits
• [clang] [llvm] [DXIL] Remove incompatible metadata types when preparing DXIL. (PR #136386)   Justin Bogner via llvm-commits
• [llvm] [RISCV] Add support for vendor relocations on Xqci extensions (PR #135400)   Sam Elliott via llvm-commits
• [llvm] cfc5baf - [RISCV] SiFive CLIC Support (#132481)   via llvm-commits
• [clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)   Sam Elliott via llvm-commits
• [llvm] [NFC][LLVM][CodeGen] Refactor MIR Printer (PR #137361)   Rahul Joshi via llvm-commits
• [llvm] [lit] Support GoogleTest test discovery through prefixes, too (PR #137423)   Jon Roelofs via llvm-commits
• [llvm] [lit] Support GoogleTest test discovery through prefixes, too (PR #137423)   via llvm-commits
• [llvm] [lit] Support GoogleTest test discovery through prefixes, too (PR #137423)   via llvm-commits
• [compiler-rt] [NFC][CFI] Fix setup of UBSAN_TEST_HAS_CFI (PR #137424)   Vitaly Buka via llvm-commits
• [compiler-rt] 367b91a - [NFC][CFI] Fix setup of UBSAN_TEST_HAS_CFI (#137424)   via llvm-commits
• [compiler-rt] [NFC][CFI] Fix setup of UBSAN_TEST_HAS_CFI (PR #137424)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][CFI] Fix setup of UBSAN_TEST_HAS_CFI (PR #137424)   via llvm-commits
• [llvm] [lit] Support GoogleTest test discovery through prefixes, too (PR #137423)   Jon Roelofs via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add a new amdgcn.load.to.lds intrinsic (PR #137425)   Krzysztof Drewniak via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add a new amdgcn.load.to.lds intrinsic (PR #137425)   via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add a new amdgcn.load.to.lds intrinsic (PR #137425)   via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add a new amdgcn.load.to.lds intrinsic (PR #137425)   via llvm-commits
• [compiler-rt] [NFC][CFI] Fix test from #137245 (PR #137420)   LLVM Continuous Integration via llvm-commits
• [lldb] [llvm] [lldb-dap] Migrating breakpointLocations request to use typed RequestHandler (PR #137426)   Ely Ronnen via llvm-commits
• [llvm] [Targets] Migrate from atomic_load_8/16/32/64 to atomic_load_nonext_8/16/32/64. NFC (PR #137428)   Craig Topper via llvm-commits
• [llvm] [Targets] Migrate from atomic_load_8/16/32/64 to atomic_load_nonext_8/16/32/64. NFC (PR #137428)   via llvm-commits
• [llvm] [Targets] Migrate from atomic_load_8/16/32/64 to atomic_load_nonext_8/16/32/64. NFC (PR #137428)   via llvm-commits
• [llvm] [Targets] Migrate from atomic_load_8/16/32/64 to atomic_load_nonext_8/16/32/64. NFC (PR #137428)   via llvm-commits
• [llvm] [Targets] Migrate from atomic_load_8/16/32/64 to atomic_load_nonext_8/16/32/64. NFC (PR #137428)   via llvm-commits
• [clang] [llvm] [RISCV] SiFive CLIC Support (PR #132481)   LLVM Continuous Integration via llvm-commits
• [lldb] [llvm] [lldb-dap] Migrating breakpointLocations request to use typed RequestHandler (PR #137426)   Ely Ronnen via llvm-commits
• [clang] [lld] [llvm] [mlir] [NFC] Use more isa and isa_and_nonnull instead dyn_cast for predicates (PR #137393)   Jakub Kuderski via llvm-commits
• [llvm] [MemProf] Add v4 which contains CalleeGuids to CallSiteInfo. (PR #137394)   Mingming Liu via llvm-commits
• [llvm] [MemProf] Add v4 which contains CalleeGuids to CallSiteInfo. (PR #137394)   Mingming Liu via llvm-commits
• [llvm] [MemProf] Add v4 which contains CalleeGuids to CallSiteInfo. (PR #137394)   Mingming Liu via llvm-commits
• [llvm] [LoongArch] Try to widen shuffle mask (PR #136081)   via llvm-commits
• [llvm] [LoongArch] Try to widen shuffle mask (PR #136081)   via llvm-commits
• [llvm] [LoongArch] Try to widen shuffle mask (PR #136081)   via llvm-commits
• [llvm] [lit] Support GoogleTest test discovery through prefixes, too (PR #137423)   Reid Kleckner via llvm-commits
• [llvm] [lit] Support GoogleTest test discovery through prefixes, too (PR #137423)   Reid Kleckner via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Akhilesh Moorthy via llvm-commits
• [llvm] [DirectX] Adding support for Root Descriptors in obj2yaml/yaml2obj (PR #137259)   via llvm-commits
• [llvm] [MemProf] Add v4 which contains CalleeGuids to CallSiteInfo. (PR #137394)   Kazu Hirata via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Phoebe Wang via llvm-commits
• [clang] [lld] [llvm] [mlir] [NFC] Use more isa and isa_and_nonnull instead dyn_cast for predicates (PR #137393)   Kazu Hirata via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Dhruva Chakrabarti via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   Aiden Grossman via llvm-commits
• [llvm] [lit] Support GoogleTest test discovery through prefixes, too (PR #137423)   Jon Roelofs via llvm-commits
• [llvm] [DirectX] Adding support for Root Descriptors in obj2yaml/yaml2obj (PR #137259)   via llvm-commits
• [llvm] [HLSL] Implement DXILResourceBindingAnalysis (PR #137258)   Helena Kotas via llvm-commits
• [llvm] [RISCV] Expand constant multiplication for targets without M extension (PR #137195)   Iris Shi via llvm-commits
• [llvm] Linker: Remove dropTriviallyDeadConstantArrays(). (PR #137081)   Peter Collingbourne via llvm-commits
• [llvm] [MemProf] Add v4 which contains CalleeGuids to CallSiteInfo. (PR #137394)   Kazu Hirata via llvm-commits
• [llvm] [SandboxIR] Implement ConstantDataVector member functions (PR #136200)   Jorge Gorbe Moya via llvm-commits
• [compiler-rt] [compiler-rt] Remove struct_termio_sz from sanitizer_platform_limits_posix.cpp (PR #137440)   via llvm-commits
• [compiler-rt] [compiler-rt] Remove struct_termio_sz from sanitizer_platform_limits_posix.cpp (PR #137440)   via llvm-commits
• [compiler-rt] [compiler-rt] Remove struct_termio_sz from sanitizer_platform_limits_posix.cpp (PR #137440)   via llvm-commits
• [compiler-rt] [compiler-rt] Remove struct_termio_sz from sanitizer_platform_limits_posix.cpp (PR #137440)   Sam James via llvm-commits
• [compiler-rt] [compiler-rt] Remove struct_termio_sz from sanitizer_platform_limits_posix.cpp (PR #137440)   via llvm-commits
• [compiler-rt] [compiler-rt] Remove struct_termio_sz from sanitizer_platform_limits_posix.cpp (PR #137440)   via llvm-commits
• [llvm] [msan] Implement support for avx512fp16.mask.{add/sub/mul/div/max/min}.sh.round (PR #137441)   Thurston Dang via llvm-commits
• [lldb] [llvm] [lldb-dap] Migrating breakpointLocations request to use typed RequestHandler (PR #137426)   Jonas Devlieghere via llvm-commits
• [lldb] [llvm] [lldb-dap] Migrating breakpointLocations request to use typed RequestHandler (PR #137426)   Jonas Devlieghere via llvm-commits
• [lldb] [llvm] [lldb-dap] Migrating breakpointLocations request to use typed RequestHandler (PR #137426)   Jonas Devlieghere via llvm-commits
• [llvm] [RISCV] Support Push/Pop with Xqci (PR #134191)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Expand constant multiplication for targets without M extension (PR #137195)   Sam Elliott via llvm-commits
• [llvm] IR/Verifier: Allow vector type in atomic load and store (PR #120384)   via llvm-commits
• [llvm] IR/Verifier: Allow vector type in atomic load and store (PR #120384)   via llvm-commits
• [llvm] b81947e - [SandboxIR] Implement ConstantDataVector member functions (#136200)   via llvm-commits
• [llvm] [TableGen][NFC] Refactor/deduplicate emitAction. (PR #137434)   Craig Topper via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   LLVM Continuous Integration via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Support Push/Pop with Xqci (PR #134191)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Preserve disjoint or after folding casted bitwise logic (PR #136815)   LLVM Continuous Integration via llvm-commits
• [llvm] 3bc1254 - [AMDGPU][Verifier] Check address space of `alloca` instruction (#135820)   via llvm-commits
• [llvm] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Shilei Tian via llvm-commits
• [llvm] DAGCombiner: Support fmaximum/fminimum and fmaximumnum/fminimumnum (PR #137318)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support nofpclass with zero/pzero/nzero (PR #137305)   YunQiang Su via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   LLVM Continuous Integration via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   LLVM Continuous Integration via llvm-commits
• [llvm] [Targets] Migrate from atomic_load_8/16/32/64 to atomic_load_nonext_8/16/32/64. NFC (PR #137428)   Sergei Barannikov via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   LLVM Continuous Integration via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   LLVM Continuous Integration via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] getFauxShuffleMask - generalise logical shifts to work with non-uniform shift amounts (PR #137349)   Phoebe Wang via llvm-commits
• [llvm] [SelectionDAG] Reduce code duplication between getStore, getTruncStore, and getIndexedStore. (PR #137435)   Sergei Barannikov via llvm-commits
• [llvm] [X86] getFauxShuffleMask - generalise logical shifts to work with non-uniform shift amounts (PR #137349)   Phoebe Wang via llvm-commits
• [llvm] [LLVM][CodeGen][X86] Add ConstantInt/FP based vector support to MachineInstr fixup and printing code. (PR #137331)   Phoebe Wang via llvm-commits
• [llvm] [Targets] Migrate from atomic_load_8/16/32/64 to atomic_load_nonext_8/16/32/64. NFC (PR #137428)   Craig Topper via llvm-commits
• [llvm] [NFC][LLVM][CodeGen] Refactor MIR Printer (PR #137361)   Sergei Barannikov via llvm-commits
• [llvm] [NFC][LLVM][CodeGen] Refactor MIR Printer (PR #137361)   Sergei Barannikov via llvm-commits
• [llvm] c27018b - [SelectionDAG] Use getExtLoadVP in PromoteIntRes_VP_LOAD. NFC   Craig Topper via llvm-commits
• [llvm] [Targets] Migrate from atomic_load_8/16/32/64 to atomic_load_nonext_8/16/32/64. NFC (PR #137428)   Sergei Barannikov via llvm-commits
• [llvm] [Targets] Migrate from atomic_load_8/16/32/64 to atomic_load_nonext_8/16/32/64. NFC (PR #137428)   Craig Topper via llvm-commits
• [llvm] 2ae9a74 - [CodeGen] Use `TRI::regunits()` (NFC) (#137356)   via llvm-commits
• [llvm] [CodeGen] Use `TRI::regunits()` (NFC) (PR #137356)   Sergei Barannikov via llvm-commits
• [llvm] [Targets] Migrate from atomic_load_8/16/32/64 to atomic_load_nonext_8/16/32/64. NFC (PR #137428)   Sergei Barannikov via llvm-commits
• [llvm] [SelectionDAG] Reduce code duplication between getStore, getTruncStore, and getIndexedStore. (PR #137435)   Craig Topper via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   LLVM Continuous Integration via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   LLVM Continuous Integration via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   LLVM Continuous Integration via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   LLVM Continuous Integration via llvm-commits
• [llvm] [Targets] Migrate from atomic_load_8/16/32/64 to atomic_load_nonext_8/16/32/64. NFC (PR #137428)   Sergei Barannikov via llvm-commits
• [llvm] [Targets] Migrate from atomic_load_8/16/32/64 to atomic_load_nonext_8/16/32/64. NFC (PR #137428)   Sergei Barannikov via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   NAKAMURA Takumi via llvm-commits
• [llvm] 3e1e406 - [InstCombine] Preserve signbit semantics of NaN with fold to fabs (#136648)   via llvm-commits
• [llvm] [InstCombine] Preserve signbit semantics of NaN with fold to fabs (PR #136648)   Yingwei Zheng via llvm-commits
• [clang] [flang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [clang] [flang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [llvm] [DirectX] Adding support for Root Descriptors in obj2yaml/yaml2obj (PR #137259)   via llvm-commits
• [llvm] [msan] Implement support for avx512fp16.mask.{add/sub/mul/div/max/min}.sh.round (PR #137441)   Thurston Dang via llvm-commits
• [llvm] [SelectionDAG] Reduce code duplication between getStore, getTruncStore, and getIndexedStore. (PR #137435)   Sergei Barannikov via llvm-commits
• [llvm] [Targets] Migrate from atomic_load_8/16/32/64 to atomic_load_nonext_8/16/32/64. NFC (PR #137428)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix undefined scc register in successor block of SI_KILL terminators (PR #134718)   Matt Arsenault via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Leon Clark via llvm-commits
• [llvm] SelectionDAG: Support nofpclass with zero/pzero/nzero (PR #137305)   Matt Arsenault via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add a new amdgcn.load.to.lds intrinsic (PR #137425)   Matt Arsenault via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add a new amdgcn.load.to.lds intrinsic (PR #137425)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Matt Arsenault via llvm-commits
• [llvm] [DataLayout] Introduce DataLayout::getPointerAddressSize(AS) (PR #137412)   Sergei Barannikov via llvm-commits
• [llvm] [Sink] Allow sinking of loads to distant blocks (PR #135986)   Matt Arsenault via llvm-commits
• [llvm] [Sink] Allow sinking of loads to distant blocks (PR #135986)   Matt Arsenault via llvm-commits
• [llvm] [Sink] Allow sinking of loads to distant blocks (PR #135986)   Matt Arsenault via llvm-commits
• [llvm] [Sink] Allow sinking of loads to distant blocks (PR #135986)   Matt Arsenault via llvm-commits
• [llvm] DAGCombiner: Support fmaximum/fminimum and fmaximumnum/fminimumnum (PR #137318)   Matt Arsenault via llvm-commits
• [llvm] DAGCombiner: Support fmaximum/fminimum and fmaximumnum/fminimumnum (PR #137318)   Matt Arsenault via llvm-commits
• [llvm] DAGCombiner: Support fmaximum/fminimum and fmaximumnum/fminimumnum (PR #137318)   Matt Arsenault via llvm-commits
• [llvm] DAGCombiner: Support fmaximum/fminimum and fmaximumnum/fminimumnum (PR #137318)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine][DebugInfo] Update debug value uses in `freelyInvertAllUsersOf` (PR #137013)   Yingwei Zheng via llvm-commits
• [llvm] [DataLayout] Introduce DataLayout::getPointerAddressSize(AS) (PR #137412)   Sergei Barannikov via llvm-commits
• [clang] [flang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [llvm] IR/Verifier: Allow vector type in atomic load and store (PR #120384)   via llvm-commits
• [llvm] IR/Verifier: Allow vector type in atomic load and store (PR #120384)   via llvm-commits
• [llvm] SelectionDAG: Support nofpclass with zero/pzero/nzero (PR #137305)   YunQiang Su via llvm-commits
• [llvm] 571e024 - [Sink][NFC] Move all checks for unsafe instructions into one function (#137398)   via llvm-commits
• [llvm] [Sink][NFC] Move all checks for unsafe instructions into one function (PR #137398)   Nikita Popov via llvm-commits
• [llvm] DAGCombiner: Support fmaximum/fminimum and fmaximumnum/fminimumnum (PR #137318)   YunQiang Su via llvm-commits
• [llvm] DAGCombiner: Support fmaximum/fminimum and fmaximumnum/fminimumnum (PR #137318)   YunQiang Su via llvm-commits
• [llvm] DAGCombiner: Support fmaximum/fminimum and fmaximumnum/fminimumnum (PR #137318)   YunQiang Su via llvm-commits
• [llvm] DAGCombiner: Support fmaximum/fminimum and fmaximumnum/fminimumnum (PR #137318)   YunQiang Su via llvm-commits
• [llvm] DAGCombiner: Support fmaximum/fminimum and fmaximumnum/fminimumnum (PR #137318)   YunQiang Su via llvm-commits
• [llvm] [Sink][NFC] Move all checks for unsafe instructions into one function (PR #137398)   LLVM Continuous Integration via llvm-commits
• [llvm] DAGCombiner: Support fmaximum/fminimum and fmaximumnum/fminimumnum (PR #137318)   YunQiang Su via llvm-commits
• [llvm] DAGCombiner: Support fmaximum/fminimum and fmaximumnum/fminimumnum (PR #137318)   YunQiang Su via llvm-commits
• [lldb] [llvm] Lldb dap migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [llvm] [InstCombine] Support ptrtoint of gep folds for chain of geps (PR #137323)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Support ptrtoint of gep folds for chain of geps (PR #137323)   Yingwei Zheng via llvm-commits
• [llvm] DAGCombiner: Support fmaximum/fminimum and fmaximumnum/fminimumnum (PR #137318)   YunQiang Su via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   YunQiang Su via llvm-commits
• [llvm] [X86] Avoid zero extend i16 when inserting fp16 (PR #126194)   Phoebe Wang via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNum… (PR #137449)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNum… (PR #137449)   via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNum… (PR #137449)   via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNum… (PR #137449)   via llvm-commits
• [llvm] 5843069 - [CodeExtractor] Improve debug info for input values. (#136016)   via llvm-commits
• [llvm] [CodeExtractor] Improve debug info for input values. (PR #136016)   Abid Qadeer via llvm-commits
• [clang] [llvm] [X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (PR #137450)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (PR #137450)   via llvm-commits
• [clang] [llvm] [X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (PR #137450)   via llvm-commits
• [llvm] [CodeExtractor] Improve debug info for input values. (PR #136016)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (PR #137450)   via llvm-commits
• [clang] [llvm] [X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (PR #137450)   Phoebe Wang via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [llvm] Remove a debugging message left in a unit test. (PR #137451)   Abid Qadeer via llvm-commits
• [llvm] [CodeExtractor] Improve debug info for input values. (PR #136016)   LLVM Continuous Integration via llvm-commits
• [llvm] Remove a debugging message left in a unit test. (PR #137451)   via llvm-commits
• [llvm] [X86] Avoid zero extend i16 when inserting fp16 (PR #126194)   Phoebe Wang via llvm-commits
• [llvm] [CodeExtractor] Improve debug info for input values. (PR #136016)   Abid Qadeer via llvm-commits
• [llvm] [CodeExtractor] Improve debug info for input values. (PR #136016)   Abid Qadeer via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Dmitry Vasilyev via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Michael Buch via llvm-commits
• [lldb] [llvm] [lldb] Add new per-language frame-format variables for formatting function names (PR #131836)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] b9e3274 - [GlobalISel] Clear nsw flags when converting sub to add. (#137288)   via llvm-commits
• [llvm] [GlobalISel] Clear nsw flags when converting sub to add. (PR #137288)   David Green via llvm-commits
• [llvm] [LLVM][CodeGen][X86] Add ConstantInt/FP based vector support to MachineInstr fixup and printing code. (PR #137331)   Paul Walker via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   Sergei Barannikov via llvm-commits
• [llvm] [X86] getFauxShuffleMask - generalise logical shifts to work with non-uniform shift amounts (PR #137349)   Simon Pilgrim via llvm-commits
• [llvm] 5d91d12 - [X86] getFauxShuffleMask - generalise logical shifts to work with non-uniform shift amounts (#137349)   via llvm-commits
• [llvm] [X86] getFauxShuffleMask - generalise logical shifts to work with non-uniform shift amounts (PR #137349)   Simon Pilgrim via llvm-commits
• [llvm] 76545d7 - [AArch64] Correctly detect X reg from W reg in isCopyImpl (#137348)   via llvm-commits
• [llvm] [AArch64] Correctly detect X reg from w reg in isCopyImpl (PR #137348)   David Green via llvm-commits
• [llvm] [GlobalISel] Clear nsw flags when converting sub to add. (PR #137288)   LLVM Continuous Integration via llvm-commits
• [llvm] 1b2671f - Remove a debugging message left in a unit test. (#137451)   via llvm-commits
• [llvm] Remove a debugging message left in a unit test. (PR #137451)   Abid Qadeer via llvm-commits
• [llvm] [CodeGen][NPM] Update BranchFolderLegacy make tail merge configurable via flag (PR #135277)   Mikhail R. Gadelha via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [llvm] Remove a debugging message left in a unit test. (PR #137451)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] Remove a debugging message left in a unit test. (PR #137451)   Abid Qadeer via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   Simon Pilgrim via llvm-commits
• [llvm] [Offload] Deprecate `openmp` and `offload` projects builds (PR #136314)   LLVM Continuous Integration via llvm-commits
• [llvm] [MachineCopyPropagation] Recognise and delete no-op moves produced after forwarded uses (PR #129889)   Martin Storsjö via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   LLVM Continuous Integration via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   LLVM Continuous Integration via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   LLVM Continuous Integration via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   Sergei Barannikov via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   Sergei Barannikov via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [llvm] [LLVM][CodeGen][X86] Add ConstantInt/FP based vector support to MachineInstr fixup and printing code. (PR #137331)   Phoebe Wang via llvm-commits
• [clang] [lld] [llvm] [mlir] [NFC] Use more isa and isa_and_nonnull instead dyn_cast for predicates (PR #137393)   Mehdi Amini via llvm-commits
• [llvm] [Inliner] Fix Issue #45778: Inliner now respects the alignment of parameters passed by value (PR #137455)   via llvm-commits
• [llvm] [Inliner] Fix Issue #45778: Inliner now respects the alignment of parameters passed by value (PR #137455)   via llvm-commits
• [llvm] [Inliner] Fix Issue #45778: Inliner now respects the alignment of parameters passed by value (PR #137455)   via llvm-commits
• [llvm] [X86] Avoid zero extend i16 when inserting fp16 (PR #126194)   Phoebe Wang via llvm-commits
• [llvm] bb17651 - [TTI] Simplify implementation (NFCI) (#136674)   via llvm-commits
• [llvm] [TTI] Simplify implementation (NFCI) (PR #136674)   Sergei Barannikov via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   YunQiang Su via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   YunQiang Su via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   YunQiang Su via llvm-commits
• [llvm] [Sink] Allow sinking of loads to distant blocks (PR #135986)   via llvm-commits
• [llvm] [Sink] Allow sinking of loads to distant blocks (PR #135986)   via llvm-commits
• [llvm] [TableGen][NFC] Refactor/deduplicate emitAction. (PR #137434)   Jason Eckhardt via llvm-commits
• [llvm] [TableGen][NFC] Refactor/deduplicate emitAction. (PR #137434)   Jason Eckhardt via llvm-commits
• [llvm] [TableGen][NFC] Refactor/deduplicate emitAction. (PR #137434)   Jason Eckhardt via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNum… (PR #137449)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   YunQiang Su via llvm-commits
• [llvm] [Sink] Allow sinking of loads to distant blocks (PR #135986)   via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Remove `AND` mask generated by `( zext ( atomic_load ) )` by replacing the load with `zextload` for orderings not stronger then monotonic. (PR #136502)   Jan Górski via llvm-commits
• [llvm] [SDag] Notify listeners when deleting a node (PR #66991)   Sergei Barannikov via llvm-commits
• [llvm] [RISCV] Remove `AND` mask generated by `( zext ( atomic_load ) )` by replacing the load with `zextload` for orderings not stronger then monotonic. (PR #136502)   Jan Górski via llvm-commits
• [llvm] [flang][OpenMP] Mark atomic clauses as unique (PR #137460)   Krzysztof Parzyszek via llvm-commits
• [llvm] [flang][OpenMP] Mark atomic clauses as unique (PR #137460)   via llvm-commits
• [llvm] [RISCV] Add support for vendor relocations on Xqci extensions (PR #135400)   Sudharsan Veeravalli via llvm-commits
• [compiler-rt] [compiler-rt] Make sure __clzdi2 doesn't call itself recursively on sparc64 (PR #136737)   Saleem Abdulrasool via llvm-commits
• [llvm] [RISCV] Expand constant multiplication for targets without M extension (PR #137195)   Max Graey via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [llvm] [RISCV] Expand constant multiplication for targets without M extension (PR #137195)   Max Graey via llvm-commits
• [llvm] [RISCV] Expand constant multiplication for targets without M extension (PR #137195)   Max Graey via llvm-commits
• [llvm] [Inliner] Fix Issue #45778: Inliner now respects the alignment of parameters passed by value (PR #137455)   Nikita Popov via llvm-commits
• [llvm] [Inliner] Fix Issue #45778: Inliner now respects the alignment of parameters passed by value (PR #137455)   Nikita Popov via llvm-commits
• [llvm] [Inliner] Fix Issue #45778: Inliner now respects the alignment of parameters passed by value (PR #137455)   Nikita Popov via llvm-commits
• [llvm] [Inliner] Fix Issue #45778: Inliner now respects the alignment of parameters passed by value (PR #137455)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Support ptrtoint of gep folds for chain of geps (PR #137323)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Support ptrtoint of gep folds for chain of geps (PR #137323)   Nikita Popov via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for SpacemiT-X60 (PR #137343)   Mark Zhuang via llvm-commits
• [clang] [flang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Christudasan Devadasan via llvm-commits
• [clang] [flang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [llvm] [InstCombine] Support ptrtoint of gep folds for chain of geps (PR #137323)   Nikita Popov via llvm-commits
• [llvm] 41f7a85 - [SPARC] Promote i32 CTTZ when we have VIS3   via llvm-commits
• [llvm] [SPARC] Promote i32 CTTZ when we have VIS3 (PR #135894)   via llvm-commits
• [llvm] [SPARC] Promote i32 CTTZ when we have VIS3 (PR #135894)   via llvm-commits
• [llvm] [CGP] Despeculate ctlz/cttz with "illegal" integer types (PR #137197)   Sergei Barannikov via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   A. Jiang via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   A. Jiang via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   A. Jiang via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   A. Jiang via llvm-commits
• [libcxx] [llvm] [libc++] Implement P3379R0 Constrain `std::expected` equality operators (PR #135759)   A. Jiang via llvm-commits
• [llvm] [InstCombine] Support ptrtoint of gep folds for chain of geps (PR #137323)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Expand constant multiplication for targets without M extension (PR #137195)   Iris Shi via llvm-commits
• [llvm] [RISCV] Expand constant multiplication for targets without M extension (PR #137195)   Iris Shi via llvm-commits
• [llvm] [RISCV] Expand constant multiplication for targets without M extension (PR #137195)   Iris Shi via llvm-commits
• [llvm] [GOFF] Fix buffer overflow for ED with offset (PR #137463)   via llvm-commits
• [llvm] [GOFF] Fix buffer overflow for ED with offset (PR #137463)   via llvm-commits
• [llvm] [GOFF] Fix buffer overflow for ED with offset (PR #137463)   via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Leon Clark via llvm-commits
• [llvm] [GOFF] Fix buffer overflow for ED with offset (PR #137463)   via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Leon Clark via llvm-commits
• [llvm] [Inliner] Fix Issue #45778: Inliner now respects the alignment of parameters passed by value (PR #137455)   via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   Aiden Grossman via llvm-commits
• [llvm] [RISCV] Expand constant multiplication for targets without M extension (PR #137195)   Max Graey via llvm-commits
• [llvm] [RISCV] Expand constant multiplication for targets without M extension (PR #137195)   Max Graey via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   Aiden Grossman via llvm-commits
• [llvm] [X86] Add support for `__bf16` to `f16` conversion (PR #134859)   Antonio Frighetto via llvm-commits
• [llvm] [X86] Add support for `__bf16` to `f16` conversion (PR #134859)   Antonio Frighetto via llvm-commits
• [llvm] [X86] Improve `__bf16` code generation (PR #134859)   Antonio Frighetto via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   Aiden Grossman via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Leon Clark via llvm-commits
• [llvm] [WIP] Adding Support for a unified ABI Lowering Library (PR #133886)   via llvm-commits
• [llvm] [WIP] Adding Support for a unified ABI Lowering Library (PR #133886)   via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Leon Clark via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   via llvm-commits
• [llvm] [mlir] [CMake] Do not set CMP0116 explicitly to old (PR #90385)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Leon Clark via llvm-commits
• [llvm] [WebAssembly] Enable a limited amount of stackification for debug code (PR #136510)   via llvm-commits
• [llvm] [Inliner] Fix Issue #45778: Inliner now respects the alignment of parameters passed by value (PR #137455)   Nikita Popov via llvm-commits
• [llvm] [Inliner] Preserve alignment of byval arguments (PR #137455)   Nikita Popov via llvm-commits
• [llvm] 419a2cb - [Inliner] Preserve alignment of byval arguments (#137455)   via llvm-commits
• [llvm] [Inliner] Preserve alignment of byval arguments (PR #137455)   Nikita Popov via llvm-commits
• [llvm] [Inliner] Preserve alignment of byval arguments (PR #137455)   via llvm-commits
• [llvm] [AMDGPU][Verifier] Check address space of `alloca` instruction (PR #135820)   Nikita Popov via llvm-commits
• [llvm] 165acd3 - [LLVM-C] Support debug info for enumerators of arbitrary sizes (#76735)   via llvm-commits
• [llvm] [LLVM-C] Support debug info for enumerators of arbitrary sizes (PR #76735)   Nikita Popov via llvm-commits
• [llvm] llvm-reduce: Add values to return reduction (PR #132686)   Nikita Popov via llvm-commits
• [llvm] [llvm] Use llvm::copy (NFC) (PR #137470)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use llvm::copy (NFC) (PR #137470)   via llvm-commits
• [llvm] [llvm] Use llvm::copy (NFC) (PR #137470)   via llvm-commits
• [llvm] [llvm] Use llvm::copy (NFC) (PR #137470)   via llvm-commits
• [llvm] [llvm] Use llvm::copy (NFC) (PR #137470)   via llvm-commits
• [llvm] [llvm] Use llvm::copy (NFC) (PR #137470)   via llvm-commits
• [llvm] [Inliner] Preserve alignment of byval arguments (PR #137455)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [sanitizer_common] Remove interceptors for deprecated struct termio (PR #137403)   Tom Stellard via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPPhiAccessors to provide interface for phi recipes (NFC) (PR #129388)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPPhiAccessors to provide interface for phi recipes (NFC) (PR #129388)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPPhiAccessors to provide interface for phi recipes (NFC) (PR #129388)   Florian Hahn via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [llvm] 826f237 - [VPlan] Don't added separate vector latch block (NFC).   Florian Hahn via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Brox Chen via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [llvm] [VPlan] Manage noalias/alias_scope metadata in VPlan. (NFC) (PR #136450)   via llvm-commits
• [llvm] [VPlan] Manage noalias/alias_scope metadata in VPlan. (NFC) (PR #136450)   via llvm-commits
• [llvm] [VPlan] Manage noalias/alias_scope metadata in VPlan. (NFC) (PR #136450)   via llvm-commits
• [llvm] [VPlan] Manage noalias/alias_scope metadata in VPlan. (NFC) (PR #136450)   via llvm-commits
• [llvm] [VPlan] Manage noalias/alias_scope metadata in VPlan. (NFC) (PR #136450)   via llvm-commits
• [llvm] [VPlan] Manage noalias/alias_scope metadata in VPlan. (NFC) (PR #136450)   via llvm-commits
• [llvm] [VPlan] Manage noalias/alias_scope metadata in VPlan. (NFC) (PR #136450)   via llvm-commits
• [llvm] [VPlan] Manage noalias/alias_scope metadata in VPlan. (NFC) (PR #136450)   via llvm-commits
• [llvm] [VPlan] Manage noalias/alias_scope metadata in VPlan. (NFC) (PR #136450)   via llvm-commits
• [llvm] [VPlan] Manage noalias/alias_scope metadata in VPlan. (NFC) (PR #136450)   via llvm-commits
• [llvm] [VPlan] Manage noalias/alias_scope metadata in VPlan. (NFC) (PR #136450)   via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [llvm] fd3ca29 - [lit] Support GoogleTest test discovery through prefixes, too (#137423)   via llvm-commits
• [llvm] [lit] Support GoogleTest test discovery through prefixes, too (PR #137423)   Jon Roelofs via llvm-commits
• [llvm] [lit] Support GoogleTest test discovery through prefixes, too (PR #137423)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   via llvm-commits
• [llvm] [llvm] Use llvm::copy (NFC) (PR #137470)   Jakub Kuderski via llvm-commits
• [compiler-rt] [compiler-rt] Make sure __clzdi2 doesn't call itself recursively on sparc64 (PR #136737)   via llvm-commits
• [llvm] [MemProf][NFC] Hoist size computation out of the loop for v3 (PR #137479)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf][NFC] Hoist size computation out of the loop for v3 (PR #137479)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf][NFC] Hoist size computation out of the loop for v3 (PR #137479)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf][NFC] Hoist size computation out of the loop for v3 (PR #137479)   Snehasish Kumar via llvm-commits
• [llvm] 8ba3a23 - [llvm] Use llvm::copy (NFC) (#137470)   via llvm-commits
• [llvm] [llvm] Use llvm::copy (NFC) (PR #137470)   Kazu Hirata via llvm-commits
• [llvm] [MemProf][NFC] Hoist size computation out of the loop for v3 (PR #137479)   via llvm-commits
• [llvm] [llvm] Use llvm::copy_if (NFC) (PR #137480)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use llvm::copy_if (NFC) (PR #137480)   via llvm-commits
• [llvm] [llvm] Use llvm::copy_if (NFC) (PR #137480)   via llvm-commits
• [llvm] [MemProf] Add v4 which contains CalleeGuids to CallSiteInfo. (PR #137394)   Snehasish Kumar via llvm-commits
• [llvm] [llvm] Use llvm::replace (NFC) (PR #137481)   Kazu Hirata via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [llvm] [llvm] Use llvm::replace (NFC) (PR #137481)   via llvm-commits
• [llvm] [llvm] Use llvm::replace (NFC) (PR #137481)   via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Brox Chen via llvm-commits
• [llvm] [llvm] Use llvm::copy_if (NFC) (PR #137480)   Shilei Tian via llvm-commits
• [llvm] [llvm] Use llvm::replace (NFC) (PR #137481)   Shilei Tian via llvm-commits
• [llvm] [llvm] Use llvm::replace (NFC) (PR #137481)   Shilei Tian via llvm-commits
• [llvm] [llvm] Use llvm::replace (NFC) (PR #137481)   Shilei Tian via llvm-commits
• [llvm] [llvm] Use llvm::replace (NFC) (PR #137481)   Shilei Tian via llvm-commits
• [llvm] [llvm] Use llvm::replace (NFC) (PR #137481)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Brox Chen via llvm-commits
• [llvm] [llvm] Use llvm::copy (NFC) (PR #137470)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm] Use llvm::replace (NFC) (PR #137481)   Kazu Hirata via llvm-commits
• [clang] [flang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Shilei Tian via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add a new amdgcn.load.to.lds intrinsic (PR #137425)   Shilei Tian via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add a new amdgcn.load.to.lds intrinsic (PR #137425)   Shilei Tian via llvm-commits
• [llvm] [llvm] Use llvm::copy_if (NFC) (PR #137480)   Jakub Kuderski via llvm-commits
• [llvm] [llvm] Use llvm::copy_if (NFC) (PR #137480)   Jakub Kuderski via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add a new amdgcn.load.to.lds intrinsic (PR #137425)   Shilei Tian via llvm-commits
• [llvm] [llvm] Use llvm::replace (NFC) (PR #137481)   Jakub Kuderski via llvm-commits
• [llvm] [IR] Use llvm::interleaved (NFC) (PR #137482)   Kazu Hirata via llvm-commits
• [llvm] [IR] Use llvm::interleaved (NFC) (PR #137482)   via llvm-commits
• [llvm] [TableGen] Use llvm::interleaved (NFC) (PR #137483)   Kazu Hirata via llvm-commits
• [llvm] [TableGen] Use llvm::interleaved (NFC) (PR #137483)   via llvm-commits
• [llvm] [IR] Use llvm::interleaved (NFC) (PR #137482)   Jakub Kuderski via llvm-commits
• [llvm] [TableGen] Use llvm::interleaved (NFC) (PR #137483)   Jakub Kuderski via llvm-commits
• [llvm] [llvm] Use llvm::copy_if (NFC) (PR #137480)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use llvm::copy_if (NFC) (PR #137480)   Kazu Hirata via llvm-commits
• [llvm] [TableGen] Use llvm::interleaved (NFC) (PR #137483)   Kazu Hirata via llvm-commits
• [llvm] [TableGen] Use llvm::interleaved (NFC) (PR #137483)   Jakub Kuderski via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Brox Chen via llvm-commits
• [lldb] [llvm] [lldb-dap] Migrating breakpointLocations request to use typed RequestHandler (PR #137426)   Ely Ronnen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Brox Chen via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   YunQiang Su via llvm-commits
• [llvm] DAGCombiner: Support fmaximum/fminimum and fmaximumnum/fminimumnum (PR #137318)   YunQiang Su via llvm-commits
• [llvm] [AMDGPU] fix up vop3p gisel errors (PR #136262)   via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [llvm] Add inreg bit convert tests (PR #136112)   via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: FMAXNUM/FMINNUM treat +0>-0 (PR #137367)   YunQiang Su via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [llvm] Add inreg bit convert tests (PR #136112)   via llvm-commits
• [llvm] [MemProf][NFC] Hoist size computation out of the loop for v3 (PR #137479)   Mingming Liu via llvm-commits
• [llvm] fda8b75 - [llvm] Use llvm::copy_if (NFC) (#137480)   via llvm-commits
• [llvm] [llvm] Use llvm::copy_if (NFC) (PR #137480)   Kazu Hirata via llvm-commits
• [llvm] 8210cdd - [llvm] Use llvm::replace (NFC) (#137481)   via llvm-commits
• [llvm] [llvm] Use llvm::replace (NFC) (PR #137481)   Kazu Hirata via llvm-commits
• [llvm] 654c00a - [IR] Use llvm::interleaved (NFC) (#137482)   via llvm-commits
• [llvm] [IR] Use llvm::interleaved (NFC) (PR #137482)   Kazu Hirata via llvm-commits
• [llvm] 4c1dc85 - [TableGen] Use llvm::interleaved (NFC) (#137483)   via llvm-commits
• [llvm] [TableGen] Use llvm::interleaved (NFC) (PR #137483)   Kazu Hirata via llvm-commits
• [llvm] [X86] Avoid zero extend i16 when inserting fp16 (PR #126194)   Shengchen Kan via llvm-commits
• [llvm] af223bc - [X86] Avoid zero extend i16 when inserting fp16 (#126194)   via llvm-commits
• [llvm] [X86] Avoid zero extend i16 when inserting fp16 (PR #126194)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (PR #137450)   Shengchen Kan via llvm-commits
• [llvm] [TableGen][NFC] Refactor/deduplicate emitAction. (PR #137434)   Jason Eckhardt via llvm-commits
• [clang] [llvm] [X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (PR #137450)   Phoebe Wang via llvm-commits
• [llvm] [polly] [CI] Fix command not found error in monolithic-linux (PR #137486)   Aiden Grossman via llvm-commits
• [llvm] [polly] [CI] Fix command not found error in monolithic-linux (PR #137486)   Aiden Grossman via llvm-commits
• [clang] [llvm] [WIP] Correct lowering of `fp128` intrinsics (PR #76558)   Trevor Gross via llvm-commits
• [llvm] [CI] Fix command not found error in monolithic-linux (PR #137486)   Aiden Grossman via llvm-commits
• [llvm] [CI] Fix command not found error in monolithic-linux (PR #137486)   Aiden Grossman via llvm-commits
• [llvm] [CI] Fix command not found error in monolithic-linux (PR #137486)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Make `getAssumedAddrSpace` return AS1 for pointer kernel arguments (PR #137488)   Shilei Tian via llvm-commits
• [llvm] [CI] Fix command not found error in monolithic-linux (PR #137486)   via llvm-commits
• [llvm] [AMDGPU] Make `getAssumedAddrSpace` return AS1 for pointer kernel arguments (PR #137488)   Shilei Tian via llvm-commits
• [llvm] [WIP][AMDGPU] Make `getAssumedAddrSpace` return AS1 for pointer kernel arguments (PR #137488)   Shilei Tian via llvm-commits
• [llvm] [WIP][AMDGPU] Make `getAssumedAddrSpace` return AS1 for pointer kernel arguments (PR #137488)   via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   Shilei Tian via llvm-commits
• [llvm] RISC-V: Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)   Pengcheng Wang via llvm-commits
• [llvm] 6c33735 - [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (#136842)   via llvm-commits
• [clang] [llvm] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (PR #136842)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (PR #136842)   Pengcheng Wang via llvm-commits
• [llvm] [CI] Hash pin CI python deps (PR #137489)   Aiden Grossman via llvm-commits
• [clang] [llvm] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (PR #136842)   via llvm-commits
• [clang] [llvm] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g` (PR #136842)   LLVM Continuous Integration via llvm-commits
• [llvm] RISC-V: Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)   YunQiang Su via llvm-commits
• [llvm] [RISCV] Expand constant multiplication for targets without M extension (PR #137195)   Iris Shi via llvm-commits
• [llvm] RISC-V: Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)   YunQiang Su via llvm-commits
• [llvm] [CI] Hash pin CI python deps (PR #137489)   Aiden Grossman via llvm-commits
• [llvm] [CI] Hash pin CI python deps (PR #137489)   Aiden Grossman via llvm-commits
• [llvm] RISC-V: Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)   Pengcheng Wang via llvm-commits
• [llvm] [Github] Install sccache from apt repo in CI container (PR #137491)   Aiden Grossman via llvm-commits
• [llvm] RISC-V: Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)   Pengcheng Wang via llvm-commits
• [llvm] [Github] Install sccache from apt repo in CI container (PR #137491)   via llvm-commits
• [llvm] [RISCV] Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for SpacemiT-X60 (PR #137343)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)   YunQiang Su via llvm-commits
• [clang] [llvm] [WIP] Correct lowering of `fp128` intrinsics (PR #76558)   Trevor Gross via llvm-commits
• [clang] [llvm] [WIP] Correct lowering of `fp128` intrinsics (PR #76558)   Trevor Gross via llvm-commits
• [clang] [llvm] [WIP] Correct lowering of `fp128` intrinsics (PR #76558)   Trevor Gross via llvm-commits
• [llvm] [Github] Install sccache from apt repo in CI container (PR #137491)   Tom Stellard via llvm-commits
• [llvm] [CI] Hash pin CI python deps (PR #137489)   Tom Stellard via llvm-commits
• [llvm] [AMDGPU] Use llvm::count_if (NFC) (PR #137492)   Kazu Hirata via llvm-commits
• [llvm] [AMDGPU] Use llvm::count_if (NFC) (PR #137492)   via llvm-commits
• [llvm] [AMDGPU] Use llvm::count_if (NFC) (PR #137492)   Jakub Kuderski via llvm-commits
• [llvm] [VPlan] Use correct constructor when cloning VPWidenIntrinsicRecipe without underlying CallInst (PR #137493)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use correct constructor when cloning VPWidenIntrinsicRecipe without underlying CallInst (PR #137493)   via llvm-commits
• [llvm] [VPlan] Use correct constructor when cloning VPWidenIntrinsicRecipe without underlying CallInst (PR #137493)   Luke Lau via llvm-commits
• [llvm] [Utils] Use llvm::partition (NFC) (PR #137494)   Kazu Hirata via llvm-commits
• [llvm] [ADT] Use llvm::partition_point (NFC) (PR #137495)   Kazu Hirata via llvm-commits
• [llvm] [Utils] Use llvm::partition (NFC) (PR #137494)   via llvm-commits
• [llvm] [ADT] Use llvm::partition_point (NFC) (PR #137495)   via llvm-commits
• [llvm] [llvm] Use llvm::interleaved (NFC) (PR #137496)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use llvm::interleaved (NFC) (PR #137496)   via llvm-commits
• [llvm] [Utils] Use llvm::partition (NFC) (PR #137494)   Jakub Kuderski via llvm-commits
• [llvm] [llvm] Use llvm::interleaved (NFC) (PR #137496)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Use llvm::partition_point (NFC) (PR #137495)   Jakub Kuderski via llvm-commits
• [llvm] [RISCV] Widen i1 AnyOf reductions (PR #134898)   Luke Lau via llvm-commits
• [llvm] [VectorUtils][VPlan] Consolidate VPWidenIntrinsicRecipe::onlyFirstLaneUsed and isVectorIntrinsicWithScalarOpAtArg (PR #137497)   Luke Lau via llvm-commits
• [llvm] [VectorUtils][VPlan] Consolidate VPWidenIntrinsicRecipe::onlyFirstLaneUsed and isVectorIntrinsicWithScalarOpAtArg (PR #137497)   via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   YunQiang Su via llvm-commits
• [llvm] [COFF] Preserve UniqueID used to create MCSectionCOFF (PR #123869)   Haohai Wen via llvm-commits
• [llvm] a87d8e9 - [X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)   via llvm-commits
• [clang] [llvm] [X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (PR #137450)   Phoebe Wang via llvm-commits
• [llvm] [RISCV] Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (PR #137450)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV][NFC] Remove attributes in pr107950.ll (PR #137500)   Pengcheng Wang via llvm-commits
• [llvm] 4f71e1e - [AMDGPU] Use llvm::count_if (NFC) (#137492)   via llvm-commits
• [llvm] [AMDGPU] Use llvm::count_if (NFC) (PR #137492)   Kazu Hirata via llvm-commits
• [llvm] 9c356b2 - [Utils] Use llvm::partition (NFC) (#137494)   via llvm-commits
• [llvm] [Utils] Use llvm::partition (NFC) (PR #137494)   Kazu Hirata via llvm-commits
• [llvm] 60641e0 - [ADT] Use llvm::partition_point (NFC) (#137495)   via llvm-commits
• [llvm] [ADT] Use llvm::partition_point (NFC) (PR #137495)   Kazu Hirata via llvm-commits
• [llvm] 2e230f5 - [llvm] Use llvm::interleaved (NFC) (#137496)   via llvm-commits
• [llvm] [llvm] Use llvm::interleaved (NFC) (PR #137496)   Kazu Hirata via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Christudasan Devadasan via llvm-commits
• [clang] [llvm] [ARM] Adding diagnostics for mcmodel=tiny when used in invalid targets (PR #125643)   via llvm-commits
• [clang] [llvm] [WIP] Correct lowering of `fp128` intrinsics (PR #76558)   Trevor Gross via llvm-commits
• [clang] [llvm] [WIP] Correct lowering of `fp128` intrinsics (PR #76558)   Trevor Gross via llvm-commits
• [llvm] [AMDGPU] Simplify PrintField::printField (NFC) (PR #137502)   Kazu Hirata via llvm-commits
• [llvm] [AMDGPU] Simplify PrintField::printField (NFC) (PR #137502)   via llvm-commits
• [llvm] [IR] Simplify isRequired and passIsRequiredImpl (NFC) (PR #137503)   Kazu Hirata via llvm-commits
• [llvm] [PassSupport] Simplify callDefaultCtor (NFC) (PR #137504)   Kazu Hirata via llvm-commits
• [llvm] [IR] Simplify isRequired and passIsRequiredImpl (NFC) (PR #137503)   via llvm-commits
• [llvm] [Scalar] Simplify addPass and createFunctionToLoopPassAdaptor (NFC) (PR #137505)   Kazu Hirata via llvm-commits
• [llvm] [Scalar] Simplify addPass and createFunctionToLoopPassAdaptor (NFC) (PR #137505)   via llvm-commits
• [llvm] e43d64e - [RISCV] Sink vp.splat operands of VP intrinsic. (#133245)   via llvm-commits
• [llvm] [RISCV] Sink vp.splat operands of VP intrinsic. (PR #133245)   via llvm-commits
• [clang] [llvm] [WIP] Correct lowering of `fp128` intrinsics (PR #76558)   Trevor Gross via llvm-commits
• [llvm] [IR] Simplify isRequired and passIsRequiredImpl (NFC) (PR #137503)   Nikita Popov via llvm-commits
• [llvm] [PassSupport] Simplify callDefaultCtor (NFC) (PR #137504)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Simplify PrintField::printField (NFC) (PR #137502)   Nikita Popov via llvm-commits
• [llvm] Attributor: Add noalias.addrspace attribute for store and load (PR #136553)   via llvm-commits
• [llvm] [Scalar] Simplify addPass and createFunctionToLoopPassAdaptor (NFC) (PR #137505)   Nikita Popov via llvm-commits
• [llvm] [VE] Add missing dependency on TargetParser (PR #137507)   Sergei Barannikov via llvm-commits
• [llvm] [WIP][AMDGPU] Make `getAssumedAddrSpace` return AS1 for pointer kernel arguments (PR #137488)   Matt Arsenault via llvm-commits
• [llvm] edb05c4 - [VE] Add missing dependency on TargetParser   Sergei Barannikov via llvm-commits
• [llvm] [WIP][AMDGPU] Make `getAssumedAddrSpace` return AS1 for pointer kernel arguments (PR #137488)   Matt Arsenault via llvm-commits
• [llvm] [VE] Add missing dependency on TargetParser (PR #137507)   Sergei Barannikov via llvm-commits
• [llvm] [VE] Add missing dependency on TargetParser (PR #137507)   Sergei Barannikov via llvm-commits
• [llvm] SelectionDAG: Support nofpclass with zero/pzero/nzero (PR #137305)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Match (ext (op a, b)) to (wop a, b) (PR #137508)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Match (ext (op a, b)) to (wop a, b) (PR #137508)   via llvm-commits
• [llvm] [AMDGPU] Extend wave reduce intrinsics for i32 type (PR #126469)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Extend wave reduce intrinsics for i32 type (PR #126469)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Extend wave reduce intrinsics for i32 type (PR #126469)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Extend wave reduce intrinsics for i32 type (PR #126469)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Sink vp.splat operands of VP intrinsic. (PR #133245)   LLVM Continuous Integration via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   via llvm-commits
• [llvm] [RISCV] Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)   YunQiang Su via llvm-commits
• [clang] [lld] [llvm] [X86] Implement disabling APX relocations and EPGR/NDD instrs for relocations (PR #136660)   Feng Zou via llvm-commits
• [clang] [lld] [llvm] [X86] Add pass to suppress EPGR/NDD instructions for relocations (PR #136660)   Feng Zou via llvm-commits
• [clang] [lld] [llvm] [X86] Add pass to suppress EPGR/NDD instructions for relocations (PR #136660)   Feng Zou via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   YunQiang Su via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   via llvm-commits
• [llvm] SelectionDAG: Support nofpclass with zero/pzero/nzero (PR #137305)   YunQiang Su via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [llvm] [WIP] Correct lowering of `fp128` intrinsics (PR #76558)   Trevor Gross via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   via llvm-commits
• [llvm] [RISCV] Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)   Pengcheng Wang via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [lldb] [llvm] [lldb-dap] Migrating breakpointLocations request to use typed RequestHandler (PR #137426)   Ely Ronnen via llvm-commits
• [llvm] [RISCV] Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)   YunQiang Su via llvm-commits
• [llvm] [RISCV] Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Match (ext (op a, b)) to (wop a, b) (PR #137508)   via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Simon Pilgrim via llvm-commits
• [llvm] [RISCV][NFC] Remove attributes in pr107950.ll (PR #137500)   Luke Lau via llvm-commits
• [llvm] [RISCV][NFC] Remove attributes in pr107950.ll (PR #137500)   Luke Lau via llvm-commits
• [llvm] [RISCV] Match (ext (op a, b)) to (wop a, b) (PR #137508)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Match (ext (op a, b)) to (wop a, b) (PR #137508)   Pengcheng Wang via llvm-commits
• [llvm] [Support] Recognise the '+' char for positive integers (PR #135856)   Ebuka Ezike via llvm-commits
• [llvm] e9a34e4 - [RISCV] Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (#135727)   via llvm-commits
• [llvm] [InstCombine] Fix ninf propagation for fcmp+sel -> minmax (PR #136433)   Nikita Popov via llvm-commits
• [llvm] [RISCV] Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)   YunQiang Su via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add a new amdgcn.load.to.lds intrinsic (PR #137425)   Jay Foad via llvm-commits
• [llvm] [RISCV][NFC] Remove attributes in pr107950.ll (PR #137500)   Pengcheng Wang via llvm-commits
• [llvm] 9b39c82 - [RISCV][NFC] Remove attributes in pr107950.ll (#137500)   via llvm-commits
• [llvm] [RISCV][NFC] Remove attributes in pr107950.ll (PR #137500)   Pengcheng Wang via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   Nikita Popov via llvm-commits
• [llvm] [RISCV] Match (ext (op a, b)) to (wop a, b) (PR #137508)   Pengcheng Wang via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   via llvm-commits
• [llvm] [RISCV] Match (ext (op a, b)) to (wop a, b) (PR #137508)   via llvm-commits
• [llvm] [JumpThreading][GVN] Copy metadata when inserting preload into preds (PR #134403)   Nikita Popov via llvm-commits
• [llvm] [Github] Install sccache from apt repo in CI container (PR #137491)   George Burgess IV via llvm-commits
• [llvm] [RISCV] Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)   LLVM Continuous Integration via llvm-commits
• [llvm] [SLPVectorizer] Use accurate cost for external users of resize shuffles (PR #137419)   Alexey Bataev via llvm-commits
• [llvm] [SLPVectorizer] Use accurate cost for external users of resize shuffles (PR #137419)   Alexey Bataev via llvm-commits
• [llvm] [SLPVectorizer] Use accurate cost for external users of resize shuffles (PR #137419)   Alexey Bataev via llvm-commits
• [llvm] [SLPVectorizer] Use accurate cost for external users of resize shuffles (PR #137419)   Alexey Bataev via llvm-commits
• [llvm] [DAG] Use SDValue for PatFrag checks (PR #137519)   David Green via llvm-commits
• [llvm] [DAG] Use SDValue for PatFrag checks (PR #137519)   via llvm-commits
• [llvm] [DAG] Use SDValue for PatFrag checks (PR #137519)   via llvm-commits
• [llvm] [DAG] Use SDValue for PatFrag checks (PR #137519)   via llvm-commits
• [llvm] [DAG] Use SDValue for PatFrag checks (PR #137519)   via llvm-commits
• [llvm] [LV][LAA][NFC]Add a test with non-power-of-2 store-load forward distance, NFC (PR #136710)   Florian Hahn via llvm-commits
• [llvm] [LV][LAA][NFC]Add a test with non-power-of-2 store-load forward distance, NFC (PR #136710)   Florian Hahn via llvm-commits
• [llvm] [LV][LAA][NFC]Add a test with non-power-of-2 store-load forward distance, NFC (PR #136710)   Florian Hahn via llvm-commits
• [llvm] [LV][LAA][NFC]Add a test with non-power-of-2 store-load forward distance, NFC (PR #136710)   Florian Hahn via llvm-commits
• [llvm] [LV][LAA][NFC]Add a test with non-power-of-2 store-load forward distance, NFC (PR #136710)   Florian Hahn via llvm-commits
• [llvm] [LV][LAA][NFC]Add a test with non-power-of-2 store-load forward distance, NFC (PR #136710)   Florian Hahn via llvm-commits
• [llvm] [LV][LAA][NFC]Add a test with non-power-of-2 store-load forward distance, NFC (PR #136710)   Florian Hahn via llvm-commits
• [llvm] [LV][LAA][NFC]Add a test with non-power-of-2 store-load forward distance, NFC (PR #136710)   Florian Hahn via llvm-commits
• [llvm] [LV][LAA][NFC]Add a test with non-power-of-2 store-load forward distance, NFC (PR #136710)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use correct constructor when cloning VPWidenIntrinsicRecipe without underlying CallInst (PR #137493)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Add facts about non-poison intrinsics on demand (PR #136558)   Nikita Popov via llvm-commits
• [llvm] [flang][OpenMP] Mark atomic clauses as unique (PR #137460)   Krzysztof Parzyszek via llvm-commits
• [clang] [flang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   Joey Fernau via llvm-commits
• [clang] [flang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   Joey Fernau via llvm-commits
• [clang] [flang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   Joey Fernau via llvm-commits
• [clang] [flang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [clang] [flang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [llvm] [Github] Install sccache from apt repo in CI container (PR #137491)   Aiden Grossman via llvm-commits
• [llvm] [CI] Hash pin CI python deps (PR #137489)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Offset both sides of an equality icmp (PR #134086)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Offset both sides of an equality icmp (PR #134086)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Offset both sides of an equality icmp (PR #134086)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Offset both sides of an equality icmp (PR #134086)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Offset both sides of an equality icmp (PR #134086)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Infer `X | Y != 0` from `X != Y` (PR #117443)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   via llvm-commits
• [llvm] [AArch64] Use pattern to select bf16 fpextend (PR #137212)   David Green via llvm-commits
• [llvm] cbd3283 - [AMDGPU] Simplify PrintField::printField (NFC) (#137502)   via llvm-commits
• [llvm] [AMDGPU] Simplify PrintField::printField (NFC) (PR #137502)   Kazu Hirata via llvm-commits
• [llvm] 49eb7d0 - [IR] Simplify isRequired and passIsRequiredImpl (NFC) (#137503)   via llvm-commits
• [llvm] [IR] Simplify isRequired and passIsRequiredImpl (NFC) (PR #137503)   Kazu Hirata via llvm-commits
• [llvm] 8c73fee - [PassSupport] Simplify callDefaultCtor (NFC) (#137504)   via llvm-commits
• [llvm] [PassSupport] Simplify callDefaultCtor (NFC) (PR #137504)   Kazu Hirata via llvm-commits
• [llvm] 1395e0a - [Scalar] Simplify addPass and createFunctionToLoopPassAdaptor (NFC) (#137505)   via llvm-commits
• [llvm] [Scalar] Simplify addPass and createFunctionToLoopPassAdaptor (NFC) (PR #137505)   Kazu Hirata via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   via llvm-commits
• [clang] [flang] [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)   via llvm-commits
• [llvm] [InstCombine] Infer exact for lshr by cttz (PR #136696)   via llvm-commits
• [llvm] [SystemZ] Fix compile time regression in adjustInliningThreshold(). (PR #137527)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Fix compile time regression in adjustInliningThreshold(). (PR #137527)   via llvm-commits
• [llvm] [SystemZ] Fix compile time regression in adjustInliningThreshold(). (PR #137527)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Fix compile time regression in adjustInliningThreshold(). (PR #137527)   Nikita Popov via llvm-commits
• [llvm] [SystemZ] Fix compile time regression in adjustInliningThreshold(). (PR #137527)   Nikita Popov via llvm-commits
• [llvm] [SystemZ] Fix compile time regression in adjustInliningThreshold(). (PR #137527)   Nikita Popov via llvm-commits
• [llvm] [SystemZ] Fix compile time regression in adjustInliningThreshold(). (PR #137527)   Nikita Popov via llvm-commits
• [llvm] [SystemZ] Fix compile time regression in adjustInliningThreshold(). (PR #137527)   Nikita Popov via llvm-commits
• [clang] [llvm] [LLVM][Clang][Cygwin] Fix building Clang for Cygwin (PR #134494)   Mateusz Mikuła via llvm-commits
• [llvm] [Support] Simplify setDefaultImpl (NFC) (PR #137528)   Kazu Hirata via llvm-commits
• [llvm] [Support] Simplify setDefaultImpl (NFC) (PR #137528)   via llvm-commits
• [llvm] [Support] Simplify mapOptionalWithContext (NFC) (PR #137529)   Kazu Hirata via llvm-commits
• [llvm] [Support] Simplify mapOptionalWithContext (NFC) (PR #137529)   via llvm-commits
• [llvm] [llvm] Use hash_combine_range with ranges (NFC) (PR #137530)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use hash_combine_range with ranges (NFC) (PR #137530)   via llvm-commits
• [llvm] [llvm] Use hash_combine_range with ranges (NFC) (PR #137530)   via llvm-commits
• [llvm] [llvm] Use llvm::interleaved (NFC) (PR #137531)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use llvm::interleaved (NFC) (PR #137531)   via llvm-commits
• [llvm] [llvm] Use llvm::transform (NFC) (PR #137532)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use llvm::transform (NFC) (PR #137532)   via llvm-commits
• [llvm] [llvm] Use llvm::transform (NFC) (PR #137532)   via llvm-commits
• [llvm] [NFC][AMDGPU] Auto generate check lines for some codegen tests (PR #137534)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Auto generate check lines for some codegen tests (PR #137534)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Auto generate check lines for some codegen tests (PR #137534)   via llvm-commits
• [llvm] [NFC][AMDGPU] Auto generate check lines for some codegen tests (PR #137534)   via llvm-commits
• [llvm] [SystemZ] Fix compile time regression in adjustInliningThreshold(). (PR #137527)   Jonas Paulsson via llvm-commits
• [llvm] [WIP][AMDGPU] Make `getAssumedAddrSpace` return AS1 for pointer kernel arguments (PR #137488)   Shilei Tian via llvm-commits
• [llvm] [WIP][AMDGPU] Make `getAssumedAddrSpace` return AS1 for pointer kernel arguments (PR #137488)   Shilei Tian via llvm-commits
• [llvm] [llvm] Make charset constexpr (NFC) (PR #137535)   Aaron Gokaslan via llvm-commits
• [llvm] [llvm] Make charset constexpr (NFC) (PR #137535)   via llvm-commits
• [llvm] [llvm] Make charset constexpr (NFC) (PR #137535)   via llvm-commits
• [compiler-rt] [sanitizer_common][asan] Implement address sanitizer on AIX: interceptors (5/n) (PR #131870)   Jake Egan via llvm-commits
• [compiler-rt] [sanitizer_common][asan] Implement address sanitizer on AIX: interceptors (5/n) (PR #131870)   Jake Egan via llvm-commits
• [llvm] [DAG] Use SDValue for PatFrag checks (PR #137519)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Simplify GetMember...::Get (NFC) (PR #137536)   Kazu Hirata via llvm-commits
• [llvm] [AMDGPU] Simplify GetMember...::Get (NFC) (PR #137536)   via llvm-commits
• [llvm] [Support] Simplify yamlizeMappingEnumInput (NFC) (PR #137537)   Kazu Hirata via llvm-commits
• [llvm] [Support] Simplify yamlizeMappingEnumInput (NFC) (PR #137537)   via llvm-commits
• [llvm] [TableGen] Simplify insertBits (NFC) (PR #137538)   Kazu Hirata via llvm-commits
• [llvm] [TableGen] Simplify insertBits (NFC) (PR #137538)   via llvm-commits
• [llvm] [llvm] Add NodeMetadata::optUnsafeEdges (NFC) (PR #137539)   Kazu Hirata via llvm-commits
• [lldb] [llvm] [lldb-dap] Migrating breakpointLocations request to use typed RequestHandler (PR #137426)   John Harrison via llvm-commits
• [llvm] [AMDGPU] Update code object metadata for kernarg preload (PR #134666)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Update code object metadata for kernarg preload (PR #134666)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Update code object metadata for kernarg preload (PR #134666)   Austin Kerbow via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] fix msghdr for musl (PR #136195)   Deák Lajos via llvm-commits
• [llvm] 72bc052 - [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (#135053)   via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   Brox Chen via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   John Harrison via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   John Harrison via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   John Harrison via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   John Harrison via llvm-commits
• [clang] [lld] [llvm] [mlir] [NFC] Use more isa and isa_and_nonnull instead dyn_cast for predicates (PR #137393)   Balazs Benics via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)   LLVM Continuous Integration via llvm-commits
• [llvm] [Support] Simplify setDefaultImpl (NFC) (PR #137528)   Nikita Popov via llvm-commits
• [llvm] [Support] Simplify mapOptionalWithContext (NFC) (PR #137529)   Nikita Popov via llvm-commits
• [llvm] [Support] Simplify mapOptionalWithContext (NFC) (PR #137529)   Nikita Popov via llvm-commits
• [llvm] [llvm] Use hash_combine_range with ranges (NFC) (PR #137530)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Simplify GetMember...::Get (NFC) (PR #137536)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Simplify GetMember...::Get (NFC) (PR #137536)   Nikita Popov via llvm-commits
• [llvm] [Support] Simplify yamlizeMappingEnumInput (NFC) (PR #137537)   Nikita Popov via llvm-commits
• [llvm] [Support] Simplify yamlizeMappingEnumInput (NFC) (PR #137537)   Nikita Popov via llvm-commits
• [llvm] [TableGen] Simplify insertBits (NFC) (PR #137538)   Nikita Popov via llvm-commits
• [llvm] [SystemZ] Fix compile time regression in adjustInliningThreshold(). (PR #137527)   Nikita Popov via llvm-commits
• [llvm] [llvm] Use llvm::interleaved (NFC) (PR #137531)   Jakub Kuderski via llvm-commits
• [llvm] [llvm] Use llvm::transform (NFC) (PR #137532)   Jakub Kuderski via llvm-commits
• [llvm] [llvm] Add NodeMetadata::optUnsafeEdges (NFC) (PR #137539)   Nikita Popov via llvm-commits
• [llvm] [llvm] Add NodeMetadata::optUnsafeEdges (NFC) (PR #137539)   Jakub Kuderski via llvm-commits
• [llvm] [llvm] Add NodeMetadata::optUnsafeEdges (NFC) (PR #137539)   Jakub Kuderski via llvm-commits
• [llvm] [NFC][LLVM][CodeGen] Refactor MIR Printer (PR #137361)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM][CodeGen] Refactor MIR Printer (PR #137361)   Rahul Joshi via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Add a new amdgcn.load.to.lds intrinsic (PR #137425)   Jakub Kuderski via llvm-commits
• [llvm] [Support] Simplify mapOptionalWithContext (NFC) (PR #137529)   Kazu Hirata via llvm-commits
• [llvm] [NFC][LLVM][CodeGen] Refactor MIR Printer (PR #137361)   Rahul Joshi via llvm-commits
• [llvm] [Support] Simplify mapOptionalWithContext (NFC) (PR #137529)   Kazu Hirata via llvm-commits
• [llvm] 2e93417 - [LV] Remove LoopVectorizationLegality from InnerLoopVectorizer (NFC).   Florian Hahn via llvm-commits
• [llvm] 1f56716 - [llvm] Use hash_combine_range with ranges (NFC) (#137530)   via llvm-commits
• [llvm] [llvm] Use hash_combine_range with ranges (NFC) (PR #137530)   Kazu Hirata via llvm-commits
• [llvm] 89b3de6 - [llvm] Use llvm::interleaved (NFC) (#137531)   via llvm-commits
• [llvm] [llvm] Use llvm::interleaved (NFC) (PR #137531)   Kazu Hirata via llvm-commits
• [llvm] 52fcb07 - [llvm] Use llvm::transform (NFC) (#137532)   via llvm-commits
• [llvm] [llvm] Use llvm::transform (NFC) (PR #137532)   Kazu Hirata via llvm-commits
• [llvm] [AMDGPU] Simplify GetMember...::Get (NFC) (PR #137536)   Kazu Hirata via llvm-commits
• [llvm] [Support] Simplify yamlizeMappingEnumInput (NFC) (PR #137537)   Jakub Kuderski via llvm-commits
• [llvm] [llvm] Make charset constexpr (NFC) (PR #137535)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Simplify GetMember...::Get (NFC) (PR #137536)   Kazu Hirata via llvm-commits
• [llvm] [TableGen] Simplify insertBits (NFC) (PR #137538)   Jakub Kuderski via llvm-commits
• [llvm] 3170599 - [Support] Simplify yamlizeMappingEnumInput (NFC) (#137537)   via llvm-commits
• [llvm] [Support] Simplify yamlizeMappingEnumInput (NFC) (PR #137537)   Kazu Hirata via llvm-commits
• [llvm] [Support] Simplify mapOptionalWithContext (NFC) (PR #137529)   Jakub Kuderski via llvm-commits
• [llvm] f4d3a0c - [TableGen] Simplify insertBits (NFC) (#137538)   via llvm-commits
• [llvm] [TableGen] Simplify insertBits (NFC) (PR #137538)   Kazu Hirata via llvm-commits
• [compiler-rt] [compiler-rt] Detect arm hardfloat targets via __ARM_PCS_VFP (PR #137175)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Invert condition if needed when creating inner regions. (PR #132292)   Florian Hahn via llvm-commits
• [llvm] [llvm] Use llvm::interleaved (NFC) (PR #137496)   Florian Hahn via llvm-commits
• [llvm] [Support] Simplify setDefaultImpl (NFC) (PR #137528)   Kazu Hirata via llvm-commits
• [llvm] [Support] Simplify setDefaultImpl (NFC) (PR #137528)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Add NodeMetadata::optUnsafeEdges (NFC) (PR #137539)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Add NodeMetadata::optUnsafeEdges (NFC) (PR #137539)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Add NodeMetadata::optUnsafeEdges (NFC) (PR #137539)   Kazu Hirata via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [Support] Simplify setDefaultImpl (NFC) (PR #137528)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (PR #113903)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] Simplify phi using KnownBits of condition (PR #134712)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Simplify phi using KnownBits of condition (PR #134712)   Andreas Jonson via llvm-commits
• [llvm] [llvm] Add NodeMetadata::optUnsafeEdges (NFC) (PR #137539)   Nikita Popov via llvm-commits
• [llvm] cleanup 001 PBQP Owning (PR #137546)   Kazu Hirata via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   Eli Friedman via llvm-commits
• [llvm] [llvm] Add NodeMetadata::optUnsafeEdges (NFC) (PR #137539)   Kazu Hirata via llvm-commits
• [llvm] cleanup 001 PBQP Owning (PR #137546)   Kazu Hirata via llvm-commits
• [llvm] cleanup 001 PBQP Owning (PR #137546)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use OwningArrayRef in NodeMetadata (NFC) (PR #137539)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use OwningArrayRef in NodeMetadata (NFC) (PR #137539)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use OwningArrayRef in NodeMetadata (NFC) (PR #137539)   Kazu Hirata via llvm-commits
• [llvm] [CodeGen] Use OwningArrayRef in PBQP::Vector (NFC) (PR #137548)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use OwningArrayRef in NodeMetadata (NFC) (PR #137539)   Nikita Popov via llvm-commits
• [llvm] [llvm] Use OwningArrayRef in NodeMetadata (NFC) (PR #137539)   Nikita Popov via llvm-commits
• [llvm] [llvm] Use OwningArrayRef in NodeMetadata (NFC) (PR #137539)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Use OwningArrayRef in PBQP::Vector (NFC) (PR #137548)   Nikita Popov via llvm-commits
• [llvm] [llvm] Use OwningArrayRef in NodeMetadata (NFC) (PR #137539)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use OwningArrayRef in NodeMetadata (NFC) (PR #137539)   Nikita Popov via llvm-commits
• [llvm] 4ca8f65 - [Support] Simplify setDefaultImpl (NFC) (#137528)   via llvm-commits
• [llvm] [Support] Simplify setDefaultImpl (NFC) (PR #137528)   Kazu Hirata via llvm-commits
• [llvm] ebbe970 - [Support] Simplify mapOptionalWithContext (NFC) (#137529)   via llvm-commits
• [llvm] [Support] Simplify mapOptionalWithContext (NFC) (PR #137529)   Kazu Hirata via llvm-commits
• [llvm] fcd0664 - [AMDGPU] Simplify GetMember...::Get (NFC) (#137536)   via llvm-commits
• [llvm] [AMDGPU] Simplify GetMember...::Get (NFC) (PR #137536)   Kazu Hirata via llvm-commits
• [llvm] [AMDGPU] IGLP: Fix static variables (PR #137549)   Robert Imschweiler via llvm-commits
• [clang] [llvm] [LLVM][Clang][Cygwin] Fix building Clang for Cygwin (PR #134494)   Martin Storsjö via llvm-commits
• [llvm] [CodeGen] Use OwningArrayRef in NodeMetadata (NFC) (PR #137539)   Kazu Hirata via llvm-commits
• [llvm] 08beaa8 - [CodeGen] Use OwningArrayRef in NodeMetadata (NFC) (#137539)   via llvm-commits
• [llvm] [CodeGen] Use OwningArrayRef in NodeMetadata (NFC) (PR #137539)   Kazu Hirata via llvm-commits
• [llvm] [AMDGPU] IGLP: Fix static variables (PR #137549)   via llvm-commits
• [llvm] [AMDGPU] IGLP: Fixes for VMEM load detection and unsigned int handling (PR #135090)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] IGLP: Fixes for VMEM load detection and unsigned int handling (PR #135090)   Robert Imschweiler via llvm-commits
• [llvm] [CodeGen] Use OwningArrayRef in PBQP::Vector (NFC) (PR #137548)   Jakub Kuderski via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Leon Clark via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   Ely Ronnen via llvm-commits
• [llvm] [llvm] Use range constructors of *Set (NFC) (PR #137552)   Kazu Hirata via llvm-commits
• [llvm] 834d426 - [CodeGen] Use OwningArrayRef in PBQP::Vector (NFC) (#137548)   via llvm-commits
• [llvm] [CodeGen] Use OwningArrayRef in PBQP::Vector (NFC) (PR #137548)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use range constructors of *Set (NFC) (PR #137552)   via llvm-commits
• [llvm] [llvm] Use range constructors of *Set (NFC) (PR #137552)   via llvm-commits
• [llvm] [CodeGen] Use OwningArrayRef in PBQP::Vector (NFC) (PR #137548)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm] Use range constructors of *Set (NFC) (PR #137552)   Jakub Kuderski via llvm-commits
• [compiler-rt] [sanitizer_common][asan] Implement address sanitizer on AIX: interceptors (5/n) (PR #131870)   Jake Egan via llvm-commits
• [compiler-rt] [sanitizer_common][asan] Implement address sanitizer on AIX: interceptors (5/n) (PR #131870)   Jake Egan via llvm-commits
• [llvm] [CodeGen] Use OwningArrayRef in NodeMetadata (NFC) (PR #137539)   LLVM Continuous Integration via llvm-commits
• [llvm] 5cfd81b - [llvm] Use range constructors of *Set (NFC) (#137552)   via llvm-commits
• [llvm] [llvm] Use range constructors of *Set (NFC) (PR #137552)   Kazu Hirata via llvm-commits
• [llvm] [llvm] Use range constructors of *Set (NFC) (PR #137552)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen] Use llvm::is_detected (NFC) (PR #137561)   Kazu Hirata via llvm-commits
• [llvm] [IR] Use llvm::is_detected (NFC) (PR #137562)   Kazu Hirata via llvm-commits
• [llvm] [IR] Use llvm::is_detected (NFC) (PR #137562)   via llvm-commits
• [llvm] [CodeGen] Make hash_value a non-friend function (NFC) (PR #137564)   Kazu Hirata via llvm-commits
• [llvm] [PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (PR #133155)   zhijian lin via llvm-commits
• [llvm] [CodeGen] Use OwningArrayRef in NodeMetadata (NFC) (PR #137539)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [sanitizer_common][asan] Implement address sanitizer on AIX: interceptors (5/n) (PR #131870)   Jake Egan via llvm-commits
• [llvm] [CodeGen] Use llvm::is_detected (NFC) (PR #137561)   Jakub Kuderski via llvm-commits
• [llvm] [IR] Use llvm::is_detected (NFC) (PR #137562)   Jakub Kuderski via llvm-commits
• [llvm] [CodeGen] Make hash_value a non-friend function (NFC) (PR #137564)   Jakub Kuderski via llvm-commits
• [compiler-rt] [sanitizer_common][asan] Implement address sanitizer on AIX: interceptors (5/n) (PR #131870)   Jake Egan via llvm-commits
• [llvm] [CodeGen] Make hash_value a non-friend function (NFC) (PR #137564)   Kazu Hirata via llvm-commits
• [llvm] 3eab094 - [CodeGen] Use llvm::is_detected (NFC) (#137561)   via llvm-commits
• [llvm] [CodeGen] Use llvm::is_detected (NFC) (PR #137561)   Kazu Hirata via llvm-commits
• [llvm] e13b79c - [IR] Use llvm::is_detected (NFC) (#137562)   via llvm-commits
• [llvm] [IR] Use llvm::is_detected (NFC) (PR #137562)   Kazu Hirata via llvm-commits
• [llvm] LangRef: Clarify nsz on min/max operations for +0.0 vs -0.0 (PR #137567)   YunQiang Su via llvm-commits
• [llvm] LangRef: Clarify nsz on min/max operations for +0.0 vs -0.0 (PR #137567)   via llvm-commits
• [llvm] LangRef: Clarify nsz on min/max operations for +0.0 vs -0.0 (PR #137567)   YunQiang Su via llvm-commits
• [llvm] [llvm] Make charset constexpr (NFC) (PR #137535)   A. Jiang via llvm-commits
• [llvm] Clean up external users of GlobalValue::getGUID(StringRef) (PR #129644)   Owen Rodley via llvm-commits
• [llvm] Clean up external users of GlobalValue::getGUID(StringRef) (PR #129644)   Owen Rodley via llvm-commits
• [llvm] Store GUIDs in metadata (PR #133682)   Owen Rodley via llvm-commits
• [llvm] [CodeGen] Make hash_value a non-friend function (NFC) (PR #137564)   Jakub Kuderski via llvm-commits
• [llvm] [CodeGen] Make hash_value a non-friend function (NFC) (PR #137564)   Jakub Kuderski via llvm-commits
• [llvm] [X86][BreakFalseDeps] Using reverse order for undef register selection (PR #137569)   Phoebe Wang via llvm-commits
• [llvm] [X86][BreakFalseDeps] Using reverse order for undef register selection (PR #137569)   via llvm-commits
• [llvm] c6cec7b - [CodeGen] Make hash_value a non-friend function (NFC) (#137564)   via llvm-commits
• [llvm] [CodeGen] Make hash_value a non-friend function (NFC) (PR #137564)   Kazu Hirata via llvm-commits
• [clang] [llvm] [RISCV] Add Andes XAndesperf (Andes Performance) extension. (PR #135110)   Jim Lin via llvm-commits
• [llvm] Store GUIDs in metadata (PR #133682)   Owen Rodley via llvm-commits
• [llvm] Store GUIDs in metadata (PR #133682)   Owen Rodley via llvm-commits
• [llvm] Store GUIDs in metadata (PR #133682)   Owen Rodley via llvm-commits
• [llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)   Leon Clark via llvm-commits
• [llvm] c785ef8 - [gn] port 7afbffb5c2e4   Nico Weber via llvm-commits
• [llvm] 185ba02 - [RISCV] Widen i1 AnyOf reductions (#134898)   via llvm-commits
• [llvm] [RISCV] Widen i1 AnyOf reductions (PR #134898)   Luke Lau via llvm-commits
• [llvm] 92c3af7 - [VPlan] Use correct constructor when cloning VPWidenIntrinsicRecipe without underlying CallInst (#137493)   via llvm-commits
• [llvm] [VPlan] Use correct constructor when cloning VPWidenIntrinsicRecipe without underlying CallInst (PR #137493)   Luke Lau via llvm-commits
• [llvm] [CodeGen] Port MachineCFGPrinter to new pass manager (PR #137570)   via llvm-commits
• [llvm] [MIPS]Remove unnecessary SLL instructions on MIPS64el (PR #109386)   via llvm-commits
• [llvm] [VPlan] Remove no longer needed VP intrinsic handling in VPWidenIntrinsicRecipe::computeCost. NFCI (PR #137573)   Luke Lau via llvm-commits
• [llvm] [VPlan] Remove no longer needed VP intrinsic handling in VPWidenIntrinsicRecipe::computeCost. NFCI (PR #137573)   via llvm-commits
• [llvm] [CodeGen] Use OwningArrayRef in NodeMetadata (NFC) (PR #137539)   Qinkun Bao via llvm-commits
• [llvm] llvm-reduce: Add values to return reduction (PR #132686)   John Regehr via llvm-commits
• [llvm] Store GUIDs in metadata (PR #133682)   Owen Rodley via llvm-commits
• [compiler-rt] [ASan] Prevent ASan/LSan deadlock by preloading modules before error reporting (PR #131756)   via llvm-commits
• [llvm] Store GUIDs in metadata (PR #133682)   Owen Rodley via llvm-commits
• [llvm] Store GUIDs in metadata (PR #133682)   Owen Rodley via llvm-commits
• [llvm] Store GUIDs in metadata (PR #133682)   via llvm-commits
• [llvm] Store GUIDs in metadata (PR #133682)   via llvm-commits
• [llvm] Store GUIDs in metadata (PR #133682)   via llvm-commits
• [llvm] [CodeGen] Port MachineCFGPrinter to new pass manager (PR #137570)   via llvm-commits
• [llvm] [CodeGen] Port MachineCFGPrinter to new pass manager (PR #137570)   via llvm-commits
• [compiler-rt] [ASan] Prevent ASan/LSan deadlock by preloading modules before error reporting (PR #131756)   via llvm-commits
• [llvm] [LV][AArch64] Add test for fp128 fmuladd reduction.(NFC) (PR #137576)   Elvis Wang via llvm-commits
• [llvm] [LV][AArch64] Add test for fp128 fmuladd reduction.(NFC) (PR #137576)   via llvm-commits
• [llvm] [CodeGen] Port MachineUniformityAnalysis to new pass manager (PR #137578)   via llvm-commits
• [llvm] [CodeGen] Port MachineUniformityAnalysis to new pass manager (PR #137578)   via llvm-commits
• [llvm] [CodeGen] Port MachineUniformityAnalysis to new pass manager (PR #137578)   via llvm-commits
• [llvm] [WIP] Correct lowering of `fp128` intrinsics (PR #76558)   Trevor Gross via llvm-commits
• [llvm] [llvm] add gnu install dirs (PR #125376)   Tristan Ross via llvm-commits
• [llvm] 576be7b - [AArch64][SVE] Generate asrd instruction for positive pow-2 divisors … (#137151)   via llvm-commits
• [llvm] [AArch64][SVE] Generate asrd instruction for positive pow-2 divisors … (PR #137151)   Sushant Gokhale via llvm-commits
• [llvm] [AArch64][SVE] Generate asrd instruction for positive pow-2 divisors … (PR #137151)   Sushant Gokhale via llvm-commits
• [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)   Brox Chen via llvm-commits
• [llvm] [AArch64][SVE] Generate asrd instruction for pow-2 divisors … (PR #137151)   Sushant Gokhale via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Akhilesh Moorthy via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Akhilesh Moorthy via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Akhilesh Moorthy via llvm-commits
• [llvm] [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (PR #135424)   Akhilesh Moorthy via llvm-commits
• [clang] [llvm] [RISCV] Add Andes XAndesperf (Andes Performance) extension. (PR #135110)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Reduce code duplication between getStore, getTruncStore, and getIndexedStore. (PR #137435)   Craig Topper via llvm-commits
• [llvm] e17f07c - [SelectionDAG] Reduce code duplication between getStore, getTruncStore, and getIndexedStore. (#137435)   via llvm-commits
• [llvm] [SelectionDAG] Reduce code duplication between getStore, getTruncStore, and getIndexedStore. (PR #137435)   Craig Topper via llvm-commits
• [llvm] [WIP] Correct lowering of `fp128` intrinsics (PR #76558)   Trevor Gross via llvm-commits
• [llvm] 3579fc0 - [COFF] Preserve UniqueID used to create MCSectionCOFF (#123869)   via llvm-commits
• [llvm] [COFF] Preserve UniqueID used to create MCSectionCOFF (PR #123869)   Haohai Wen via llvm-commits
• [llvm] [llvm-exegesis] Error instead of aborting on verification failure (PR #137581)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Error instead of aborting on verification failure (PR #137581)   via llvm-commits
• [llvm] [CodeGen] Port MachineUniformityAnalysis to new pass manager (PR #137578)   via llvm-commits
• [llvm] [CodeGen] Port MachineUniformityAnalysis to new pass manager (PR #137578)   via llvm-commits
• [llvm] 6f6af49 - Clarify `lit`'s definition of failure and conditions when it exits with exit code 1 (#136190)   via llvm-commits
• [llvm] [GVN] Improve processBlock for instruction erasure (PR #131753)   Madhur Amilkanthwar via llvm-commits
• [llvm] Clarify `lit`'s definition of failure and conditions when it exits with exit code 1 (PR #136190)   James Henderson via llvm-commits
• [llvm] Clarify `lit`'s definition of failure and conditions when it exits with exit code 1 (PR #136190)   via llvm-commits
• [llvm] [SystemZ] Fix compile time regression in adjustInliningThreshold(). (PR #137527)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Fix compile time regression in adjustInliningThreshold(). (PR #137527)   Jonas Paulsson via llvm-commits
• [llvm] [WIP] Correct lowering of `fp128` intrinsics (PR #76558)   Trevor Gross via llvm-commits
• [llvm] [SystemZ] Fix compile time regression in adjustInliningThreshold(). (PR #137527)   Jonas Paulsson via llvm-commits
• [llvm] [WIP] Correct lowering of `fp128` intrinsics (PR #76558)   Trevor Gross via llvm-commits
• [lldb] [llvm] [lldb-dap] migrate set breakpoint requests (PR #137448)   John Harrison via llvm-commits
• [llvm] [SPIRV] Use the range constructor of SmallPtrSet (NFC) (PR #137583)   Kazu Hirata via llvm-commits
• [llvm] 34845ac - [LoongArch] Try to widen shuffle mask (#136081)   via llvm-commits
• [llvm] [LoongArch] Try to widen shuffle mask (PR #136081)   via llvm-commits
• [llvm] [SPIRV] Use the range constructor of SmallPtrSet (NFC) (PR #137583)   via llvm-commits
• [llvm] [WIP] Correct lowering of `fp128` intrinsics (PR #76558)   Trevor Gross via llvm-commits
• [llvm] Change `fp128` lowering to use `f128` functions by default (PR #76558)   Trevor Gross via llvm-commits
• [llvm] Change `fp128` lowering to use `f128` functions by default (PR #76558)   Trevor Gross via llvm-commits
• [llvm] [TableGen] Simplify a string comparison (NFC) (PR #137584)   Kazu Hirata via llvm-commits
• [llvm] [TableGen] Simplify a string comparison (NFC) (PR #137584)   via llvm-commits
• [llvm] [CodeGen] Port gc-empty-basic-blocks to new pass manager (PR #137585)   via llvm-commits
• [llvm] [Support] Construct SmallVector with ArrayRef (NFC) (PR #137586)   Kazu Hirata via llvm-commits
• [llvm] [Support] Construct SmallVector with ArrayRef (NFC) (PR #137586)   via llvm-commits
• [llvm] 0cd3fd4 - [RISCV][test] Add (add x, C) -> (sub x, -C) tests   Piotr Fusik via llvm-commits
• [llvm] [RISCV] Select (add x, C) -> (sub x, -C) if -C cheaper to materialize (PR #137309)   Piotr Fusik via llvm-commits
• [llvm] [RISCV] Select (add x, C) -> (sub x, -C) if -C cheaper to materialize (PR #137309)   Piotr Fusik via llvm-commits
• [llvm] Change `fp128` lowering to use `f128` functions by default (PR #76558)   Trevor Gross via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits
• [clang] [llvm] [PseudoProbe] Support emitting to COFF object (PR #123870)   Haohai Wen via llvm-commits
• [flang] [llvm] [mlir] [MLIR][OpenMP] Lowering nontemporal clause to LLVM IR for SIMD directive (PR #118751)   Kaviya Rajendiran via llvm-commits