[llvm] [SystemZ] Add DAGCombine for FCOPYSIGN to remove rounding. (PR #136131)

[Ulrich Weigand via llvm-commits]

uweigand wrote:

> @f12: ExpandFCOPYSIGN() calls getSignAsIntValue() which does a bitcast via memory as i16 is not legal. So it stores the 2 f16 bytes, and then loads an i8 back from the same address. Is this the right byte order in memory for an fp value (sign bit in byte at lowest address)?

This is correct (the sign bit is in the MSB, which ends up at the lowest address on a big-endian system).  It's still inefficient though ...

> Looking at CanCombineFCOPYSIGN_EXTEND_ROUND(), it seems that the reason the f128 case isn't handled in common code is that there is a specific guard against it because of x86. Maybe an option now would be to have a DAGCombine target hook that SystemZ would override, which would eventually be removed if x86 isel is improved per the comment. Or maybe just a comment there saying that the SystemZ handling could be removed if this changed?

I guess it would be worthwhile discussing this.  For now, I think this patch is fine - we can always remove the custom combiner if and when common code gets updated.


https://github.com/llvm/llvm-project/pull/136131