[llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)

[Simon Pilgrim via llvm-commits]

================
@@ -8690,6 +8690,33 @@ static SDValue lowerBuildVectorToBitOp(BuildVectorSDNode *Op, const SDLoc &DL,
   return LowerShift(Res, Subtarget, DAG);
 }
 
+/// Attempt to lower a BUILD_VECTOR of scalar values to a shuffle of splats
+/// representing a blend.
+static SDValue lowerBuildVectorAsBlend(BuildVectorSDNode *BVOp, SDLoc const &DL,
+                                       X86Subtarget const &Subtarget,
+                                       SelectionDAG &DAG) {
+  if (!Subtarget.hasAVX())
+    return {};
+
+  auto VT = BVOp->getSimpleValueType(0u);
+
+  if (VT == MVT::v4f64 && BVOp->getNumOperands() == 4u) {
+    SDValue Op0 = BVOp->getOperand(0u);
+    SDValue Op1 = BVOp->getOperand(1u);
+    SDValue Op2 = BVOp->getOperand(2u);
+    SDValue Op3 = BVOp->getOperand(3u);
+
+    // Match X,Y,Y,X inputs.
+    if (Op0 == Op3 && Op1 == Op2 && Op0 != Op1) {
----------------
RKSimon wrote:

This is far too specific, we just need to confirm that there are 2 active scalars:

1. collect the operands in a set/map
2. confirm there are 2 entries
3. create the shuffle blend mask on the fly.

Happy for this to kept as v4f64 for now, but we will need to generalise this for other types eventually - see acc335bfa7b00ab19bf9832870aaf207f587b48b

https://github.com/llvm/llvm-project/pull/135753