[llvm] [AMDGPU] Support block load/store for CSR (PR #130013)

[Simon Pilgrim via llvm-commits]

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@@ -388,6 +388,16 @@ class PrologEpilogSGPRSaveRestoreInfo {
   SGPRSaveKind getKind() const { return Kind; }
 };
 
+const MCRegister FirstVGPRBlock = AMDGPU::VReg_1024RegClass.getRegister(0);
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RKSimon wrote:

I'm seeing initialization ordering failures from this - can't we just put it inside the VGPRBlock2IndexFunctor operator?

https://github.com/llvm/llvm-project/pull/130013