[llvm] [MIPS]Remove unnecessary SLL instructions on MIPS64el (PR #109386)

[via llvm-commits]

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@@ -1221,6 +1222,43 @@ static SDValue performSHLCombine(SDNode *N, SelectionDAG &DAG,
                      DAG.getConstant(SMSize, DL, MVT::i32));
 }
 
+static SDValue performSignExtendCombine(SDNode *N, SelectionDAG &DAG,
+                                        TargetLowering::DAGCombinerInfo &DCI,
+                                        const MipsSubtarget &Subtarget) {
+  if (DCI.Level != AfterLegalizeDAG || !Subtarget.isGP64bit()) {
+    return SDValue();
+  }
+
+  SDValue N0 = N->getOperand(0);
+  EVT VT = N->getValueType(0);
+
+  // Pattern match XOR.
+  // $dst = (sign_extend (xor (trunc $src, i32), imm), i64)
+  // => $dst = (xor (signext_inreg $src, i32), imm as i64)
+  if (N0.getOpcode() == ISD::XOR &&
+      N0.getOperand(0).getOpcode() == ISD::TRUNCATE &&
+      N0.getOperand(1).getOpcode() == ISD::Constant) {
+    SDValue TruncateSource = N0.getOperand(0).getOperand(0);
+    auto *ConstantOperand = dyn_cast<ConstantSDNode>(N0->getOperand(1));
+
+    // Remove the unnecessary truncate + signext, and perform the operation
+    // using the initial sign-extended i64 values, with the constant also sign
+    // extended to i64. Note: ConstImm is either passed as a 32-bit immediate to
+    // xori, or gets "assembled" to anoter register and a xor is emitted, if
+    // ConstImm can't fit in 32 bits.
+    if (VT == MVT::i64 && VT == TruncateSource.getValueType()) {
+      SDValue FirstOperand =
+          DAG.getNode(ISD::SIGN_EXTEND_INREG, SDLoc(N0), VT, TruncateSource,
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yingopq wrote:

Can we signext i64 to i32? I noticed that you limited the value `TruncateSource` to i64.

https://github.com/llvm/llvm-project/pull/109386