[llvm] [RISCV] Add codegen support for ri.vinsert.v.x and ri.vextract.x.v (PR #136708)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 24 09:07:57 PDT 2025


================
@@ -125,3 +125,58 @@ def RI_VEXTRACT : CustomRivosXVI<0b010111, OPMVV, (outs GPR:$rd),
                                 (ins VR:$vs2, uimm5:$imm),
                                 "ri.vextract.x.v", "$rd, $vs2, $imm">;
 }
+
+
+def ri_vextract : SDNode<"RISCVISD::RI_VEXTRACT",
+                          SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<1>,
+                                               SDTCisInt<2>,
+                                               SDTCisInt<1>]>>;
+
+def ri_vinsert_vl : SDNode<"RISCVISD::RI_VINSERT_VL",
+                            SDTypeProfile<1, 5, [SDTCisSameAs<0, 1>,
----------------
topperc wrote:

Indented too far

https://github.com/llvm/llvm-project/pull/136708


More information about the llvm-commits mailing list