[llvm] PowerPC/VSX: Select FMINNUM and FMAXNUM (PR #135739)

[YunQiang Su via llvm-commits]

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@@ -2731,6 +2731,8 @@ def : Pat<(f32 (fneg (fabs f32:$S))),
                (COPY_TO_REGCLASS $S, VSFRC)), VSSRC))>;
 
 // f32 Min.
+def : Pat<(f32 (fminnum f32:$A, f32:$B)),
+          (f32 FpMinMax.F32Min)>;
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wzssyqa wrote:

> z-turn?
> 

I mean we will need to change the testcases, and then will need to change them back.

> > But we need sometime to switch FMAXNUM_IEEE to FMAXNUM
> 
> Yes, but you can get there by removing the use a target at a time. Here if you make FMAXNUM legal, and stop making FMAXNUM_IEEE legal, the target starts interpreting the nodes in the new way and stops using FMAXNUM_IEEE.

Yes. But we haven't change the code in arch-indepent code.
I will have a try with PowerPC/VSX.

https://github.com/llvm/llvm-project/pull/135739