[llvm] RISC-V: Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (PR #135727)

[YunQiang Su via llvm-commits]

wzssyqa wrote:

> Correct me if I am wrong. I think the description is wrong.
> 
> This is the spec description of vfmin/vfmax:
> 
> > The vector floating-point vfmin and vfmax instructions have the same behavior as the corresponding scalar floating-point instructions in version 2.2 of the RISC-V F/D/Q extension.
> 

> While in Zfa extension, it says:
> 
> > 26.2. Minimum and Maximum Instructions
> > The FMINM.S and FMAXM.S instructions are defined like the FMIN.S and FMAX.S instructions, except that if either input is NaN, the result is the canonical NaN.
> > These instructions implement the IEEE 754-2019 minimum and maximum operations.
> 
> Based on my rough understanding, the vector vfmin/vfmax don' follow IEEE 754-2019, but IEEE 754-2008. There is no vectorzied Zfa extension currently.

In RISC-V Unprivileged document there is statement
```
Note that in version 2.2 of the F extension, the FMIN.S and FMAX.S instructions were
amended to implement the proposed IEEE 754-201x minimumNumber and
maximumNumber operations, rather than the IEEE 754-2008 minNum and maxNum
operations. These operations differ in their handling of signaling NaNs.
```


https://github.com/llvm/llvm-project/pull/135727