[llvm] [AMDGPU][InsertWaitCnts] Add test for global_wb/inv/wbinv tracking (PR #135339)

[Pierre van Houtryve via llvm-commits]

https://github.com/Pierre-vh updated https://github.com/llvm/llvm-project/pull/135339

>From b1422e75902f7186d6265158797abc402d03908f Mon Sep 17 00:00:00 2001
From: pvanhout <pierre.vanhoutryve at amd.com>
Date: Fri, 11 Apr 2025 11:45:24 +0200
Subject: [PATCH] [AMDGPU][InsertWaitCnts] Add test for global_wb/inv/wbinv
 tracking

---
 .../AMDGPU/insert-waitcnts-gfx12-wbinv.mir    | 129 ++++++++++++++++++
 1 file changed, 129 insertions(+)
 create mode 100644 llvm/test/CodeGen/AMDGPU/insert-waitcnts-gfx12-wbinv.mir

diff --git a/llvm/test/CodeGen/AMDGPU/insert-waitcnts-gfx12-wbinv.mir b/llvm/test/CodeGen/AMDGPU/insert-waitcnts-gfx12-wbinv.mir
new file mode 100644
index 0000000000000..6758a43aedd3c
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/insert-waitcnts-gfx12-wbinv.mir
@@ -0,0 +1,129 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass si-insert-waitcnts -o - %s | FileCheck %s
+
+
+# Check storecnt is not eliminated after global_wb/wbinv or
+# loadcnt after inv.
+---
+
+name:            wb_storecnt
+body:             |
+  ; CHECK-LABEL: name: wb_storecnt
+  ; CHECK: bb.0:
+  ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   S_WAIT_LOADCNT_DSCNT 0
+  ; CHECK-NEXT:   S_WAIT_EXPCNT 0
+  ; CHECK-NEXT:   S_WAIT_SAMPLECNT 0
+  ; CHECK-NEXT:   S_WAIT_BVHCNT 0
+  ; CHECK-NEXT:   S_WAIT_KMCNT 0
+  ; CHECK-NEXT:   S_WAIT_STORECNT 0
+  ; CHECK-NEXT:   S_CMP_EQ_U32 renamable $sgpr1, 0, implicit-def $scc
+  ; CHECK-NEXT:   S_CBRANCH_SCC1 %bb.2, implicit killed $scc
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1:
+  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   GLOBAL_WB 16, implicit $exec
+  ; CHECK-NEXT:   GLOBAL_STORE_DWORD_SADDR renamable $vgpr0, renamable $vgpr1, renamable $sgpr2_sgpr3, 0, 16, implicit $exec
+  ; CHECK-NEXT:   S_CBRANCH_SCC0 %bb.1, implicit killed $scc
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.2:
+  ; CHECK-NEXT:   S_ENDPGM 0
+  bb.0:
+    S_WAIT_LOADCNT_soft 0
+    S_WAIT_STORECNT_soft 0
+    S_WAIT_DSCNT_soft 0
+    S_CMP_EQ_U32 renamable $sgpr1, 0, implicit-def $scc
+    S_CBRANCH_SCC1 %bb.2, implicit killed $scc
+  bb.1:
+    GLOBAL_WB 16, implicit $exec
+    S_WAIT_LOADCNT_soft 0
+    S_WAIT_STORECNT_soft 0
+    GLOBAL_STORE_DWORD_SADDR renamable $vgpr0, renamable $vgpr1, renamable $sgpr2_sgpr3, 0, 16, implicit $exec
+    S_CBRANCH_SCC0 %bb.1, implicit killed $scc
+  bb.2:
+    S_ENDPGM 0
+...
+---
+
+name:            wbinv_storecnt
+body:             |
+  ; CHECK-LABEL: name: wbinv_storecnt
+  ; CHECK: bb.0:
+  ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   S_WAIT_LOADCNT_DSCNT 0
+  ; CHECK-NEXT:   S_WAIT_EXPCNT 0
+  ; CHECK-NEXT:   S_WAIT_SAMPLECNT 0
+  ; CHECK-NEXT:   S_WAIT_BVHCNT 0
+  ; CHECK-NEXT:   S_WAIT_KMCNT 0
+  ; CHECK-NEXT:   S_WAIT_STORECNT 0
+  ; CHECK-NEXT:   S_CMP_EQ_U32 renamable $sgpr1, 0, implicit-def $scc
+  ; CHECK-NEXT:   S_CBRANCH_SCC1 %bb.2, implicit killed $scc
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1:
+  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   GLOBAL_WBINV 16, implicit $exec
+  ; CHECK-NEXT:   GLOBAL_STORE_DWORD_SADDR renamable $vgpr0, renamable $vgpr1, renamable $sgpr2_sgpr3, 0, 16, implicit $exec
+  ; CHECK-NEXT:   S_CBRANCH_SCC0 %bb.1, implicit killed $scc
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.2:
+  ; CHECK-NEXT:   S_ENDPGM 0
+  bb.0:
+    S_WAIT_LOADCNT_soft 0
+    S_WAIT_STORECNT_soft 0
+    S_WAIT_DSCNT_soft 0
+    S_CMP_EQ_U32 renamable $sgpr1, 0, implicit-def $scc
+    S_CBRANCH_SCC1 %bb.2, implicit killed $scc
+  bb.1:
+    GLOBAL_WBINV 16, implicit $exec
+    S_WAIT_LOADCNT_soft 0
+    S_WAIT_STORECNT_soft 0
+    GLOBAL_STORE_DWORD_SADDR renamable $vgpr0, renamable $vgpr1, renamable $sgpr2_sgpr3, 0, 16, implicit $exec
+    S_CBRANCH_SCC0 %bb.1, implicit killed $scc
+  bb.2:
+    S_ENDPGM 0
+...
+---
+
+name:            inv_loadcnt
+body:             |
+  ; CHECK-LABEL: name: inv_loadcnt
+  ; CHECK: bb.0:
+  ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   S_WAIT_LOADCNT_DSCNT 0
+  ; CHECK-NEXT:   S_WAIT_EXPCNT 0
+  ; CHECK-NEXT:   S_WAIT_SAMPLECNT 0
+  ; CHECK-NEXT:   S_WAIT_BVHCNT 0
+  ; CHECK-NEXT:   S_WAIT_KMCNT 0
+  ; CHECK-NEXT:   S_WAIT_STORECNT 0
+  ; CHECK-NEXT:   S_CMP_EQ_U32 renamable $sgpr1, 0, implicit-def $scc
+  ; CHECK-NEXT:   S_CBRANCH_SCC1 %bb.2, implicit killed $scc
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1:
+  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   GLOBAL_INV 16, implicit $exec
+  ; CHECK-NEXT:   GLOBAL_STORE_DWORD_SADDR renamable $vgpr0, renamable $vgpr1, renamable $sgpr2_sgpr3, 0, 16, implicit $exec
+  ; CHECK-NEXT:   S_CBRANCH_SCC0 %bb.1, implicit killed $scc
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.2:
+  ; CHECK-NEXT:   S_ENDPGM 0
+  bb.0:
+    S_WAIT_LOADCNT_soft 0
+    S_WAIT_STORECNT_soft 0
+    S_WAIT_DSCNT_soft 0
+    S_CMP_EQ_U32 renamable $sgpr1, 0, implicit-def $scc
+    S_CBRANCH_SCC1 %bb.2, implicit killed $scc
+  bb.1:
+    GLOBAL_INV 16, implicit $exec
+    S_WAIT_LOADCNT_soft 0
+    S_WAIT_STORECNT_soft 0
+    GLOBAL_STORE_DWORD_SADDR renamable $vgpr0, renamable $vgpr1, renamable $sgpr2_sgpr3, 0, 16, implicit $exec
+    S_CBRANCH_SCC0 %bb.1, implicit killed $scc
+  bb.2:
+    S_ENDPGM 0
+...