[llvm] [RISCV] Select (add x, C) -> (sub x, -C) if -C cheaper to materialize (PR #137309)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 25 09:36:17 PDT 2025
================
@@ -2120,11 +2120,16 @@ def : Pat<(XLenVT (add GPR:$rs1, immop_oneuse<AddiPair>:$rs2)),
(ADDI (XLenVT (ADDI GPR:$rs1, (AddiPairImmLarge imm:$rs2))),
(AddiPairImmSmall imm:$rs2))>;
+def negImm : ComplexPattern<XLenVT, 1, "selectNegImm", [], [], 0>;
+
let Predicates = [IsRV64] in {
// Select W instructions if only the lower 32-bits of the result are used.
def : Pat<(binop_allwusers<add> GPR:$rs1, immop_oneuse<AddiPair>:$rs2),
(ADDIW (i64 (ADDIW GPR:$rs1, (AddiPairImmLarge imm:$rs2))),
(AddiPairImmSmall imm:$rs2))>;
+
+// Select SUB if the negated constant is cheaper to materialize.
+def : Pat<(XLenVT (add GPR:$rs1, negImm:$rs2)), (SUB GPR:$rs1, negImm:$rs2)>;
----------------
topperc wrote:
Use i64 instead of XLenVT. It will stop tablegen from creating an unreachable isel pattern for i32.
https://github.com/llvm/llvm-project/pull/137309
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