[llvm] [DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension (PR #136677)

[Luke Lau via llvm-commits]

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@@ -19893,6 +19893,14 @@ bool RISCVTargetLowering::isDesirableToCommuteWithShift(
   return true;
 }
 
+bool RISCVTargetLowering::isDesirableToHoistLogicOpWithExt(
+    const SDNode *LogicOp, unsigned ExtOp) const {
+  if (NodeExtensionHelper::isSupportedRoot(LogicOp, Subtarget) &&
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lukel97 wrote:

There's other opcodes in there that don't check the type though. Probably safer to check here in case we add more opcodes and forget to check it's a vector. 

https://github.com/llvm/llvm-project/pull/136677