[llvm] [AMDGPU] add s_bitset[10]_b32 optimization for shl+[or, andn2] pattern (PR #134155)

[Matt Arsenault via llvm-commits]

arsenm wrote:

> With the knowledage what I have so far, doing it in SiShrink pass is the easiest way.

This is more difficult than selecting this as a tablegen pattern 


https://github.com/llvm/llvm-project/pull/134155