[llvm] SPIRV: Simplify phi processing (PR #137050)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 23 13:12:15 PDT 2025


https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/137050

None

>From 142ab17d799c9ec5b0e48908a8b15f97d6ee65d8 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Wed, 23 Apr 2025 12:07:08 +0200
Subject: [PATCH] SPIRV: Simplify phi processing

---
 llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp b/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
index 6e1c41d9f20cb..783c405b1ac42 100644
--- a/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
@@ -2019,9 +2019,7 @@ static void patchPhis(const Module &M, SPIRVGlobalRegistry *GR,
     if (!MF)
       continue;
     for (auto &MBB : *MF) {
-      for (MachineInstr &MI : MBB) {
-        if (MI.getOpcode() != TargetOpcode::PHI)
-          continue;
+      for (MachineInstr &MI : MBB.phis()) {
         MI.setDesc(TII.get(SPIRV::OpPhi));
         Register ResTypeReg = GR->getSPIRVTypeID(
             GR->getSPIRVTypeForVReg(MI.getOperand(0).getReg(), MF));



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