[llvm] [X86][AVX] Match v4f64 blend from shuffle of scalar values. (PR #135753)

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 23 14:00:30 PDT 2025


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@@ -8690,6 +8690,33 @@ static SDValue lowerBuildVectorToBitOp(BuildVectorSDNode *Op, const SDLoc &DL,
   return LowerShift(Res, Subtarget, DAG);
 }
 
+/// Attempt to lower a BUILD_VECTOR of scalar values to a shuffle of splats
+/// representing a blend.
+static SDValue lowerBuildVectorAsBlend(BuildVectorSDNode *BVOp, SDLoc const &DL,
+                                       X86Subtarget const &Subtarget,
+                                       SelectionDAG &DAG) {
+  if (!Subtarget.hasAVX())
+    return {};
+
+  auto VT = BVOp->getSimpleValueType(0u);
+
+  if (VT == MVT::v4f64 && BVOp->getNumOperands() == 4u) {
----------------
RKSimon wrote:

```if (VT == MVT::v4f64) {``` (the getNumOperands should be guaranteed to match the number of vector elements)

https://github.com/llvm/llvm-project/pull/135753


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