[llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)

[Matt Arsenault via llvm-commits]

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@@ -24,6 +34,69 @@
 
 namespace llvm {
 
+/// A MachineSchedStrategy implementation for SystemZ pre RA  scheduling.
+class SystemZPreRASchedStrategy : public GenericScheduler {
+  // The FP/Vector registers are prioritized during scheduling.
+  std::set<unsigned> PrioRegClasses;
+  void initializePrioRegClasses(const TargetRegisterInfo *TRI);
+  bool isPrioVirtReg(Register Reg, const MachineRegisterInfo *MRI) const {
+    return (Reg.isVirtual() &&
+            PrioRegClasses.count(MRI->getRegClass(Reg)->getID()));
+  }
+
+  // A TinyRegion has up to 10 instructions and is scheduled differently.
+  bool TinyRegion;
+
+  // Num instructions left to schedule.
+  unsigned NumLeft;
+
+  // Tru if latency scheduling is enabled.
+  bool ShouldReduceLatency;
+
+  // Keep track of currently live registers.
+  struct VRegSet : std::set<Register> {
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arsenm wrote:

Don't subclass base data structures 

https://github.com/llvm/llvm-project/pull/135076